Ðþí 2   8 ˆ   (            ª P                             E    gumstix,omap3-overo-tobiduo gumstix,omap3-overo ti,omap3630 ti,omap3                                     +         0   7OMAP36xx/AM37xx/DM37xx Gumstix Overo on TobiDuo    chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000         cpus                         +       cpu@0             arm,cortex-a8            {cpu          ‡             ‹            ’cpu          ž “à         ¬            À            Ë            Ú           pmu@54000000              arm,cortex-a8-pmu            ‡T    €           â            ídebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ímpu       iva       
    ti,iva2.2            íiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           ‡h               â   	   
                     +             ÷         íl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +            ÷    H         scm@2000              ti,omap3-scm simple-bus          ‡                             +            ÷               pinmux@30              ti,omap3-padconf pinctrl-single          ‡   0  8                     +             þ                               3           Q  ÿ        ndefault         |            Ú   è   uart2-pins           †  <    >     @     B           Ú   ç      i2c1-pins           †  Š     Œ            Ú   ê      mmc1-pins         0  †                                 Ú   õ      mmc2-pins         0  †  (    *    ,    .    0    2           Ú   ÷      w3cbw003c-pins          †   „     l            Ú        hsusb2-pins       @  †  ¤    ¦    ¨    ª    ¬    ®    Ž     �            Ú         twl4030-pins            †  °  A         Ú   ë      i2c3-pins           †  ’     ”            Ú   ñ      uart3-pins          †  n     p             Ú   é         scm_conf@270              syscon simple-bus            ‡  p  0                     +            ÷      p  0         Ú      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             ‡  °           š      pbias_mmc_omap2430          ¡pbias_mmc_omap2430          ° w@        È -ÆÀ         Ú   ô         clocks                       +       clock@68          
    ti,clksel            ‡   h        à                        +       clock-mcbsp5-mux-fck@4           ‡           à              ti,composite-mux-clock          ímcbsp5_mux_fck           ‹               Ú         clock-mcbsp3-mux-fck@0           ‡            à              ti,composite-mux-clock          ímcbsp3_mux_fck           ‹   	            Ú         clock-mcbsp4-mux-fck@2           ‡           à              ti,composite-mux-clock          ímcbsp4_mux_fck           ‹   	            Ú            mcbsp5_fck          à              ti,composite-clock           ‹   
            Ú   ÿ      clock@4       
    ti,clksel            ‡           à                        +       clock-mcbsp1-mux-fck@2           ‡           à              ti,composite-mux-clock          ímcbsp1_mux_fck           ‹               Ú         clock-mcbsp2-mux-fck@6           ‡           à              ti,composite-mux-clock          ímcbsp2_mux_fck           ‹   	            Ú            mcbsp1_fck          à              ti,composite-clock           ‹               Ú   ú      mcbsp2_fck          à              ti,composite-clock           ‹               Ú   ü      mcbsp3_fck          à              ti,composite-clock           ‹               Ú   ý      mcbsp4_fck          à              ti,composite-clock           ‹               Ú   þ            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          ‡  
    \                     +             þ                               3           Q  ÿ   twl4030-vpins-pins           †                                    Ú   ì               target-module@480a6000            ti,sysc-omap2 ti,sysc            ‡H
`D   H
`H   H
`L            rev sysc syss           
                             %            ‹            ’ick                      +            ÷    H
`        aes1@0            ti,omap3-aes             ‡       P         â            2      	      
        7tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            ‡HPD   HPH   HPL            rev sysc syss           
                             %            ‹            ’ick                      +            ÷    HP        aes2@0            ti,omap3-aes             ‡       P         â            2      A      B        7tx rx            prm@48306000              ti,omap3-prm             ‡H0`   @          â      clocks                       +       virt_16_8m_ck           à              fixed-clock         A Y          Ú         osc_sys_ck@d40          à              ti,mux-clock             ‹                           ‡  @         Ú         sys_ck@1270         à              ti,divider-clock             ‹           Q           ^            ‡  p         i         Ú   "      sys_clkout1@d70         à              ti,gate-clock            ‹            ‡  p        Q         dpll3_x2_ck         à              fixed-factor-clock           ‹           €           ‹         dpll3_m2x2_ck           à              fixed-factor-clock           ‹           €           ‹            Ú   !      dpll4_x2_ck         à              fixed-factor-clock           ‹            €           ‹         corex2_fck          à              fixed-factor-clock           ‹   !        €           ‹            Ú   #      wkup_l4_ick         à              fixed-factor-clock           ‹   "        €           ‹            Ú   b      corex2_d3_fck           à              fixed-factor-clock           ‹   #        €           ‹            Ú   Š      corex2_d5_fck           à              fixed-factor-clock           ‹   #        €           ‹            Ú   ‹         clockdomains             cm@48004000           ti,omap3-cm          ‡H @   @    clocks                       +       dummy_apb_pclk          à              fixed-clock         A          omap_32k_fck            à              fixed-clock         A  €          Ú   H      virt_12m_ck         à              fixed-clock         A ·          Ú         virt_13m_ck         à              fixed-clock         A Æ]@         Ú         virt_19200000_ck            à              fixed-clock         A$ø          Ú         virt_26000000_ck            à              fixed-clock         AŒº€         Ú         virt_38_4m_ck           à              fixed-clock         AIð          Ú         dpll4_ck@d00            à              ti,omap3-dpll-per-j-type-clock           ‹   "   "         ‡        D  0         Ú          dpll4_m2_ck@d48         à              ti,divider-clock             ‹            ^   ?         ‡  H         i         Ú   $      dpll4_m2x2_mul_ck           à              fixed-factor-clock           ‹   $        €           ‹            Ú   %      dpll4_m2x2_ck@d00           à              ti,hsdiv-gate-clock          ‹   %        Q            ‡            •         Ú   &      omap_96m_alwon_fck          à              fixed-factor-clock           ‹   &        €           ‹            Ú   2      dpll3_ck@d00            à              ti,omap3-dpll-core-clock             ‹   "   "         ‡        @  0         Ú         clock@1140        
    ti,clksel            ‡  @        à                        +       clock-dpll3-m3@16            ‡           à              ti,divider-clock            ídpll3_m3_ck          ‹           ^            i         Ú   ,      clock-dpll4-m6@24            ‡           à              ti,divider-clock            ídpll4_m6_ck          ‹            ^   ?         i         Ú   >      clock-emu-src-mux@0          ‡            à              ti,mux-clock            íemu_src_mux_ck           ‹   "   '   (   )         Ú   v      clock-pclk-fck@8             ‡           à              ti,divider-clock          	  ípclk_fck             ‹   *        ^            i      clock-pclkx2-fck@6           ‡           à              ti,divider-clock            ípclkx2_fck           ‹   *        ^            i      clock-atclk-fck@4            ‡           à              ti,divider-clock          
  íatclk_fck            ‹   *        ^            i      clock-traceclk-src-fck@2             ‡           à              ti,mux-clock            ítraceclk_src_fck             ‹   "   '   (   )         Ú   +      clock-traceclk-fck@11            ‡           à              ti,divider-clock            ítraceclk_fck             ‹   +        ^            i         dpll3_m3x2_mul_ck           à              fixed-factor-clock           ‹   ,        €           ‹            Ú   -      dpll3_m3x2_ck@d00           à              ti,hsdiv-gate-clock          ‹   -        Q            ‡            •         Ú   .      emu_core_alwon_ck           à              fixed-factor-clock           ‹   .        €           ‹            Ú   '      sys_altclk          à              fixed-clock         A             Ú   5      mcbsp_clks          à              fixed-clock         A             Ú         core_ck         à              fixed-factor-clock           ‹           €           ‹            Ú   /      dpll1_fck@940           à              ti,divider-clock             ‹   /        Q           ^            ‡  	@         i         Ú   0      dpll1_ck@904            à              ti,omap3-dpll-clock          ‹   "   0         ‡  	  	$  	@  	4         Ú         dpll1_x2_ck         à              fixed-factor-clock           ‹           €           ‹            Ú   1      dpll1_x2m2_ck@944           à              ti,divider-clock             ‹   1        ^            ‡  	D         i         Ú   E      cm_96m_fck          à              fixed-factor-clock           ‹   2        €           ‹            Ú   3      clock@d40         
    ti,clksel            ‡  @        à                        +       clock-dpll3-m2@27            ‡           à              ti,divider-clock            ídpll3_m2_ck          ‹           ^            i         Ú         clock-omap-96m-fck@6             ‡           à              ti,mux-clock            íomap_96m_fck             ‹   3   "         Ú   Y      clock-omap-54m-fck@5             ‡           à              ti,mux-clock            íomap_54m_fck             ‹   4   5         Ú   A      clock-omap-48m-fck@3             ‡           à              ti,mux-clock            íomap_48m_fck             ‹   6   5         Ú   9         clock@e40         
    ti,clksel            ‡  @        à                        +       clock-dpll4-m3@8             ‡           à              ti,divider-clock            ídpll4_m3_ck          ‹            ^             i         Ú   7      clock-dpll4-m4@0             ‡            à              ti,divider-clock            ídpll4_m4_ck          ‹            ^            i         Ú   :         dpll4_m3x2_mul_ck           à              fixed-factor-clock           ‹   7        €           ‹            Ú   8      dpll4_m3x2_ck@d00           à              ti,hsdiv-gate-clock          ‹   8        Q            ‡            •         Ú   4      cm_96m_d2_fck           à              fixed-factor-clock           ‹   3        €           ‹            Ú   6      omap_12m_fck            à              fixed-factor-clock           ‹   9        €           ‹            Ú   Z      dpll4_m4x2_mul_ck           à              ti,fixed-factor-clock            ‹   :        «           ¹            Æ         Ú   ;      dpll4_m4x2_ck@d00           à              ti,gate-clock            ‹   ;        Q            ‡            •         Æ         Ú   ^      dpll4_m5_ck@f40         à              ti,divider-clock             ‹            ^   ?         ‡  @         i         Ú   <      dpll4_m5x2_mul_ck           à              ti,fixed-factor-clock            ‹   <        «           ¹            Æ         Ú   =      dpll4_m5x2_ck@d00           à              ti,hsdiv-gate-clock          ‹   =        Q            ‡            •         Æ         Ú   z      dpll4_m6x2_mul_ck           à              fixed-factor-clock           ‹   >        €           ‹            Ú   ?      dpll4_m6x2_ck@d00           à              ti,hsdiv-gate-clock          ‹   ?        Q            ‡            •         Ú   @      emu_per_alwon_ck            à              fixed-factor-clock           ‹   @        €           ‹            Ú   (      clock@d70         
    ti,clksel            ‡  p        à                        +       clock-clkout2-src-gate@7             ‡           à               ti,composite-no-wait-gate-clock         íclkout2_src_gate_ck          ‹   /         Ú   C      clock-clkout2-src-mux@0          ‡            à              ti,composite-mux-clock          íclkout2_src_mux_ck           ‹   /   "   3   A         Ú   D      clock-sys-clkout2@3          ‡           à              ti,divider-clock            ísys_clkout2          ‹   B        ^   @         Ù         clkout2_src_ck          à              ti,composite-clock           ‹   C   D         Ú   B      mpu_ck          à              fixed-factor-clock           ‹   E        €           ‹            Ú   F      arm_fck@924         à              ti,divider-clock             ‹   F         ‡  	$        ^         emu_mpu_alwon_ck            à              fixed-factor-clock           ‹   F        €           ‹            Ú   )      clock@a40         
    ti,clksel            ‡  
@        à                        +       clock-l3-ick@0           ‡            à              ti,divider-clock            íl3_ick           ‹   /        ^            i         Ú   G      clock-l4-ick@2           ‡           à              ti,divider-clock            íl4_ick           ‹   G        ^            i         Ú   I      clock-gpt10-mux-fck@6            ‡           à              ti,composite-mux-clock          ígpt10_mux_fck            ‹   H   "         Ú   V      clock-gpt11-mux-fck@7            ‡           à              ti,composite-mux-clock          ígpt11_mux_fck            ‹   H   "         Ú   X      clock-ssi-ssr-div-fck-3430es2@8          ‡           à              ti,composite-divider-clock          íssi_ssr_div_fck_3430es2          ‹   #      $  ï                                       Ú            clock@c40         
    ti,clksel            ‡  @        à                        +       clock-rm-ick@1           ‡           à              ti,divider-clock            írm_ick           ‹   I        ^            i      clock-gpt1-mux-fck@0             ‡            à              ti,composite-mux-clock          ígpt1_mux_fck             ‹   H   "         Ú   a      clock-usim-mux-fck@3             ‡           à              ti,composite-mux-clock          íusim_mux_fck          (   ‹   "   J   K   L   M   N   O   P   Q   R         i         Ú   ƒ         clock@a00         
    ti,clksel            ‡  
         à                        +       clock-gpt10-gate-fck@11          ‡           à              ti,composite-gate-clock         ígpt10_gate_fck           ‹   "         Ú   U      clock-gpt11-gate-fck@12          ‡           à              ti,composite-gate-clock         ígpt11_gate_fck           ‹   "         Ú   W      clock-mmchs2-fck@25          ‡           à              ti,wait-gate-clock          ímmchs2_fck           ‹            Ú   ¹      clock-mmchs1-fck@24          ‡           à              ti,wait-gate-clock          ímmchs1_fck           ‹            Ú   º      clock-i2c3-fck@17            ‡           à              ti,wait-gate-clock        	  íi2c3_fck             ‹            Ú   »      clock-i2c2-fck@16            ‡           à              ti,wait-gate-clock        	  íi2c2_fck             ‹            Ú   ¼      clock-i2c1-fck@15            ‡           à              ti,wait-gate-clock        	  íi2c1_fck             ‹            Ú   ½      clock-mcbsp5-gate-fck@10             ‡   
        à              ti,composite-gate-clock         ímcbsp5_gate_fck          ‹            Ú   
      clock-mcbsp1-gate-fck@9          ‡   	        à              ti,composite-gate-clock         ímcbsp1_gate_fck          ‹            Ú         clock-mcspi4-fck@21          ‡           à              ti,wait-gate-clock          ímcspi4_fck           ‹   S         Ú   ¾      clock-mcspi3-fck@20          ‡           à              ti,wait-gate-clock          ímcspi3_fck           ‹   S         Ú   ¿      clock-mcspi2-fck@19          ‡           à              ti,wait-gate-clock          ímcspi2_fck           ‹   S         Ú   À      clock-mcspi1-fck@18          ‡           à              ti,wait-gate-clock          ímcspi1_fck           ‹   S         Ú   Á      clock-uart2-fck@14           ‡           à              ti,wait-gate-clock        
  íuart2_fck            ‹   S         Ú   Â      clock-uart1-fck@13           ‡           à              ti,wait-gate-clock        
  íuart1_fck            ‹   S         Ú   Ã      clock-hdq-fck@22             ‡           à              ti,wait-gate-clock          íhdq_fck          ‹   T         Ú   Ä      clock-modem-fck@31           ‡           à              ti,omap3-interface-clock          
  ímodem_fck            ‹   "         Ú   à      clock-mspro-fck@23           ‡           à              ti,wait-gate-clock        
  ímspro_fck            ‹         clock-ssi-ssr-gate-fck-3430es2@0             ‡            à               ti,composite-no-wait-gate-clock         íssi_ssr_gate_fck_3430es2             ‹   #         Ú   ~      clock-mmchs3-fck@30          ‡           à              ti,wait-gate-clock          ímmchs3_fck           ‹            Ú   Ü         gpt10_fck           à              ti,composite-clock           ‹   U   V      gpt11_fck           à              ti,composite-clock           ‹   W   X      core_96m_fck            à              fixed-factor-clock           ‹   Y        €           ‹            Ú         core_48m_fck            à              fixed-factor-clock           ‹   9        €           ‹            Ú   S      core_12m_fck            à              fixed-factor-clock           ‹   Z        €           ‹            Ú   T      core_l3_ick         à              fixed-factor-clock           ‹   G        €           ‹            Ú   [      clock@a10         
    ti,clksel            ‡  
        à                        +       clock-sdrc-ick@1             ‡           à              ti,wait-gate-clock        	  ísdrc_ick             ‹   [         Ú   Ž      clock-mmchs2-ick@25          ‡           à              ti,omap3-interface-clock            ímmchs2_ick           ‹   \         Ú   Å      clock-mmchs1-ick@24          ‡           à              ti,omap3-interface-clock            ímmchs1_ick           ‹   \         Ú   Æ      clock-hdq-ick@22             ‡           à              ti,omap3-interface-clock            íhdq_ick          ‹   \         Ú   Ç      clock-mcspi4-ick@21          ‡           à              ti,omap3-interface-clock            ímcspi4_ick           ‹   \         Ú   È      clock-mcspi3-ick@20          ‡           à              ti,omap3-interface-clock            ímcspi3_ick           ‹   \         Ú   É      clock-mcspi2-ick@19          ‡           à              ti,omap3-interface-clock            ímcspi2_ick           ‹   \         Ú   Ê      clock-mcspi1-ick@18          ‡           à              ti,omap3-interface-clock            ímcspi1_ick           ‹   \         Ú   Ë      clock-i2c3-ick@17            ‡           à              ti,omap3-interface-clock          	  íi2c3_ick             ‹   \         Ú   Ì      clock-i2c2-ick@16            ‡           à              ti,omap3-interface-clock          	  íi2c2_ick             ‹   \         Ú   Í      clock-i2c1-ick@15            ‡           à              ti,omap3-interface-clock          	  íi2c1_ick             ‹   \         Ú   Î      clock-uart2-ick@14           ‡           à              ti,omap3-interface-clock          
  íuart2_ick            ‹   \         Ú   Ï      clock-uart1-ick@13           ‡           à              ti,omap3-interface-clock          
  íuart1_ick            ‹   \         Ú   Ð      clock-gpt11-ick@12           ‡           à              ti,omap3-interface-clock          
  ígpt11_ick            ‹   \         Ú   Ñ      clock-gpt10-ick@11           ‡           à              ti,omap3-interface-clock          
  ígpt10_ick            ‹   \         Ú   Ò      clock-mcbsp5-ick@10          ‡   
        à              ti,omap3-interface-clock            ímcbsp5_ick           ‹   \         Ú   Ó      clock-mcbsp1-ick@9           ‡   	        à              ti,omap3-interface-clock            ímcbsp1_ick           ‹   \         Ú   Ô      clock-omapctrl-ick@6             ‡           à              ti,omap3-interface-clock            íomapctrl_ick             ‹   \         Ú   Õ      clock-aes2-ick@28            ‡           à              ti,omap3-interface-clock          	  íaes2_ick             ‹   \         Ú         clock-sha12-ick@27           ‡           à              ti,omap3-interface-clock          
  ísha12_ick            ‹   \         Ú   Ö      clock-icr-ick@29             ‡           à              ti,omap3-interface-clock            íicr_ick          ‹   \      clock-des2-ick@26            ‡           à              ti,omap3-interface-clock          	  ídes2_ick             ‹   \      clock-mspro-ick@23           ‡           à              ti,omap3-interface-clock          
  ímspro_ick            ‹   \      clock-mailboxes-ick@7            ‡           à              ti,omap3-interface-clock            ímailboxes_ick            ‹   \      clock-sad2d-ick@3            ‡           à              ti,omap3-interface-clock          
  ísad2d_ick            ‹   G         Ú   á      clock-hsotgusb-ick-3430es2@4             ‡           à          "    ti,omap3-hsotgusb-interface-clock           íhsotgusb_ick_3430es2             ‹   [         Ú   �      clock-ssi-ick-3430es2@0          ‡            à              ti,omap3-ssi-interface-clock            íssi_ick_3430es2          ‹   ]         Ú        clock-mmchs3-ick@30          ‡           à              ti,omap3-interface-clock            ímmchs3_ick           ‹   \         Ú   Û         gpmc_fck            à              fixed-factor-clock           ‹   [        €           ‹         core_l4_ick         à              fixed-factor-clock           ‹   I        €           ‹            Ú   \      clock@e00         
    ti,clksel            ‡           à                        +       clock-dss-tv-fck            à              ti,gate-clock           ídss_tv_fck           ‹   A        Q            Ú   ´      clock-dss-96m-fck           à              ti,gate-clock           ídss_96m_fck          ‹   Y        Q            Ú   µ      clock-dss2-alwon-fck            à              ti,gate-clock           ídss2_alwon_fck           ‹   "        Q            Ú   ¶      clock-dss1-alwon-fck-3430es2@0           ‡            à              ti,dss-gate-clock           ídss1_alwon_fck_3430es2           ‹   ^         Æ         Ú   ·         dummy_ck            à              fixed-clock         A          clock@c00         
    ti,clksel            ‡           à                        +       clock-gpt1-gate-fck@0            ‡            à              ti,composite-gate-clock         ígpt1_gate_fck            ‹   "         Ú   `      clock-gpio1-dbck@3           ‡           à              ti,gate-clock           ígpio1_dbck           ‹   _         Ú   «      clock-wdt2-fck@5             ‡           à              ti,wait-gate-clock        	  íwdt2_fck             ‹   _         Ú   ¬      clock-sr1-fck@6          ‡           à              ti,wait-gate-clock          ísr1_fck          ‹   "         Ú        clock-sr2-fck@7          ‡           à              ti,wait-gate-clock          ísr2_fck          ‹   "         Ú        clock-usim-gate-fck@9            ‡   	        à              ti,composite-gate-clock         íusim_gate_fck            ‹   Y         Ú   ‚         gpt1_fck            à              ti,composite-clock           ‹   `   a         Ú         wkup_32k_fck            à              fixed-factor-clock           ‹   H        €           ‹            Ú   _      clock@c10         
    ti,clksel            ‡          à                        +       clock-wdt2-ick@5             ‡           à              ti,omap3-interface-clock          	  íwdt2_ick             ‹   b         Ú   ­      clock-wdt1-ick@4             ‡           à              ti,omap3-interface-clock          	  íwdt1_ick             ‹   b         Ú   ®      clock-gpio1-ick@3            ‡           à              ti,omap3-interface-clock          
  ígpio1_ick            ‹   b         Ú   ¯      clock-omap-32ksync-ick@2             ‡           à              ti,omap3-interface-clock            íomap_32ksync_ick             ‹   b         Ú   °      clock-gpt12-ick@1            ‡           à              ti,omap3-interface-clock          
  ígpt12_ick            ‹   b         Ú   ±      clock-gpt1-ick@0             ‡            à              ti,omap3-interface-clock          	  ígpt1_ick             ‹   b         Ú   ²      clock-usim-ick@9             ‡   	        à              ti,omap3-interface-clock          	  íusim_ick             ‹   b         Ú   ³         per_96m_fck         à              fixed-factor-clock           ‹   2        €           ‹            Ú   	      per_48m_fck         à              fixed-factor-clock           ‹   9        €           ‹            Ú   c      clock@1000        
    ti,clksel            ‡           à                        +       clock-uart3-fck@11           ‡           à              ti,wait-gate-clock        
  íuart3_fck            ‹   c         Ú   �      clock-gpt2-gate-fck@3            ‡           à              ti,composite-gate-clock         ígpt2_gate_fck            ‹   "         Ú   e      clock-gpt3-gate-fck@4            ‡           à              ti,composite-gate-clock         ígpt3_gate_fck            ‹   "         Ú   g      clock-gpt4-gate-fck@5            ‡           à              ti,composite-gate-clock         ígpt4_gate_fck            ‹   "         Ú   i      clock-gpt5-gate-fck@6            ‡           à              ti,composite-gate-clock         ígpt5_gate_fck            ‹   "         Ú   k      clock-gpt6-gate-fck@7            ‡           à              ti,composite-gate-clock         ígpt6_gate_fck            ‹   "         Ú   m      clock-gpt7-gate-fck@8            ‡           à              ti,composite-gate-clock         ígpt7_gate_fck            ‹   "         Ú   o      clock-gpt8-gate-fck@9            ‡   	        à              ti,composite-gate-clock         ígpt8_gate_fck            ‹   "         Ú   q      clock-gpt9-gate-fck@10           ‡   
        à              ti,composite-gate-clock         ígpt9_gate_fck            ‹   "         Ú   s      clock-gpio6-dbck@17          ‡           à              ti,gate-clock           ígpio6_dbck           ‹   d         Ú   ‘      clock-gpio5-dbck@16          ‡           à              ti,gate-clock           ígpio5_dbck           ‹   d         Ú   ’      clock-gpio4-dbck@15          ‡           à              ti,gate-clock           ígpio4_dbck           ‹   d         Ú   “      clock-gpio3-dbck@14          ‡           à              ti,gate-clock           ígpio3_dbck           ‹   d         Ú   ”      clock-gpio2-dbck@13          ‡           à              ti,gate-clock           ígpio2_dbck           ‹   d         Ú   •      clock-wdt3-fck@12            ‡           à              ti,wait-gate-clock        	  íwdt3_fck             ‹   d         Ú   –      clock-mcbsp2-gate-fck@0          ‡            à              ti,composite-gate-clock         ímcbsp2_gate_fck          ‹            Ú         clock-mcbsp3-gate-fck@1          ‡           à              ti,composite-gate-clock         ímcbsp3_gate_fck          ‹            Ú         clock-mcbsp4-gate-fck@2          ‡           à              ti,composite-gate-clock         ímcbsp4_gate_fck          ‹            Ú         clock-uart4-fck@18           ‡           à              ti,wait-gate-clock        
  íuart4_fck            ‹   c         Ú   ª         clock@1040        
    ti,clksel            ‡  @        à                        +       clock-gpt2-mux-fck@0             ‡            à              ti,composite-mux-clock          ígpt2_mux_fck             ‹   H   "         Ú   f      clock-gpt3-mux-fck@1             ‡           à              ti,composite-mux-clock          ígpt3_mux_fck             ‹   H   "         Ú   h      clock-gpt4-mux-fck@2             ‡           à              ti,composite-mux-clock          ígpt4_mux_fck             ‹   H   "         Ú   j      clock-gpt5-mux-fck@3             ‡           à              ti,composite-mux-clock          ígpt5_mux_fck             ‹   H   "         Ú   l      clock-gpt6-mux-fck@4             ‡           à              ti,composite-mux-clock          ígpt6_mux_fck             ‹   H   "         Ú   n      clock-gpt7-mux-fck@5             ‡           à              ti,composite-mux-clock          ígpt7_mux_fck             ‹   H   "         Ú   p      clock-gpt8-mux-fck@6             ‡           à              ti,composite-mux-clock          ígpt8_mux_fck             ‹   H   "         Ú   r      clock-gpt9-mux-fck@7             ‡           à              ti,composite-mux-clock          ígpt9_mux_fck             ‹   H   "         Ú   t         gpt2_fck            à              ti,composite-clock           ‹   e   f         Ú        gpt3_fck            à              ti,composite-clock           ‹   g   h      gpt4_fck            à              ti,composite-clock           ‹   i   j      gpt5_fck            à              ti,composite-clock           ‹   k   l      gpt6_fck            à              ti,composite-clock           ‹   m   n      gpt7_fck            à              ti,composite-clock           ‹   o   p      gpt8_fck            à              ti,composite-clock           ‹   q   r      gpt9_fck            à              ti,composite-clock           ‹   s   t      per_32k_alwon_fck           à              fixed-factor-clock           ‹   H        €           ‹            Ú   d      per_l4_ick          à              fixed-factor-clock           ‹   I        €           ‹            Ú   u      clock@1010        
    ti,clksel            ‡          à                        +       clock-gpio6-ick@17           ‡           à              ti,omap3-interface-clock          
  ígpio6_ick            ‹   u         Ú   —      clock-gpio5-ick@16           ‡           à              ti,omap3-interface-clock          
  ígpio5_ick            ‹   u         Ú   ˜      clock-gpio4-ick@15           ‡           à              ti,omap3-interface-clock          
  ígpio4_ick            ‹   u         Ú   ™      clock-gpio3-ick@14           ‡           à              ti,omap3-interface-clock          
  ígpio3_ick            ‹   u         Ú   š      clock-gpio2-ick@13           ‡           à              ti,omap3-interface-clock          
  ígpio2_ick            ‹   u         Ú   ›      clock-wdt3-ick@12            ‡           à              ti,omap3-interface-clock          	  íwdt3_ick             ‹   u         Ú   œ      clock-uart3-ick@11           ‡           à              ti,omap3-interface-clock          
  íuart3_ick            ‹   u         Ú   �      clock-uart4-ick@18           ‡           à              ti,omap3-interface-clock          
  íuart4_ick            ‹   u         Ú   ž      clock-gpt9-ick@10            ‡   
        à              ti,omap3-interface-clock          	  ígpt9_ick             ‹   u         Ú   Ÿ      clock-gpt8-ick@9             ‡   	        à              ti,omap3-interface-clock          	  ígpt8_ick             ‹   u         Ú          clock-gpt7-ick@8             ‡           à              ti,omap3-interface-clock          	  ígpt7_ick             ‹   u         Ú   ¡      clock-gpt6-ick@7             ‡           à              ti,omap3-interface-clock          	  ígpt6_ick             ‹   u         Ú   ¢      clock-gpt5-ick@6             ‡           à              ti,omap3-interface-clock          	  ígpt5_ick             ‹   u         Ú   £      clock-gpt4-ick@5             ‡           à              ti,omap3-interface-clock          	  ígpt4_ick             ‹   u         Ú   ¤      clock-gpt3-ick@4             ‡           à              ti,omap3-interface-clock          	  ígpt3_ick             ‹   u         Ú   ¥      clock-gpt2-ick@3             ‡           à              ti,omap3-interface-clock          	  ígpt2_ick             ‹   u         Ú   ¦      clock-mcbsp2-ick@0           ‡            à              ti,omap3-interface-clock            ímcbsp2_ick           ‹   u         Ú   §      clock-mcbsp3-ick@1           ‡           à              ti,omap3-interface-clock            ímcbsp3_ick           ‹   u         Ú   ¨      clock-mcbsp4-ick@2           ‡           à              ti,omap3-interface-clock            ímcbsp4_ick           ‹   u         Ú   ©         emu_src_ck          à              ti,clkdm-gate-clock          ‹   v         Ú   *      secure_32k_fck          à              fixed-clock         A  €          Ú   w      gpt12_fck           à              fixed-factor-clock           ‹   w        €           ‹            Ú        wdt1_fck            à              fixed-factor-clock           ‹   w        €           ‹         security_l4_ick2            à              fixed-factor-clock           ‹   I        €           ‹            Ú   x      clock@a14         
    ti,clksel            ‡  
        à                        +       clock-aes1-ick@3             ‡           à              ti,omap3-interface-clock          	  íaes1_ick             ‹   x         Ú         clock-rng-ick@2          ‡           à              ti,omap3-interface-clock            írng_ick          ‹   x         Ú   û      clock-sha11-ick@1            ‡           à              ti,omap3-interface-clock          
  ísha11_ick            ‹   x      clock-des1-ick@0             ‡            à              ti,omap3-interface-clock          	  ídes1_ick             ‹   x      clock-pka-ick@4          ‡           à              ti,omap3-interface-clock            ípka_ick          ‹   y         clock@f00         
    ti,clksel            ‡           à                        +       clock-cam-mclk@0             ‡            à              ti,gate-clock         	  ícam_mclk             ‹   z         Æ      clock-csi2-96m-fck@1             ‡           à              ti,gate-clock           ícsi2_96m_fck             ‹            Ú   Þ         cam_ick@f10         à          !    ti,omap3-no-wait-interface-clock             ‹   I         ‡          Q             Ú   Ý      security_l3_ick         à              fixed-factor-clock           ‹   G        €           ‹            Ú   y      ssi_l4_ick          à              fixed-factor-clock           ‹   I        €           ‹            Ú   ]      sr_l4_ick           à              fixed-factor-clock           ‹   I        €           ‹         dpll2_fck@40            à              ti,divider-clock             ‹   /        Q           ^            ‡   @         i         Ú   {      dpll2_ck@4          à              ti,omap3-dpll-clock          ‹   "   {         ‡      $   @   4         û                           Ú   |      dpll2_m2_ck@44          à              ti,divider-clock             ‹   |        ^            ‡   D         i         Ú   }      iva2_ck@0           à              ti,wait-gate-clock           ‹   }         ‡            Q             Ú   ß      clock@a18         
    ti,clksel            ‡  
        à                       )             +       clock-mad2d-ick@3            ‡           à              ti,omap3-interface-clock          
  ímad2d_ick            ‹   G         Ú   â      clock-usbtll-ick@2           ‡           à              ti,omap3-interface-clock            íusbtll_ick           ‹   \         Ú   Ú         ssi_ssr_fck_3430es2         à              ti,composite-clock           ‹   ~            Ú   €      ssi_sst_fck_3430es2         à              fixed-factor-clock           ‹   €        €           ‹            Ú  
      sys_d2_ck           à              fixed-factor-clock           ‹   "        €           ‹            Ú   J      omap_96m_d2_fck         à              fixed-factor-clock           ‹   Y        €           ‹            Ú   K      omap_96m_d4_fck         à              fixed-factor-clock           ‹   Y        €           ‹            Ú   L      omap_96m_d8_fck         à              fixed-factor-clock           ‹   Y        €           ‹            Ú   M      omap_96m_d10_fck            à              fixed-factor-clock           ‹   Y        €           ‹   
         Ú   N      dpll5_m2_d4_ck          à              fixed-factor-clock           ‹   �        €           ‹            Ú   O      dpll5_m2_d8_ck          à              fixed-factor-clock           ‹   �        €           ‹            Ú   P      dpll5_m2_d16_ck         à              fixed-factor-clock           ‹   �        €           ‹            Ú   Q      dpll5_m2_d20_ck         à              fixed-factor-clock           ‹   �        €           ‹            Ú   R      usim_fck            à              ti,composite-clock           ‹   ‚   ƒ      dpll5_ck@d04            à              ti,omap3-dpll-clock          ‹   "   "         ‡    $  L  4         û                  Ú   „      dpll5_m2_ck@d50         à              ti,divider-clock             ‹   „        ^            ‡  P         i         Ú   �      sgx_gate_fck@b00            à              ti,composite-gate-clock          ‹   /        Q            ‡            Ú   Œ      core_d3_ck          à              fixed-factor-clock           ‹   /        €           ‹            Ú   …      core_d4_ck          à              fixed-factor-clock           ‹   /        €           ‹            Ú   †      core_d6_ck          à              fixed-factor-clock           ‹   /        €           ‹            Ú   ‡      omap_192m_alwon_fck         à              fixed-factor-clock           ‹   &        €           ‹            Ú   ˆ      core_d2_ck          à              fixed-factor-clock           ‹   /        €           ‹            Ú   ‰      sgx_mux_fck@b40         à              ti,composite-mux-clock            ‹   …   †   ‡   3   ˆ   ‰   Š   ‹         ‡  @         Ú   �      sgx_fck         à              ti,composite-clock           ‹   Œ   �         Ú        sgx_ick@b10         à              ti,wait-gate-clock           ‹   G         ‡          Q             Ú   ã      cpefuse_fck@a08         à              ti,gate-clock            ‹   "         ‡  
        Q             Ú   ×      ts_fck@a08          à              ti,gate-clock            ‹   H         ‡  
        Q            Ú   Ø      usbtll_fck@a08          à              ti,wait-gate-clock           ‹   �         ‡  
        Q            Ú   Ù      dss_ick_3430es2@e10         à              ti,omap3-dss-interface-clock             ‹   I         ‡          Q             Ú   ¸      usbhost_120m_fck@1400           à              ti,gate-clock            ‹   �         ‡           Q            Ú   ä      usbhost_48m_fck@1400            à              ti,dss-gate-clock            ‹   9         ‡           Q             Ú   å      usbhost_ick@1410            à              ti,omap3-dss-interface-clock             ‹   I         ‡          Q             Ú   æ         clockdomains       core_l3_clkdm             ti,clockdomain           ‹   Ž   �      dpll3_clkdm           ti,clockdomain           ‹         dpll1_clkdm           ti,clockdomain           ‹         per_clkdm             ti,clockdomain        l   ‹   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨   ©   ª      emu_clkdm             ti,clockdomain           ‹   *      dpll4_clkdm           ti,clockdomain           ‹          wkup_clkdm            ti,clockdomain        $   ‹   «   ¬   ­   ®   ¯   °   ±   ²   ³      dss_clkdm             ti,clockdomain           ‹   ´   µ   ¶   ·   ¸      core_l4_clkdm             ti,clockdomain        ”   ‹   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó   Ô   Õ      Ö   ×   Ø   Ù   Ú   Û   Ü      cam_clkdm             ti,clockdomain           ‹   Ý   Þ      iva2_clkdm            ti,clockdomain           ‹   ß      dpll2_clkdm           ti,clockdomain           ‹   |      d2d_clkdm             ti,clockdomain           ‹   à   á   â      dpll5_clkdm           ti,clockdomain           ‹   „      sgx_clkdm             ti,clockdomain           ‹   ã      usbhost_clkdm             ti,clockdomain           ‹   ä   å   æ            target-module@48320000            ti,sysc-omap2 ti,sysc            ‡H2     H2          	   rev sysc                            ‹   _   °         ’fck ick                      +            ÷    H2        counter@0             ti,omap-counter32k           ‡                 interrupt-controller@48200000             ti,omap3-intc                                ‡H               Ú         target-module@48056000            ti,sysc-omap2 ti,sysc            ‡H`    H`,   H`(            rev sysc syss           
  #        6                                    %            ‹   [         ’ick                      +            ÷    H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma            ‡                â                    D           O            \   `         Ú            gpio@48310000             ti,omap3-gpio            ‡H1              â            ígpio1            i         {        ‹                                Ú        gpio@49050000             ti,omap3-gpio            ‡I              â            ígpio2            {        ‹                                Ú        gpio@49052000             ti,omap3-gpio            ‡I              â            ígpio3            {        ‹                                Ú        gpio@49054000             ti,omap3-gpio            ‡I@             â             ígpio4            {        ‹                             gpio@49056000             ti,omap3-gpio            ‡I`             â   !         ígpio5            {        ‹                             gpio@49058000             ti,omap3-gpio            ‡I€             â   "         ígpio6            {        ‹                                Ú        serial@4806a000           ti,omap3-uart            ‡H              —      H        2      1      2        7tx rx            íuart1           AÜl       serial@4806c000           ti,omap3-uart            ‡HÀ            —      I        2      3      4        7tx rx            íuart2           AÜl         ndefault         |   ç      serial@49020000           ti,omap3-uart            ‡I             —      J   è  n        2      5      6        7tx rx            íuart3           AÜl         ndefault         |   é      i2c@48070000              ti,omap3-i2c             ‡H     €         â   8                     +             íi2c1            ndefault         |   ê        A '¬@   twl@48           ‡   H         â                         ti,twl4030                              ndefault         |   ë   ì   audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc           â         charger           ti,twl4030-bci           â   	           «   í        ¹   î           Åvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         ° 	'À        È        regulator-vdac            ti,twl4030-vdac         ° w@        È w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            ° :�        È 0°         Ú   ö      regulator-vmmc2           ti,twl4030-vmmc2            ° :�        È 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           Ú   ï      regulator-vusb1v8             ti,twl4030-vusb1v8           Ú   ð      regulator-vusb3v1             ti,twl4030-vusb3v1           Ú   í      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            ° w@        È w@      regulator-vsim            ti,twl4030-vsim         ° w@        È -ÆÀ      gpio              ti,twl4030-gpio          {        ‹                                Ö      twl4030-usb           ti,twl4030-usb           â   
           â   ï        ð   ð        þ   í                                Ú  	      pwm           ti,twl4030-pwm                    pwmled            ti,twl4030-pwmled                        Ú        pwrbutton             ti,twl4030-pwrbutton             â         keypad            ti,twl4030-keypad            â           +           ;         madc              ti,twl4030-madc          â           N            Ú   î            i2c@48072000              ti,omap3-i2c             ‡H     €         â   9                     +             íi2c2          	  `disabled          i2c@48060000              ti,omap3-i2c             ‡H     €         â   =                     +             íi2c3            ndefault         |   ñ        A †    eeprom@51             atmel,24c01          ‡   Q        g         lis33de@1d            st,lis33de st,lis3lv02d          ‡           p   ò        {   ó         ‰         ›         ­        ¿   
        Ñ   
        ã   
         õ                                     /         >         M         \        k   x        z   x        ‰   Œ        ˜  &        §  &        ¶  î      	  `disabled             mailbox@48094000              ti,omap3-mailbox             ímailbox          ‡H	@             â           Å           Ñ           ã      mbox-dsp            õ                                         spi@48098000              ti,omap2-mcspi           ‡H	€             â   A                     +             ímcspi1                   @  2      #      $      %      &      '      (      )      *         7tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           ‡H	              â   B                     +             ímcspi2                      2      +      ,      -      .        7tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           ‡H€             â   [                     +             ímcspi3                      2                                7tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           ‡H              â   0                     +             ímcspi4                     2      F      G        7tx0 rx0       1w@480b2000           ti,omap3-1w          ‡H              â   :         íhdq1w         mmc@4809c000              ti,omap3-hsmmc           ‡H	À             â   S         ímmc1                     2      =      >        7tx rx           &   ô        ndefault         |   õ        3   ö        ?         mmc@480b4000              ti,omap3-hsmmc           ‡H@             â   V         ímmc2            2      /      0        7tx rx           ndefault         |   ÷        3   ø        I   ù        ?            V         c      mmc@480ad000              ti,omap3-hsmmc           ‡H
Ð             â   ^         ímmc3            2      M      N        7tx rx         	  `disabled          mmu@480bd400            q              ti,omap2-iommu           ‡HÔ    €         â            ímmu_isp         ~            Ú        mmu@5d000000            q              ti,omap2-iommu           ‡]      €         â            ímmu_iva       	  `disabled          wdt@48314000              ti,omap3-wdt             ‡H1@    €      
   íwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           ‡H@    ÿ         mpu          â      ;   <        Žcommon tx rx            ž   €         ímcbsp1          2                     7tx rx            ‹   ú         ’fck       	  `disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            ‡H
 <   H
 @   H
 D            rev sysc syss           
                          %            ‹   û         ’ick                      +            ÷    H
         rng@0             ti,omap2-rng             ‡                 â   4         mcbsp@49022000            ti,omap3-mcbsp           ‡I     ÿI€    ÿ         mpu sidetone             â      >   ?           Žcommon tx rx sidetone           ž            ímcbsp2 mcbsp2_sidetone          2      !      "        7tx rx            ‹   ü   §         ’fck ick         `okay             Ú        mcbsp@49024000            ti,omap3-mcbsp           ‡I@    ÿI     ÿ         mpu sidetone             â      Y   Z           Žcommon tx rx sidetone           ž   €         ímcbsp3 mcbsp3_sidetone          2                    7tx rx            ‹   ý   ¨         ’fck ick       	  `disabled          mcbsp@49026000            ti,omap3-mcbsp           ‡I`    ÿ         mpu          â      6   7        Žcommon tx rx            ž   €         ímcbsp4          2                    7tx rx            ‹   þ         ’fck         ­          	  `disabled          mcbsp@48096000            ti,omap3-mcbsp           ‡H	`    ÿ         mpu          â      Q   R        Žcommon tx rx            ž   €         ímcbsp5          2                    7tx rx            ‹   ÿ         ’fck       	  `disabled          sham@480c3000             ti,omap3-sham            ísham             ‡H0    d         â   1        2      E        7rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          ‡H1€    H1€   H1€            rev sysc syss           
  '                          %            ‹      ²         ’fck ick                      +            ÷    H1€             ¾         Ò   timer@0           ti,omap3430-timer            ‡       €         ‹            ’fck          â   %         Ý        ì           ü   H         target-module@49032000            ti,sysc-omap2-timer ti,sysc          ‡I     I    I             rev sysc syss           
  '                          %            ‹     ¦         ’fck ick                      +            ÷    I        timer@0           ti,omap3430-timer            ‡                â   &         timer@49034000            ti,omap3430-timer            ‡I@             â   '         ítimer3        timer@49036000            ti,omap3430-timer            ‡I`             â   (         ítimer4        timer@49038000            ti,omap3430-timer            ‡I€             â   )         ítimer5                 timer@4903a000            ti,omap3430-timer            ‡I              â   *         ítimer6                 timer@4903c000            ti,omap3430-timer            ‡IÀ             â   +         ítimer7                 timer@4903e000            ti,omap3430-timer            ‡Ià             â   ,         ítimer8                           timer@49040000            ti,omap3430-timer            ‡I              â   -         ítimer9                  timer@48086000            ti,omap3430-timer            ‡H`             â   .         ítimer10                 timer@48088000            ti,omap3430-timer            ‡H€             â   /         ítimer11                 target-module@48304000            ti,sysc-omap2-timer ti,sysc          ‡H0@    H0@   H0@            rev sysc syss           
  '                          %            ‹     ±         ’fck ick                      +            ÷    H0@       timer@0           ti,omap3430-timer            ‡                â   _         Ý         -         usbhstll@48062000             ti,usbhs-tll             ‡H              â   N         íusb_tll_hs        usbhshost@48064000            ti,usbhs-host            ‡H@             íusb_host_hs                      +             ÷      	  =ehci-phy       usb@48064400              ti,ohci-omap3            ‡HD             â   L         H      usb@48064800              ti,ehci-omap             ‡HH             â   M        `               gpmc@6e000000             ti,omap3430-gpmc             ígpmc             ‡n     Ð         â           2              7rxtx            e           q                        +                                {        ‹         0   ÷        0             +             ,               Ú     nand@0,0              ti,omap2-nand            ‡                               â                       ƒ           ’           ¤bch8            ´            Å            Ó   ,        å   ,        ÷              "           ,        ,   (        ;   6        J   @        Y   R        j   R        {   (        �                         +      partition@0         ¥SPL          ‡             partition@80000         ¥U-Boot           ‡            partition@1c0000            ¥Environment          ‡ $           partition@280000            ¥Kernel           ‡ (   €        partition@780000            ¥Filesystem           ‡ ¨               ethernet@gpmc             smsc,lan9221 smsc,lan9115           «           ¶            Å            Ó   *        å   $        ÷                                 È            ;   *        Ö            ,   $        Y   <        j   6        J   $        ä            þ            	            �           {   *         	/         	I        	c          	s          	�            	Ž         ‡          ÿ                    â            ethernet@4,0              smsc,lan9221 smsc,lan9115           «           ¶            Å            Ó   *        å   $        ÷                                 È            ;   *        Ö            ,   $        Y   <        j   6        J   $        ä            þ            	            �           {   *         	/         	I        	c          	s          	�            	Ž         ‡          ÿ                    â               target-module@480ab000            ti,sysc-omap2 ti,sysc            ‡H
´    H
´   H
´            rev sysc syss           
           6                                    %            ’fck                      +            ÷    H
°             ‹   �   usb@0             ti,omap3-musb            ‡                â   \   ]        Žmc dma          	¤           	¯           	·           	À            	Ï  	        `  	      	  	×usb2-phy                       	á   2         dss@48050000              ti,omap3-dss             ‡H           	  `disabled          	   ídss_core             ‹   ·         ’fck                      +             ÷   dispc@48050400            ti,omap3-dispc           ‡H             â         
   ídss_dispc            ‹   ·         ’fck       encoder@4804fc00              ti,omap3-dsi             ‡Hü    Hþ    @Hÿ              proto phy pll            â         	  `disabled          	   ídss_dsi1             ‹   ·   ¶         ’fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            ‡H          	  `disabled          	   ídss_rfbi             ‹   ·   ¸         ’fck ick       encoder@48050c00              ti,omap3-venc            ‡H          	  `disabled          	   ídss_venc             ‹   ´   µ         ’fck tv_dac_clk           ssi-controller@48058000           ti,omap3-ssi             íssi         `okay             ‡H€    H�             sys gdd          â   G        Žgdd_mpu                      +             ÷         ‹   €  
            ’ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            ‡H     H¨             tx rx            â   C   D      ssi-port@4805b000             ti,omap3-ssi-port            ‡H°    H¸             tx rx            â   E   F         serial@49042000           ti,omap3-uart            ‡I              â   P        2      Q      R        7tx rx            íuart4           AÜl       regulator-abb-mpu         
    ti,abb-v1           ¡abb_mpu_iva                       +             ‡H0rð   H0h            base-address int-address            	ç            ‹   "        
            
         `  
! s                     O€                     7È                     û                            Ú         pinmux@480025a0            ti,omap3-padconf pinctrl-single          ‡H %    \                     +             þ                               3           Q  ÿ        ndefault         |     hsusb2-2-pins         0  †   P      R      T     V     X     Z           Ú        w3cbw003c-2-pins            †   @            Ú           isp@480bc000              ti,omap3-isp             ‡HÀ   üHØ             â           
-          š     ð        
4           à      ports                        +             bandgap@48002524             ‡H %$             ti,omap36xx-bandgap         
@             Ú        target-module@480cb000            ti,sysc-omap3630-sr ti,sysc          ísmartreflex_core             ‡H°8            sysc            
                              ‹           ’fck                      +            ÷    H°       smartreflex@0             ti,omap3-smartreflex-core            ‡                â            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc          ísmartreflex_mpu_iva          ‡H�8            sysc            
                              ‹           ’fck                      +            ÷    H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             ‡                â            target-module@50000000            ti,sysc-omap4 ti,sysc            ‡P þ    P þ         	   rev sysc            6                                     ‹     ã         ’fck ick                      +            ÷    P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           ‡                â               opp-table             operating-points-v2-ti-cpu          š            Ú      opp-50-300000000            
V    á£         
] s s s s s s        
kÿÿÿÿ            
|      opp-100-600000000           
V    #ÃF         
] O€ O€ O€ O€ O€ O€        
kÿÿÿÿ         opp-130-800000000           
V    /¯         
] 7È 7È 7È 7È 7È 7È        
kÿÿÿÿ         opp-1000000000          
V    ;šÊ         
] û û û û û û        
kÿÿÿÿ            
ˆ         opp-supply            ti,omap-opp-supply          
“ û      thermal-zones      cpu-thermal         
®   ú        
Ä  è        
Ò      N         
ß     trips      cpu_alert           
ï 8€        
û  Ð         ‚passive          Ú        cpu_crit            
ï _�        
û  Ð      	   ‚critical             cooling-maps       map0                        ÿÿÿÿÿÿÿÿ               memory@0             {memory           ‡              led-controller        	    pwm-leds       led-1           ¥overo:blue:COM                w5”                   .mmc0             sound             ti,omap-twl4030         Dovero           M        hsusb2_power_reg              regulator-fixed         ¡hsusb2_vbus         ° LK@        È LK@        V                 [ p         l         Ú        hsusb2-phy-pins           usb-nop-xceiv                           ‹                       Ú        regulator-w3cbw003c-npoweron              regulator-fixed         ¡regulator-w3cbw003c-npoweron            ° 2Z         È 2Z         V                  l         Ú   ø      regulator-w3cbw003c-wifi-nreset         ndefault         |              regulator-fixed          ¡regulator-w3cbw003c-wifi-nreset         ° 2Z         È 2Z         V                 [  '         Ú   ù      lis33-3v3-reg             regulator-fixed         ¡lis33-3v3-reg           ° 2Z         È 2Z          Ú   ó      lis33-1v8-reg             regulator-fixed         ¡lis33-1v8-reg           ° w@        È w@         Ú   ò      regulator-vddvario            regulator-fixed       	  ¡vddvario             –         Ú        regulator-vdd33a              regulator-fixed         ¡vdd33a           –         Ú           	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended bci3v1-supply io-channels io-channel-names ti,use-leds usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells status pagesize Vdd-supply Vdd_IO-supply st,click-single-x st,click-single-y st,click-single-z st,click-thresh-x st,click-thresh-y st,click-thresh-z st,irq1-click st,irq2-click st,wakeup-x-lo st,wakeup-x-hi st,wakeup-y-lo st,wakeup-y-hi st,wakeup-z-lo st,wakeup-z-hi st,min-limit-x st,min-limit-y st,min-limit-z st,max-limit-x st,max-limit-y st,max-limit-z #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply bus-width vqmmc-supply cap-sdio-irq non-removable #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-off-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns label bank-width gpmc,mux-add-data gpmc,oe-on-ns gpmc,we-on-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address multipoint num-eps ram-bits interface-type usb-phy phy-names power ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device pwms max-brightness linux,default-trigger ti,model ti,mcbsp gpio startup-delay-us enable-active-high reset-gpios vcc-supply regulator-always-on 