Ðþí    8  L   (            À                               %    lg,omap3-sniper ti,omap3630 ti,omap3                                     +            7LG Optimus Black       chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/ocp@68000000/serial@49042000         cpus                         +       cpu@0             arm,cortex-a8            {cpu          ‡             ‹            ’cpu          ž “à         ¬            À            Ë            Ú            æ           pmu@54000000              arm,cortex-a8-pmu            ‡T    €           î            ùdebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ùmpu       iva       
    ti,iva2.2            ùiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           ‡h               î   	   
                     +                     ùl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus          ‡                             +                          pinmux@30              ti,omap3-padconf pinctrl-single          ‡   0  8                     +            
                       *        ?           ]  ÿ        zdefault          æ   ç   uart3-pins          ˆ  n     p             æ   è      dp3t-sel-pins           ˆ  f     h            æ   é      i2c1-pins           ˆ  Š     Œ            æ   ê      i2c2-pins           ˆ  Ž     �            æ   ñ      i2c3-pins           ˆ  ’     ”            æ   ò      lp8720-en-pins          ˆ   P            æ   ó      mmc1-pins         0  ˆ                                       æ   ö      mmc2-pins         P  ˆ  (     *     ,     .     0     2     4     6     8     :            æ   ú      usb-otg-hs-pins       `  ˆ  r     t      v     x     z     |     ~     €     ‚     „     †     ˆ            æ        twl4030-pins            ˆ  °  A         æ   ë         scm_conf@270              syscon simple-bus            ‡  p  0                     +                 p  0         æ      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             ‡  °           œ      pbias_mmc_omap2430          £pbias_mmc_omap2430          ² w@        Ê -ÆÀ         æ   õ         clocks                       +       clock@68          
    ti,clksel            ‡   h        â                        +       clock-mcbsp5-mux-fck@4           ‡           â              ti,composite-mux-clock          ïmcbsp5_mux_fck           ‹               æ         clock-mcbsp3-mux-fck@0           ‡            â              ti,composite-mux-clock          ïmcbsp3_mux_fck           ‹   	            æ         clock-mcbsp4-mux-fck@2           ‡           â              ti,composite-mux-clock          ïmcbsp4_mux_fck           ‹   	            æ            mcbsp5_fck          â              ti,composite-clock           ‹   
            æ        clock@4       
    ti,clksel            ‡           â                        +       clock-mcbsp1-mux-fck@2           ‡           â              ti,composite-mux-clock          ïmcbsp1_mux_fck           ‹               æ         clock-mcbsp2-mux-fck@6           ‡           â              ti,composite-mux-clock          ïmcbsp2_mux_fck           ‹   	            æ            mcbsp1_fck          â              ti,composite-clock           ‹               æ   ü      mcbsp2_fck          â              ti,composite-clock           ‹               æ   þ      mcbsp3_fck          â              ti,composite-clock           ‹               æ   ÿ      mcbsp4_fck          â              ti,composite-clock           ‹               æ               clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          ‡  
    \                     +            
                       *        ?           ]  ÿ        zdefault    mmc1-cd-pins            ˆ              æ   ÷      twl4030-vpins-pins           ˆ                                    æ   ì               target-module@480a6000            ti,sysc-omap2 ti,sysc            ‡H
`D   H
`H   H
`L           rev sysc syss                                        '            ‹            ’ick                      +               H
`        aes1@0            ti,omap3-aes             ‡       P         î            4      	      
        9tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            ‡HPD   HPH   HPL           rev sysc syss                                        '            ‹            ’ick                      +               HP        aes2@0            ti,omap3-aes             ‡       P         î            4      A      B        9tx rx            prm@48306000              ti,omap3-prm             ‡H0`   @          î      clocks                       +       virt_16_8m_ck           â              fixed-clock         C Y          æ         osc_sys_ck@d40          â              ti,mux-clock             ‹                           ‡  @         æ         sys_ck@1270         â              ti,divider-clock             ‹           S           `            ‡  p         k         æ   "      sys_clkout1@d70         â              ti,gate-clock            ‹            ‡  p        S         dpll3_x2_ck         â              fixed-factor-clock           ‹           ‚           �         dpll3_m2x2_ck           â              fixed-factor-clock           ‹           ‚           �            æ   !      dpll4_x2_ck         â              fixed-factor-clock           ‹            ‚           �         corex2_fck          â              fixed-factor-clock           ‹   !        ‚           �            æ   #      wkup_l4_ick         â              fixed-factor-clock           ‹   "        ‚           �            æ   b      corex2_d3_fck           â              fixed-factor-clock           ‹   #        ‚           �            æ   Š      corex2_d5_fck           â              fixed-factor-clock           ‹   #        ‚           �            æ   ‹         clockdomains             cm@48004000           ti,omap3-cm          ‡H @   @    clocks                       +       dummy_apb_pclk          â              fixed-clock         C          omap_32k_fck            â              fixed-clock         C  €          æ   H      virt_12m_ck         â              fixed-clock         C ·          æ         virt_13m_ck         â              fixed-clock         C Æ]@         æ         virt_19200000_ck            â              fixed-clock         C$ø          æ         virt_26000000_ck            â              fixed-clock         CŒº€         æ         virt_38_4m_ck           â              fixed-clock         CIð          æ         dpll4_ck@d00            â              ti,omap3-dpll-per-j-type-clock           ‹   "   "         ‡        D  0         æ          dpll4_m2_ck@d48         â              ti,divider-clock             ‹            `   ?         ‡  H         k         æ   $      dpll4_m2x2_mul_ck           â              fixed-factor-clock           ‹   $        ‚           �            æ   %      dpll4_m2x2_ck@d00           â              ti,hsdiv-gate-clock          ‹   %        S            ‡            —         æ   &      omap_96m_alwon_fck          â              fixed-factor-clock           ‹   &        ‚           �            æ   2      dpll3_ck@d00            â              ti,omap3-dpll-core-clock             ‹   "   "         ‡        @  0         æ         clock@1140        
    ti,clksel            ‡  @        â                        +       clock-dpll3-m3@16            ‡           â              ti,divider-clock            ïdpll3_m3_ck          ‹           `            k         æ   ,      clock-dpll4-m6@24            ‡           â              ti,divider-clock            ïdpll4_m6_ck          ‹            `   ?         k         æ   >      clock-emu-src-mux@0          ‡            â              ti,mux-clock            ïemu_src_mux_ck           ‹   "   '   (   )         æ   v      clock-pclk-fck@8             ‡           â              ti,divider-clock          	  ïpclk_fck             ‹   *        `            k      clock-pclkx2-fck@6           ‡           â              ti,divider-clock            ïpclkx2_fck           ‹   *        `            k      clock-atclk-fck@4            ‡           â              ti,divider-clock          
  ïatclk_fck            ‹   *        `            k      clock-traceclk-src-fck@2             ‡           â              ti,mux-clock            ïtraceclk_src_fck             ‹   "   '   (   )         æ   +      clock-traceclk-fck@11            ‡           â              ti,divider-clock            ïtraceclk_fck             ‹   +        `            k         dpll3_m3x2_mul_ck           â              fixed-factor-clock           ‹   ,        ‚           �            æ   -      dpll3_m3x2_ck@d00           â              ti,hsdiv-gate-clock          ‹   -        S            ‡            —         æ   .      emu_core_alwon_ck           â              fixed-factor-clock           ‹   .        ‚           �            æ   '      sys_altclk          â              fixed-clock         C             æ   5      mcbsp_clks          â              fixed-clock         C             æ         core_ck         â              fixed-factor-clock           ‹           ‚           �            æ   /      dpll1_fck@940           â              ti,divider-clock             ‹   /        S           `            ‡  	@         k         æ   0      dpll1_ck@904            â              ti,omap3-dpll-clock          ‹   "   0         ‡  	  	$  	@  	4         æ         dpll1_x2_ck         â              fixed-factor-clock           ‹           ‚           �            æ   1      dpll1_x2m2_ck@944           â              ti,divider-clock             ‹   1        `            ‡  	D         k         æ   E      cm_96m_fck          â              fixed-factor-clock           ‹   2        ‚           �            æ   3      clock@d40         
    ti,clksel            ‡  @        â                        +       clock-dpll3-m2@27            ‡           â              ti,divider-clock            ïdpll3_m2_ck          ‹           `            k         æ         clock-omap-96m-fck@6             ‡           â              ti,mux-clock            ïomap_96m_fck             ‹   3   "         æ   Y      clock-omap-54m-fck@5             ‡           â              ti,mux-clock            ïomap_54m_fck             ‹   4   5         æ   A      clock-omap-48m-fck@3             ‡           â              ti,mux-clock            ïomap_48m_fck             ‹   6   5         æ   9         clock@e40         
    ti,clksel            ‡  @        â                        +       clock-dpll4-m3@8             ‡           â              ti,divider-clock            ïdpll4_m3_ck          ‹            `             k         æ   7      clock-dpll4-m4@0             ‡            â              ti,divider-clock            ïdpll4_m4_ck          ‹            `            k         æ   :         dpll4_m3x2_mul_ck           â              fixed-factor-clock           ‹   7        ‚           �            æ   8      dpll4_m3x2_ck@d00           â              ti,hsdiv-gate-clock          ‹   8        S            ‡            —         æ   4      cm_96m_d2_fck           â              fixed-factor-clock           ‹   3        ‚           �            æ   6      omap_12m_fck            â              fixed-factor-clock           ‹   9        ‚           �            æ   Z      dpll4_m4x2_mul_ck           â              ti,fixed-factor-clock            ‹   :        ­           »            È         æ   ;      dpll4_m4x2_ck@d00           â              ti,gate-clock            ‹   ;        S            ‡            —         È         æ   ^      dpll4_m5_ck@f40         â              ti,divider-clock             ‹            `   ?         ‡  @         k         æ   <      dpll4_m5x2_mul_ck           â              ti,fixed-factor-clock            ‹   <        ­           »            È         æ   =      dpll4_m5x2_ck@d00           â              ti,hsdiv-gate-clock          ‹   =        S            ‡            —         È         æ   z      dpll4_m6x2_mul_ck           â              fixed-factor-clock           ‹   >        ‚           �            æ   ?      dpll4_m6x2_ck@d00           â              ti,hsdiv-gate-clock          ‹   ?        S            ‡            —         æ   @      emu_per_alwon_ck            â              fixed-factor-clock           ‹   @        ‚           �            æ   (      clock@d70         
    ti,clksel            ‡  p        â                        +       clock-clkout2-src-gate@7             ‡           â               ti,composite-no-wait-gate-clock         ïclkout2_src_gate_ck          ‹   /         æ   C      clock-clkout2-src-mux@0          ‡            â              ti,composite-mux-clock          ïclkout2_src_mux_ck           ‹   /   "   3   A         æ   D      clock-sys-clkout2@3          ‡           â              ti,divider-clock            ïsys_clkout2          ‹   B        `   @         Û         clkout2_src_ck          â              ti,composite-clock           ‹   C   D         æ   B      mpu_ck          â              fixed-factor-clock           ‹   E        ‚           �            æ   F      arm_fck@924         â              ti,divider-clock             ‹   F         ‡  	$        `         emu_mpu_alwon_ck            â              fixed-factor-clock           ‹   F        ‚           �            æ   )      clock@a40         
    ti,clksel            ‡  
@        â                        +       clock-l3-ick@0           ‡            â              ti,divider-clock            ïl3_ick           ‹   /        `            k         æ   G      clock-l4-ick@2           ‡           â              ti,divider-clock            ïl4_ick           ‹   G        `            k         æ   I      clock-gpt10-mux-fck@6            ‡           â              ti,composite-mux-clock          ïgpt10_mux_fck            ‹   H   "         æ   V      clock-gpt11-mux-fck@7            ‡           â              ti,composite-mux-clock          ïgpt11_mux_fck            ‹   H   "         æ   X      clock-ssi-ssr-div-fck-3430es2@8          ‡           â              ti,composite-divider-clock          ïssi_ssr_div_fck_3430es2          ‹   #      $  ñ                                       æ            clock@c40         
    ti,clksel            ‡  @        â                        +       clock-rm-ick@1           ‡           â              ti,divider-clock            ïrm_ick           ‹   I        `            k      clock-gpt1-mux-fck@0             ‡            â              ti,composite-mux-clock          ïgpt1_mux_fck             ‹   H   "         æ   a      clock-usim-mux-fck@3             ‡           â              ti,composite-mux-clock          ïusim_mux_fck          (   ‹   "   J   K   L   M   N   O   P   Q   R         k         æ   ƒ         clock@a00         
    ti,clksel            ‡  
         â                        +       clock-gpt10-gate-fck@11          ‡           â              ti,composite-gate-clock         ïgpt10_gate_fck           ‹   "         æ   U      clock-gpt11-gate-fck@12          ‡           â              ti,composite-gate-clock         ïgpt11_gate_fck           ‹   "         æ   W      clock-mmchs2-fck@25          ‡           â              ti,wait-gate-clock          ïmmchs2_fck           ‹            æ   ¹      clock-mmchs1-fck@24          ‡           â              ti,wait-gate-clock          ïmmchs1_fck           ‹            æ   º      clock-i2c3-fck@17            ‡           â              ti,wait-gate-clock        	  ïi2c3_fck             ‹            æ   »      clock-i2c2-fck@16            ‡           â              ti,wait-gate-clock        	  ïi2c2_fck             ‹            æ   ¼      clock-i2c1-fck@15            ‡           â              ti,wait-gate-clock        	  ïi2c1_fck             ‹            æ   ½      clock-mcbsp5-gate-fck@10             ‡   
        â              ti,composite-gate-clock         ïmcbsp5_gate_fck          ‹            æ   
      clock-mcbsp1-gate-fck@9          ‡   	        â              ti,composite-gate-clock         ïmcbsp1_gate_fck          ‹            æ         clock-mcspi4-fck@21          ‡           â              ti,wait-gate-clock          ïmcspi4_fck           ‹   S         æ   ¾      clock-mcspi3-fck@20          ‡           â              ti,wait-gate-clock          ïmcspi3_fck           ‹   S         æ   ¿      clock-mcspi2-fck@19          ‡           â              ti,wait-gate-clock          ïmcspi2_fck           ‹   S         æ   À      clock-mcspi1-fck@18          ‡           â              ti,wait-gate-clock          ïmcspi1_fck           ‹   S         æ   Á      clock-uart2-fck@14           ‡           â              ti,wait-gate-clock        
  ïuart2_fck            ‹   S         æ   Â      clock-uart1-fck@13           ‡           â              ti,wait-gate-clock        
  ïuart1_fck            ‹   S         æ   Ã      clock-hdq-fck@22             ‡           â              ti,wait-gate-clock          ïhdq_fck          ‹   T         æ   Ä      clock-modem-fck@31           ‡           â              ti,omap3-interface-clock          
  ïmodem_fck            ‹   "         æ   à      clock-mspro-fck@23           ‡           â              ti,wait-gate-clock        
  ïmspro_fck            ‹         clock-ssi-ssr-gate-fck-3430es2@0             ‡            â               ti,composite-no-wait-gate-clock         ïssi_ssr_gate_fck_3430es2             ‹   #         æ   ~      clock-mmchs3-fck@30          ‡           â              ti,wait-gate-clock          ïmmchs3_fck           ‹            æ   Ü         gpt10_fck           â              ti,composite-clock           ‹   U   V      gpt11_fck           â              ti,composite-clock           ‹   W   X      core_96m_fck            â              fixed-factor-clock           ‹   Y        ‚           �            æ         core_48m_fck            â              fixed-factor-clock           ‹   9        ‚           �            æ   S      core_12m_fck            â              fixed-factor-clock           ‹   Z        ‚           �            æ   T      core_l3_ick         â              fixed-factor-clock           ‹   G        ‚           �            æ   [      clock@a10         
    ti,clksel            ‡  
        â                        +       clock-sdrc-ick@1             ‡           â              ti,wait-gate-clock        	  ïsdrc_ick             ‹   [         æ   Ž      clock-mmchs2-ick@25          ‡           â              ti,omap3-interface-clock            ïmmchs2_ick           ‹   \         æ   Å      clock-mmchs1-ick@24          ‡           â              ti,omap3-interface-clock            ïmmchs1_ick           ‹   \         æ   Æ      clock-hdq-ick@22             ‡           â              ti,omap3-interface-clock            ïhdq_ick          ‹   \         æ   Ç      clock-mcspi4-ick@21          ‡           â              ti,omap3-interface-clock            ïmcspi4_ick           ‹   \         æ   È      clock-mcspi3-ick@20          ‡           â              ti,omap3-interface-clock            ïmcspi3_ick           ‹   \         æ   É      clock-mcspi2-ick@19          ‡           â              ti,omap3-interface-clock            ïmcspi2_ick           ‹   \         æ   Ê      clock-mcspi1-ick@18          ‡           â              ti,omap3-interface-clock            ïmcspi1_ick           ‹   \         æ   Ë      clock-i2c3-ick@17            ‡           â              ti,omap3-interface-clock          	  ïi2c3_ick             ‹   \         æ   Ì      clock-i2c2-ick@16            ‡           â              ti,omap3-interface-clock          	  ïi2c2_ick             ‹   \         æ   Í      clock-i2c1-ick@15            ‡           â              ti,omap3-interface-clock          	  ïi2c1_ick             ‹   \         æ   Î      clock-uart2-ick@14           ‡           â              ti,omap3-interface-clock          
  ïuart2_ick            ‹   \         æ   Ï      clock-uart1-ick@13           ‡           â              ti,omap3-interface-clock          
  ïuart1_ick            ‹   \         æ   Ð      clock-gpt11-ick@12           ‡           â              ti,omap3-interface-clock          
  ïgpt11_ick            ‹   \         æ   Ñ      clock-gpt10-ick@11           ‡           â              ti,omap3-interface-clock          
  ïgpt10_ick            ‹   \         æ   Ò      clock-mcbsp5-ick@10          ‡   
        â              ti,omap3-interface-clock            ïmcbsp5_ick           ‹   \         æ   Ó      clock-mcbsp1-ick@9           ‡   	        â              ti,omap3-interface-clock            ïmcbsp1_ick           ‹   \         æ   Ô      clock-omapctrl-ick@6             ‡           â              ti,omap3-interface-clock            ïomapctrl_ick             ‹   \         æ   Õ      clock-aes2-ick@28            ‡           â              ti,omap3-interface-clock          	  ïaes2_ick             ‹   \         æ         clock-sha12-ick@27           ‡           â              ti,omap3-interface-clock          
  ïsha12_ick            ‹   \         æ   Ö      clock-icr-ick@29             ‡           â              ti,omap3-interface-clock            ïicr_ick          ‹   \      clock-des2-ick@26            ‡           â              ti,omap3-interface-clock          	  ïdes2_ick             ‹   \      clock-mspro-ick@23           ‡           â              ti,omap3-interface-clock          
  ïmspro_ick            ‹   \      clock-mailboxes-ick@7            ‡           â              ti,omap3-interface-clock            ïmailboxes_ick            ‹   \      clock-sad2d-ick@3            ‡           â              ti,omap3-interface-clock          
  ïsad2d_ick            ‹   G         æ   á      clock-hsotgusb-ick-3430es2@4             ‡           â          "    ti,omap3-hsotgusb-interface-clock           ïhsotgusb_ick_3430es2             ‹   [         æ   �      clock-ssi-ick-3430es2@0          ‡            â              ti,omap3-ssi-interface-clock            ïssi_ick_3430es2          ‹   ]         æ        clock-mmchs3-ick@30          ‡           â              ti,omap3-interface-clock            ïmmchs3_ick           ‹   \         æ   Û         gpmc_fck            â              fixed-factor-clock           ‹   [        ‚           �         core_l4_ick         â              fixed-factor-clock           ‹   I        ‚           �            æ   \      clock@e00         
    ti,clksel            ‡           â                        +       clock-dss-tv-fck            â              ti,gate-clock           ïdss_tv_fck           ‹   A        S            æ   ´      clock-dss-96m-fck           â              ti,gate-clock           ïdss_96m_fck          ‹   Y        S            æ   µ      clock-dss2-alwon-fck            â              ti,gate-clock           ïdss2_alwon_fck           ‹   "        S            æ   ¶      clock-dss1-alwon-fck-3430es2@0           ‡            â              ti,dss-gate-clock           ïdss1_alwon_fck_3430es2           ‹   ^         È         æ   ·         dummy_ck            â              fixed-clock         C          clock@c00         
    ti,clksel            ‡           â                        +       clock-gpt1-gate-fck@0            ‡            â              ti,composite-gate-clock         ïgpt1_gate_fck            ‹   "         æ   `      clock-gpio1-dbck@3           ‡           â              ti,gate-clock           ïgpio1_dbck           ‹   _         æ   «      clock-wdt2-fck@5             ‡           â              ti,wait-gate-clock        	  ïwdt2_fck             ‹   _         æ   ¬      clock-sr1-fck@6          ‡           â              ti,wait-gate-clock          ïsr1_fck          ‹   "         æ        clock-sr2-fck@7          ‡           â              ti,wait-gate-clock          ïsr2_fck          ‹   "         æ  
      clock-usim-gate-fck@9            ‡   	        â              ti,composite-gate-clock         ïusim_gate_fck            ‹   Y         æ   ‚         gpt1_fck            â              ti,composite-clock           ‹   `   a         æ        wkup_32k_fck            â              fixed-factor-clock           ‹   H        ‚           �            æ   _      clock@c10         
    ti,clksel            ‡          â                        +       clock-wdt2-ick@5             ‡           â              ti,omap3-interface-clock          	  ïwdt2_ick             ‹   b         æ   ­      clock-wdt1-ick@4             ‡           â              ti,omap3-interface-clock          	  ïwdt1_ick             ‹   b         æ   ®      clock-gpio1-ick@3            ‡           â              ti,omap3-interface-clock          
  ïgpio1_ick            ‹   b         æ   ¯      clock-omap-32ksync-ick@2             ‡           â              ti,omap3-interface-clock            ïomap_32ksync_ick             ‹   b         æ   °      clock-gpt12-ick@1            ‡           â              ti,omap3-interface-clock          
  ïgpt12_ick            ‹   b         æ   ±      clock-gpt1-ick@0             ‡            â              ti,omap3-interface-clock          	  ïgpt1_ick             ‹   b         æ   ²      clock-usim-ick@9             ‡   	        â              ti,omap3-interface-clock          	  ïusim_ick             ‹   b         æ   ³         per_96m_fck         â              fixed-factor-clock           ‹   2        ‚           �            æ   	      per_48m_fck         â              fixed-factor-clock           ‹   9        ‚           �            æ   c      clock@1000        
    ti,clksel            ‡           â                        +       clock-uart3-fck@11           ‡           â              ti,wait-gate-clock        
  ïuart3_fck            ‹   c         æ   �      clock-gpt2-gate-fck@3            ‡           â              ti,composite-gate-clock         ïgpt2_gate_fck            ‹   "         æ   e      clock-gpt3-gate-fck@4            ‡           â              ti,composite-gate-clock         ïgpt3_gate_fck            ‹   "         æ   g      clock-gpt4-gate-fck@5            ‡           â              ti,composite-gate-clock         ïgpt4_gate_fck            ‹   "         æ   i      clock-gpt5-gate-fck@6            ‡           â              ti,composite-gate-clock         ïgpt5_gate_fck            ‹   "         æ   k      clock-gpt6-gate-fck@7            ‡           â              ti,composite-gate-clock         ïgpt6_gate_fck            ‹   "         æ   m      clock-gpt7-gate-fck@8            ‡           â              ti,composite-gate-clock         ïgpt7_gate_fck            ‹   "         æ   o      clock-gpt8-gate-fck@9            ‡   	        â              ti,composite-gate-clock         ïgpt8_gate_fck            ‹   "         æ   q      clock-gpt9-gate-fck@10           ‡   
        â              ti,composite-gate-clock         ïgpt9_gate_fck            ‹   "         æ   s      clock-gpio6-dbck@17          ‡           â              ti,gate-clock           ïgpio6_dbck           ‹   d         æ   ‘      clock-gpio5-dbck@16          ‡           â              ti,gate-clock           ïgpio5_dbck           ‹   d         æ   ’      clock-gpio4-dbck@15          ‡           â              ti,gate-clock           ïgpio4_dbck           ‹   d         æ   “      clock-gpio3-dbck@14          ‡           â              ti,gate-clock           ïgpio3_dbck           ‹   d         æ   ”      clock-gpio2-dbck@13          ‡           â              ti,gate-clock           ïgpio2_dbck           ‹   d         æ   •      clock-wdt3-fck@12            ‡           â              ti,wait-gate-clock        	  ïwdt3_fck             ‹   d         æ   –      clock-mcbsp2-gate-fck@0          ‡            â              ti,composite-gate-clock         ïmcbsp2_gate_fck          ‹            æ         clock-mcbsp3-gate-fck@1          ‡           â              ti,composite-gate-clock         ïmcbsp3_gate_fck          ‹            æ         clock-mcbsp4-gate-fck@2          ‡           â              ti,composite-gate-clock         ïmcbsp4_gate_fck          ‹            æ         clock-uart4-fck@18           ‡           â              ti,wait-gate-clock        
  ïuart4_fck            ‹   c         æ   ª         clock@1040        
    ti,clksel            ‡  @        â                        +       clock-gpt2-mux-fck@0             ‡            â              ti,composite-mux-clock          ïgpt2_mux_fck             ‹   H   "         æ   f      clock-gpt3-mux-fck@1             ‡           â              ti,composite-mux-clock          ïgpt3_mux_fck             ‹   H   "         æ   h      clock-gpt4-mux-fck@2             ‡           â              ti,composite-mux-clock          ïgpt4_mux_fck             ‹   H   "         æ   j      clock-gpt5-mux-fck@3             ‡           â              ti,composite-mux-clock          ïgpt5_mux_fck             ‹   H   "         æ   l      clock-gpt6-mux-fck@4             ‡           â              ti,composite-mux-clock          ïgpt6_mux_fck             ‹   H   "         æ   n      clock-gpt7-mux-fck@5             ‡           â              ti,composite-mux-clock          ïgpt7_mux_fck             ‹   H   "         æ   p      clock-gpt8-mux-fck@6             ‡           â              ti,composite-mux-clock          ïgpt8_mux_fck             ‹   H   "         æ   r      clock-gpt9-mux-fck@7             ‡           â              ti,composite-mux-clock          ïgpt9_mux_fck             ‹   H   "         æ   t         gpt2_fck            â              ti,composite-clock           ‹   e   f         æ        gpt3_fck            â              ti,composite-clock           ‹   g   h      gpt4_fck            â              ti,composite-clock           ‹   i   j      gpt5_fck            â              ti,composite-clock           ‹   k   l      gpt6_fck            â              ti,composite-clock           ‹   m   n      gpt7_fck            â              ti,composite-clock           ‹   o   p      gpt8_fck            â              ti,composite-clock           ‹   q   r      gpt9_fck            â              ti,composite-clock           ‹   s   t      per_32k_alwon_fck           â              fixed-factor-clock           ‹   H        ‚           �            æ   d      per_l4_ick          â              fixed-factor-clock           ‹   I        ‚           �            æ   u      clock@1010        
    ti,clksel            ‡          â                        +       clock-gpio6-ick@17           ‡           â              ti,omap3-interface-clock          
  ïgpio6_ick            ‹   u         æ   —      clock-gpio5-ick@16           ‡           â              ti,omap3-interface-clock          
  ïgpio5_ick            ‹   u         æ   ˜      clock-gpio4-ick@15           ‡           â              ti,omap3-interface-clock          
  ïgpio4_ick            ‹   u         æ   ™      clock-gpio3-ick@14           ‡           â              ti,omap3-interface-clock          
  ïgpio3_ick            ‹   u         æ   š      clock-gpio2-ick@13           ‡           â              ti,omap3-interface-clock          
  ïgpio2_ick            ‹   u         æ   ›      clock-wdt3-ick@12            ‡           â              ti,omap3-interface-clock          	  ïwdt3_ick             ‹   u         æ   œ      clock-uart3-ick@11           ‡           â              ti,omap3-interface-clock          
  ïuart3_ick            ‹   u         æ   �      clock-uart4-ick@18           ‡           â              ti,omap3-interface-clock          
  ïuart4_ick            ‹   u         æ   ž      clock-gpt9-ick@10            ‡   
        â              ti,omap3-interface-clock          	  ïgpt9_ick             ‹   u         æ   Ÿ      clock-gpt8-ick@9             ‡   	        â              ti,omap3-interface-clock          	  ïgpt8_ick             ‹   u         æ          clock-gpt7-ick@8             ‡           â              ti,omap3-interface-clock          	  ïgpt7_ick             ‹   u         æ   ¡      clock-gpt6-ick@7             ‡           â              ti,omap3-interface-clock          	  ïgpt6_ick             ‹   u         æ   ¢      clock-gpt5-ick@6             ‡           â              ti,omap3-interface-clock          	  ïgpt5_ick             ‹   u         æ   £      clock-gpt4-ick@5             ‡           â              ti,omap3-interface-clock          	  ïgpt4_ick             ‹   u         æ   ¤      clock-gpt3-ick@4             ‡           â              ti,omap3-interface-clock          	  ïgpt3_ick             ‹   u         æ   ¥      clock-gpt2-ick@3             ‡           â              ti,omap3-interface-clock          	  ïgpt2_ick             ‹   u         æ   ¦      clock-mcbsp2-ick@0           ‡            â              ti,omap3-interface-clock            ïmcbsp2_ick           ‹   u         æ   §      clock-mcbsp3-ick@1           ‡           â              ti,omap3-interface-clock            ïmcbsp3_ick           ‹   u         æ   ¨      clock-mcbsp4-ick@2           ‡           â              ti,omap3-interface-clock            ïmcbsp4_ick           ‹   u         æ   ©         emu_src_ck          â              ti,clkdm-gate-clock          ‹   v         æ   *      secure_32k_fck          â              fixed-clock         C  €          æ   w      gpt12_fck           â              fixed-factor-clock           ‹   w        ‚           �            æ        wdt1_fck            â              fixed-factor-clock           ‹   w        ‚           �         security_l4_ick2            â              fixed-factor-clock           ‹   I        ‚           �            æ   x      clock@a14         
    ti,clksel            ‡  
        â                        +       clock-aes1-ick@3             ‡           â              ti,omap3-interface-clock          	  ïaes1_ick             ‹   x         æ         clock-rng-ick@2          ‡           â              ti,omap3-interface-clock            ïrng_ick          ‹   x         æ   ý      clock-sha11-ick@1            ‡           â              ti,omap3-interface-clock          
  ïsha11_ick            ‹   x      clock-des1-ick@0             ‡            â              ti,omap3-interface-clock          	  ïdes1_ick             ‹   x      clock-pka-ick@4          ‡           â              ti,omap3-interface-clock            ïpka_ick          ‹   y         clock@f00         
    ti,clksel            ‡           â                        +       clock-cam-mclk@0             ‡            â              ti,gate-clock         	  ïcam_mclk             ‹   z         È      clock-csi2-96m-fck@1             ‡           â              ti,gate-clock           ïcsi2_96m_fck             ‹            æ   Þ         cam_ick@f10         â          !    ti,omap3-no-wait-interface-clock             ‹   I         ‡          S             æ   Ý      security_l3_ick         â              fixed-factor-clock           ‹   G        ‚           �            æ   y      ssi_l4_ick          â              fixed-factor-clock           ‹   I        ‚           �            æ   ]      sr_l4_ick           â              fixed-factor-clock           ‹   I        ‚           �         dpll2_fck@40            â              ti,divider-clock             ‹   /        S           `            ‡   @         k         æ   {      dpll2_ck@4          â              ti,omap3-dpll-clock          ‹   "   {         ‡      $   @   4         ý                           æ   |      dpll2_m2_ck@44          â              ti,divider-clock             ‹   |        `            ‡   D         k         æ   }      iva2_ck@0           â              ti,wait-gate-clock           ‹   }         ‡            S             æ   ß      clock@a18         
    ti,clksel            ‡  
        â                       +             +       clock-mad2d-ick@3            ‡           â              ti,omap3-interface-clock          
  ïmad2d_ick            ‹   G         æ   â      clock-usbtll-ick@2           ‡           â              ti,omap3-interface-clock            ïusbtll_ick           ‹   \         æ   Ú         ssi_ssr_fck_3430es2         â              ti,composite-clock           ‹   ~            æ   €      ssi_sst_fck_3430es2         â              fixed-factor-clock           ‹   €        ‚           �            æ        sys_d2_ck           â              fixed-factor-clock           ‹   "        ‚           �            æ   J      omap_96m_d2_fck         â              fixed-factor-clock           ‹   Y        ‚           �            æ   K      omap_96m_d4_fck         â              fixed-factor-clock           ‹   Y        ‚           �            æ   L      omap_96m_d8_fck         â              fixed-factor-clock           ‹   Y        ‚           �            æ   M      omap_96m_d10_fck            â              fixed-factor-clock           ‹   Y        ‚           �   
         æ   N      dpll5_m2_d4_ck          â              fixed-factor-clock           ‹   �        ‚           �            æ   O      dpll5_m2_d8_ck          â              fixed-factor-clock           ‹   �        ‚           �            æ   P      dpll5_m2_d16_ck         â              fixed-factor-clock           ‹   �        ‚           �            æ   Q      dpll5_m2_d20_ck         â              fixed-factor-clock           ‹   �        ‚           �            æ   R      usim_fck            â              ti,composite-clock           ‹   ‚   ƒ      dpll5_ck@d04            â              ti,omap3-dpll-clock          ‹   "   "         ‡    $  L  4         ý                  æ   „      dpll5_m2_ck@d50         â              ti,divider-clock             ‹   „        `            ‡  P         k         æ   �      sgx_gate_fck@b00            â              ti,composite-gate-clock          ‹   /        S            ‡            æ   Œ      core_d3_ck          â              fixed-factor-clock           ‹   /        ‚           �            æ   …      core_d4_ck          â              fixed-factor-clock           ‹   /        ‚           �            æ   †      core_d6_ck          â              fixed-factor-clock           ‹   /        ‚           �            æ   ‡      omap_192m_alwon_fck         â              fixed-factor-clock           ‹   &        ‚           �            æ   ˆ      core_d2_ck          â              fixed-factor-clock           ‹   /        ‚           �            æ   ‰      sgx_mux_fck@b40         â              ti,composite-mux-clock            ‹   …   †   ‡   3   ˆ   ‰   Š   ‹         ‡  @         æ   �      sgx_fck         â              ti,composite-clock           ‹   Œ   �         æ        sgx_ick@b10         â              ti,wait-gate-clock           ‹   G         ‡          S             æ   ã      cpefuse_fck@a08         â              ti,gate-clock            ‹   "         ‡  
        S             æ   ×      ts_fck@a08          â              ti,gate-clock            ‹   H         ‡  
        S            æ   Ø      usbtll_fck@a08          â              ti,wait-gate-clock           ‹   �         ‡  
        S            æ   Ù      dss_ick_3430es2@e10         â              ti,omap3-dss-interface-clock             ‹   I         ‡          S             æ   ¸      usbhost_120m_fck@1400           â              ti,gate-clock            ‹   �         ‡           S            æ   ä      usbhost_48m_fck@1400            â              ti,dss-gate-clock            ‹   9         ‡           S             æ   å      usbhost_ick@1410            â              ti,omap3-dss-interface-clock             ‹   I         ‡          S             æ   æ         clockdomains       core_l3_clkdm             ti,clockdomain           ‹   Ž   �      dpll3_clkdm           ti,clockdomain           ‹         dpll1_clkdm           ti,clockdomain           ‹         per_clkdm             ti,clockdomain        l   ‹   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨   ©   ª      emu_clkdm             ti,clockdomain           ‹   *      dpll4_clkdm           ti,clockdomain           ‹          wkup_clkdm            ti,clockdomain        $   ‹   «   ¬   ­   ®   ¯   °   ±   ²   ³      dss_clkdm             ti,clockdomain           ‹   ´   µ   ¶   ·   ¸      core_l4_clkdm             ti,clockdomain        ”   ‹   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó   Ô   Õ      Ö   ×   Ø   Ù   Ú   Û   Ü      cam_clkdm             ti,clockdomain           ‹   Ý   Þ      iva2_clkdm            ti,clockdomain           ‹   ß      dpll2_clkdm           ti,clockdomain           ‹   |      d2d_clkdm             ti,clockdomain           ‹   à   á   â      dpll5_clkdm           ti,clockdomain           ‹   „      sgx_clkdm             ti,clockdomain           ‹   ã      usbhost_clkdm             ti,clockdomain           ‹   ä   å   æ            target-module@48320000            ti,sysc-omap2 ti,sysc            ‡H2     H2          	  rev sysc                            ‹   _   °         ’fck ick                      +               H2        counter@0             ti,omap-counter32k           ‡                 interrupt-controller@48200000             ti,omap3-intc            *                    ‡H               æ         target-module@48056000            ti,sysc-omap2 ti,sysc            ‡H`    H`,   H`(           rev sysc syss             #        8                                    '            ‹   [         ’ick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma            ‡                î                    F           Q            ^   `         æ            gpio@48310000             ti,omap3-gpio            ‡H1              î            ùgpio1            k         }        �            *                    æ   ù      gpio@49050000             ti,omap3-gpio            ‡I              î            ùgpio2            }        �            *                    ™         æ   ô      gpio@49052000             ti,omap3-gpio            ‡I              î            ùgpio3            }        �            *                 gpio@49054000             ti,omap3-gpio            ‡I@             î             ùgpio4            }        �            *                 gpio@49056000             ti,omap3-gpio            ‡I`             î   !         ùgpio5            }        �            *                    ™      gpio@49058000             ti,omap3-gpio            ‡I€             î   "         ùgpio6            }        �            *                    ™      serial@4806a000           ti,omap3-uart            ‡H              ­      H        4      1      2        9tx rx            ùuart1           CÜl       serial@4806c000           ti,omap3-uart            ‡HÀ            ­      I        4      3      4        9tx rx            ùuart2           CÜl       serial@49020000           ti,omap3-uart            ‡I             ­      J   ç  n        4      5      6        9tx rx            ùuart3           CÜl         zdefault         Á   è   é      i2c@48070000              ti,omap3-i2c             ‡H     €         î   8                     +             ùi2c1            zdefault         Á   ê        C '¬@   twl@48           ‡   H         î                         ti,twl4030           *                   zdefault         Á   ë   ì   power             ti,twl4030-power             Ë      rtc           ti,twl4030-rtc           î         charger           ti,twl4030-bci           î   	           Û   í        é   î           õvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2            ² *¹€        Ê *¹€               regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         ² 	'À        Ê           æ         regulator-vdac            ti,twl4030-vdac         ² w@        Ê w@               regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            ² :�        Ê 0°      regulator-vmmc2           ti,twl4030-vmmc2            ² :�        Ê 0°         æ   û      regulator-vusb1v5             ti,twl4030-vusb1v5           æ   ï      regulator-vusb1v8             ti,twl4030-vusb1v8           æ   ð      regulator-vusb3v1             ti,twl4030-vusb3v1           æ   í      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            ² w@        Ê w@      regulator-vsim            ti,twl4030-vsim         ² w@        Ê -ÆÀ      gpio              ti,twl4030-gpio          }        �            *                 twl4030-usb           ti,twl4030-usb           î   
              ï        (   ð        6   í        D           M             æ        pwm           ti,twl4030-pwm          X         pwmled            ti,twl4030-pwmled           X         pwrbutton             ti,twl4030-pwrbutton             î         keypad            ti,twl4030-keypad            î           c           s           †   s  r a      madc              ti,twl4030-madc          î           “            æ   î            i2c@48072000              ti,omap3-i2c             ‡H     €         î   9                     +             ùi2c2            zdefault         Á   ñ        C €      i2c@48060000              ti,omap3-i2c             ‡H     €         î   =                     +             ùi2c3            zdefault         Á   ò        C €   lp8720@7d           zdefault         Á   ó      
    ti,lp8720            ‡   }        ¥   ô          ldo1            ² -ÆÀ        Ê -ÆÀ         æ   ø            mailbox@48094000              ti,omap3-mailbox             ùmailbox          ‡H	@             î           ²           ¾           Ð      mbox-dsp            â                    í                    spi@48098000              ti,omap2-mcspi           ‡H	€             î   A                     +             ùmcspi1          ø         @  4      #      $      %      &      '      (      )      *         9tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           ‡H	              î   B                     +             ùmcspi2          ø            4      +      ,      -      .        9tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           ‡H€             î   [                     +             ùmcspi3          ø            4                                9tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           ‡H              î   0                     +             ùmcspi4          ø           4      F      G        9tx0 rx0       1w@480b2000           ti,omap3-1w          ‡H              î   :         ùhdq1w         mmc@4809c000              ti,omap3-hsmmc           ‡H	À             î   S         ùmmc1                     4      =      >        9tx rx              õ        zdefault         Á   ö   ÷            ø        ,   ù   
           5         mmc@480b4000              ti,omap3-hsmmc           ‡H@             î   V         ùmmc2            4      /      0        9tx rx           zdefault         Á   ú            û         ?        5         mmc@480ad000              ti,omap3-hsmmc           ‡H
Ð             î   ^         ùmmc3            4      M      N        9tx rx         	  Pdisabled          mmu@480bd400            W              ti,omap2-iommu           ‡HÔ    €         î            ùmmu_isp         d            æ  	      mmu@5d000000            W              ti,omap2-iommu           ‡]      €         î            ùmmu_iva       	  Pdisabled          wdt@48314000              ti,omap3-wdt             ‡H1@    €      
   ùwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           ‡H@    ÿ        mpu          î      ;   <        tcommon tx rx            „   €         ùmcbsp1          4                     9tx rx            ‹   ü         ’fck       	  Pdisabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            ‡H
 <   H
 @   H
 D           rev sysc syss                                     '            ‹   ý         ’ick                      +               H
         rng@0             ti,omap2-rng             ‡                 î   4         mcbsp@49022000            ti,omap3-mcbsp           ‡I     ÿI€    ÿ        mpu sidetone             î      >   ?           tcommon tx rx sidetone           „            ùmcbsp2 mcbsp2_sidetone          4      !      "        9tx rx            ‹   þ   §         ’fck ick       	  Pdisabled          mcbsp@49024000            ti,omap3-mcbsp           ‡I@    ÿI     ÿ        mpu sidetone             î      Y   Z           tcommon tx rx sidetone           „   €         ùmcbsp3 mcbsp3_sidetone          4                    9tx rx            ‹   ÿ   ¨         ’fck ick       	  Pdisabled          mcbsp@49026000            ti,omap3-mcbsp           ‡I`    ÿ        mpu          î      6   7        tcommon tx rx            „   €         ùmcbsp4          4                    9tx rx            ‹            ’fck         “          	  Pdisabled          mcbsp@48096000            ti,omap3-mcbsp           ‡H	`    ÿ        mpu          î      Q   R        tcommon tx rx            „   €         ùmcbsp5          4                    9tx rx            ‹           ’fck       	  Pdisabled          sham@480c3000             ti,omap3-sham            ùsham             ‡H0    d         î   1        4      E        9rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          ‡H1€    H1€   H1€           rev sysc syss             '                          '            ‹     ²         ’fck ick                      +               H1€             ™         ¤   timer@0           ti,omap3430-timer            ‡       €         ‹           ’fck          î   %         ¯        ¾          Î   H         target-module@49032000            ti,sysc-omap2-timer ti,sysc          ‡I     I    I            rev sysc syss             '                          '            ‹     ¦         ’fck ick                      +               I        timer@0           ti,omap3430-timer            ‡                î   &         timer@49034000            ti,omap3430-timer            ‡I@             î   '         ùtimer3        timer@49036000            ti,omap3430-timer            ‡I`             î   (         ùtimer4        timer@49038000            ti,omap3430-timer            ‡I€             î   )         ùtimer5           å      timer@4903a000            ti,omap3430-timer            ‡I              î   *         ùtimer6           å      timer@4903c000            ti,omap3430-timer            ‡IÀ             î   +         ùtimer7           å      timer@4903e000            ti,omap3430-timer            ‡Ià             î   ,         ùtimer8           ò         å      timer@49040000            ti,omap3430-timer            ‡I              î   -         ùtimer9           ò      timer@48086000            ti,omap3430-timer            ‡H`             î   .         ùtimer10          ò      timer@48088000            ti,omap3430-timer            ‡H€             î   /         ùtimer11          ò      target-module@48304000            ti,sysc-omap2-timer ti,sysc          ‡H0@    H0@   H0@           rev sysc syss             '                          '            ‹     ±         ’fck ick                      +               H0@       timer@0           ti,omap3430-timer            ‡                î   _         ¯         ÿ         usbhstll@48062000             ti,usbhs-tll             ‡H              î   N         ùusb_tll_hs        usbhshost@48064000            ti,usbhs-host            ‡H@             ùusb_host_hs                      +               usb@48064400              ti,ohci-omap3            ‡HD             î   L               usb@48064800              ti,ehci-omap             ‡HH             î   M         gpmc@6e000000             ti,omap3430-gpmc             ùgpmc             ‡n     Ð         î           4              9rxtx            '           3                        +            *                    }        �         target-module@480ab000            ti,sysc-omap2 ti,sysc            ‡H
´    H
´   H
´           rev sysc syss                      8                                    '            ’fck                      +               H
°             ‹   �   usb@0             ti,omap3-musb            ‡                î   \   ]        tmc dma          E           P           X           zdefault         Á          a            p          x        	  }usb2-phy            H           ‡   2         dss@48050000              ti,omap3-dss             ‡H           	  Pdisabled          	   ùdss_core             ‹   ·         ’fck                      +               dispc@48050400            ti,omap3-dispc           ‡H             î         
   ùdss_dispc            ‹   ·         ’fck       encoder@4804fc00              ti,omap3-dsi             ‡Hü    Hþ    @Hÿ             proto phy pll            î         	  Pdisabled          	   ùdss_dsi1             ‹   ·   ¶         ’fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            ‡H          	  Pdisabled          	   ùdss_rfbi             ‹   ·   ¸         ’fck ick       encoder@48050c00              ti,omap3-venc            ‡H          	  Pdisabled          	   ùdss_venc             ‹   ´   µ         ’fck tv_dac_clk           ssi-controller@48058000           ti,omap3-ssi             ùssi         Pokay             ‡H€    H�            sys gdd          î   G        tgdd_mpu                      +                     ‹   €              ’ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            ‡H     H¨            tx rx            î   C   D      ssi-port@4805b000             ti,omap3-ssi-port            ‡H°    H¸            tx rx            î   E   F         serial@49042000           ti,omap3-uart            ‡I              î   P        4      Q      R        9tx rx            ùuart4           CÜl       regulator-abb-mpu         
    ti,abb-v1           £abb_mpu_iva                       +             ‡H0rð   H0h           base-address int-address            �            ‹   "        ¦           ·         `  Ç s                     O€                     7È                     û                            æ         pinmux@480025a0            ti,omap3-padconf pinctrl-single          ‡H %    \                     +            
                       *        ?           ]  ÿ      isp@480bc000              ti,omap3-isp             ‡HÀ   üHØ             î           Ó  	        œ     ð        Ú           â      ports                        +             bandgap@48002524             ‡H %$             ti,omap36xx-bandgap         æ             æ        target-module@480cb000            ti,sysc-omap3630-sr ti,sysc          ùsmartreflex_core             ‡H°8           sysc                                          ‹  
         ’fck                      +               H°       smartreflex@0             ti,omap3-smartreflex-core            ‡                î            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc          ùsmartreflex_mpu_iva          ‡H�8           sysc                                          ‹           ’fck                      +               H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             ‡                î            target-module@50000000            ti,sysc-omap4 ti,sysc            ‡P þ    P þ         	  rev sysc            8                                     ‹     ã         ’fck ick                      +               P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           ‡                î               opp-table             operating-points-v2-ti-cpu          œ            æ      opp-50-300000000            ü    á£          s s s s s s        ÿÿÿÿ            "      opp-100-600000000           ü    #ÃF          O€ O€ O€ O€ O€ O€        ÿÿÿÿ         opp-130-800000000           ü    /¯          7È 7È 7È 7È 7È 7È        ÿÿÿÿ         opp-1000000000          ü    ;šÊ          û û û û û û        ÿÿÿÿ            .         opp-supply            ti,omap-opp-supply          9 û      thermal-zones      cpu-thermal         T   ú        j  è        x      N         …     trips      cpu_alert           • 8€        ¡  Ð         ‚passive          æ        cpu_crit            • _�        ¡  Ð      	   ‚critical             cooling-maps       map0            ¬          ±  ÿÿÿÿÿÿÿÿ               memory@80000000          {memory           ‡€                	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells ti,no-reset-on-init interrupts-extended pinctrl-0 ti,use_poweroff bci3v1-supply io-channels io-channel-names regulator-always-on usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns linux,keymap #io-channel-cells enable-gpios #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply cd-gpios bus-width ti,non-removable status #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure remote-wakeup-connected gpmc,num-cs gpmc,num-waitpins multipoint num-eps ram-bits interface-type usb-phy phys phy-names power ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device 