Ðþí ß   8  ÿ8   (            §  ÿ                              %    ti,omap3430-sdp ti,omap3430 ti,omap3                                     +            7TI OMAP3430 SDP    chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000         cpus                         +       cpu@0             arm,cortex-a8            scpu                       ƒ            Šcpu          – “à         ¤            ¸            Ç   ÿ         pmu@54000000              arm,cortex-a8-pmu            T    €           Ï            Údebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             Úmpu       iva       
    ti,iva2.2            Úiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h               Ï   	   
                     +             ä         Úl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +            ä    H         scm@2000              ti,omap3-scm simple-bus                                       +            ä               pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +             ë            ú                                >  ÿ   twl4030-pins            [  °  A         Ç   ä         scm_conf@270              syscon simple-bus              p  0                     +            ä      p  0         Ç      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap               °           o      pbias_mmc_omap2430          vpbias_mmc_omap2430          … w@        � -ÆÀ         Ç   ê         clocks                       +       clock@68          
    ti,clksel               h        µ                        +       clock-mcbsp5-mux-fck@4                      µ              ti,composite-mux-clock          Âmcbsp5_mux_fck           ƒ               Ç   	      clock-mcbsp3-mux-fck@0                       µ              ti,composite-mux-clock          Âmcbsp3_mux_fck           ƒ               Ç         clock-mcbsp4-mux-fck@2                      µ              ti,composite-mux-clock          Âmcbsp4_mux_fck           ƒ               Ç            mcbsp5_fck          µ              ti,composite-clock           ƒ      	         Ç   ò      clock@4       
    ti,clksel                       µ                        +       clock-mcbsp1-mux-fck@2                      µ              ti,composite-mux-clock          Âmcbsp1_mux_fck           ƒ               Ç         clock-mcbsp2-mux-fck@6                      µ              ti,composite-mux-clock          Âmcbsp2_mux_fck           ƒ               Ç            mcbsp1_fck          µ              ti,composite-clock           ƒ   
            Ç   í      mcbsp2_fck          µ              ti,composite-clock           ƒ               Ç   ï      mcbsp3_fck          µ              ti,composite-clock           ƒ               Ç   ð      mcbsp4_fck          µ              ti,composite-clock           ƒ               Ç   ñ            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +             ë            ú                                >  ÿ   twl4030-vpins-pins           [                                    Ç   å               target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           Õrev sysc syss           ß           ì                  ú            ƒ            Šick                      +            ä    H
`        aes1@0            ti,omap3-aes                    P         Ï                  	      
        tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           Õrev sysc syss           ß           ì                  ú            ƒ            Šick                      +            ä    HP        aes2@0            ti,omap3-aes                    P         Ï                  A      B        tx rx            prm@48306000              ti,omap3-prm             H0`   @          Ï      clocks                       +       virt_16_8m_ck           µ              fixed-clock          Y          Ç         osc_sys_ck@d40          µ              ti,mux-clock             ƒ                             @         Ç         sys_ck@1270         µ              ti,divider-clock             ƒ           &           3              p         >         Ç          sys_clkout1@d70         µ              ti,gate-clock            ƒ              p        &         dpll3_x2_ck         µ              fixed-factor-clock           ƒ           U           `         dpll3_m2x2_ck           µ              fixed-factor-clock           ƒ           U           `            Ç         dpll4_x2_ck         µ              fixed-factor-clock           ƒ           U           `         corex2_fck          µ              fixed-factor-clock           ƒ           U           `            Ç   !      wkup_l4_ick         µ              fixed-factor-clock           ƒ            U           `            Ç   `      corex2_d3_fck           µ              fixed-factor-clock           ƒ   !        U           `            Ç   ˆ      corex2_d5_fck           µ              fixed-factor-clock           ƒ   !        U           `            Ç   ‰         clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk          µ              fixed-clock                   omap_32k_fck            µ              fixed-clock           €          Ç   F      virt_12m_ck         µ              fixed-clock          ·          Ç         virt_13m_ck         µ              fixed-clock          Æ]@         Ç         virt_19200000_ck            µ              fixed-clock         $ø          Ç         virt_26000000_ck            µ              fixed-clock         Œº€         Ç         virt_38_4m_ck           µ              fixed-clock         Ið          Ç         dpll4_ck@d00            µ              ti,omap3-dpll-per-clock          ƒ                         D  0         Ç         dpll4_m2_ck@d48         µ              ti,divider-clock             ƒ           3   ?           H         >         Ç   "      dpll4_m2x2_mul_ck           µ              fixed-factor-clock           ƒ   "        U           `            Ç   #      dpll4_m2x2_ck@d00           µ              ti,gate-clock            ƒ   #        &                        j         Ç   $      omap_96m_alwon_fck          µ              fixed-factor-clock           ƒ   $        U           `            Ç   0      dpll3_ck@d00            µ              ti,omap3-dpll-core-clock             ƒ                         @  0         Ç         clock@1140        
    ti,clksel              @        µ                        +       clock-dpll3-m3@16                       µ              ti,divider-clock            Âdpll3_m3_ck          ƒ           3            >         Ç   *      clock-dpll4-m6@24                       µ              ti,divider-clock            Âdpll4_m6_ck          ƒ           3   ?         >         Ç   <      clock-emu-src-mux@0                      µ              ti,mux-clock            Âemu_src_mux_ck           ƒ       %   &   '         Ç   t      clock-pclk-fck@8                        µ              ti,divider-clock          	  Âpclk_fck             ƒ   (        3            >      clock-pclkx2-fck@6                      µ              ti,divider-clock            Âpclkx2_fck           ƒ   (        3            >      clock-atclk-fck@4                       µ              ti,divider-clock          
  Âatclk_fck            ƒ   (        3            >      clock-traceclk-src-fck@2                        µ              ti,mux-clock            Âtraceclk_src_fck             ƒ       %   &   '         Ç   )      clock-traceclk-fck@11                       µ              ti,divider-clock            Âtraceclk_fck             ƒ   )        3            >         dpll3_m3x2_mul_ck           µ              fixed-factor-clock           ƒ   *        U           `            Ç   +      dpll3_m3x2_ck@d00           µ              ti,gate-clock            ƒ   +        &                        j         Ç   ,      emu_core_alwon_ck           µ              fixed-factor-clock           ƒ   ,        U           `            Ç   %      sys_altclk          µ              fixed-clock                      Ç   3      mcbsp_clks          µ              fixed-clock                      Ç         core_ck         µ              fixed-factor-clock           ƒ           U           `            Ç   -      dpll1_fck@940           µ              ti,divider-clock             ƒ   -        &           3              	@         >         Ç   .      dpll1_ck@904            µ              ti,omap3-dpll-clock          ƒ       .           	  	$  	@  	4         Ç         dpll1_x2_ck         µ              fixed-factor-clock           ƒ           U           `            Ç   /      dpll1_x2m2_ck@944           µ              ti,divider-clock             ƒ   /        3              	D         >         Ç   C      cm_96m_fck          µ              fixed-factor-clock           ƒ   0        U           `            Ç   1      clock@d40         
    ti,clksel              @        µ                        +       clock-dpll3-m2@27                       µ              ti,divider-clock            Âdpll3_m2_ck          ƒ           3            >         Ç         clock-omap-96m-fck@6                        µ              ti,mux-clock            Âomap_96m_fck             ƒ   1             Ç   W      clock-omap-54m-fck@5                        µ              ti,mux-clock            Âomap_54m_fck             ƒ   2   3         Ç   ?      clock-omap-48m-fck@3                        µ              ti,mux-clock            Âomap_48m_fck             ƒ   4   3         Ç   7         clock@e40         
    ti,clksel              @        µ                        +       clock-dpll4-m3@8                        µ              ti,divider-clock            Âdpll4_m3_ck          ƒ           3             >         Ç   5      clock-dpll4-m4@0                         µ              ti,divider-clock            Âdpll4_m4_ck          ƒ           3            >         Ç   8         dpll4_m3x2_mul_ck           µ              fixed-factor-clock           ƒ   5        U           `            Ç   6      dpll4_m3x2_ck@d00           µ              ti,gate-clock            ƒ   6        &                        j         Ç   2      cm_96m_d2_fck           µ              fixed-factor-clock           ƒ   1        U           `            Ç   4      omap_12m_fck            µ              fixed-factor-clock           ƒ   7        U           `            Ç   X      dpll4_m4x2_mul_ck           µ              ti,fixed-factor-clock            ƒ   8        €           Ž            ›         Ç   9      dpll4_m4x2_ck@d00           µ              ti,gate-clock            ƒ   9        &                        j         ›         Ç   \      dpll4_m5_ck@f40         µ              ti,divider-clock             ƒ           3   ?           @         >         Ç   :      dpll4_m5x2_mul_ck           µ              ti,fixed-factor-clock            ƒ   :        €           Ž            ›         Ç   ;      dpll4_m5x2_ck@d00           µ              ti,gate-clock            ƒ   ;        &                        j         ›         Ç   x      dpll4_m6x2_mul_ck           µ              fixed-factor-clock           ƒ   <        U           `            Ç   =      dpll4_m6x2_ck@d00           µ              ti,gate-clock            ƒ   =        &                        j         Ç   >      emu_per_alwon_ck            µ              fixed-factor-clock           ƒ   >        U           `            Ç   &      clock@d70         
    ti,clksel              p        µ                        +       clock-clkout2-src-gate@7                        µ               ti,composite-no-wait-gate-clock         Âclkout2_src_gate_ck          ƒ   -         Ç   A      clock-clkout2-src-mux@0                      µ              ti,composite-mux-clock          Âclkout2_src_mux_ck           ƒ   -       1   ?         Ç   B      clock-sys-clkout2@3                     µ              ti,divider-clock            Âsys_clkout2          ƒ   @        3   @         ®         clkout2_src_ck          µ              ti,composite-clock           ƒ   A   B         Ç   @      mpu_ck          µ              fixed-factor-clock           ƒ   C        U           `            Ç   D      arm_fck@924         µ              ti,divider-clock             ƒ   D           	$        3         emu_mpu_alwon_ck            µ              fixed-factor-clock           ƒ   D        U           `            Ç   '      clock@a40         
    ti,clksel              
@        µ                        +       clock-l3-ick@0                       µ              ti,divider-clock            Âl3_ick           ƒ   -        3            >         Ç   E      clock-l4-ick@2                      µ              ti,divider-clock            Âl4_ick           ƒ   E        3            >         Ç   G      clock-gpt10-mux-fck@6                       µ              ti,composite-mux-clock          Âgpt10_mux_fck            ƒ   F             Ç   T      clock-gpt11-mux-fck@7                       µ              ti,composite-mux-clock          Âgpt11_mux_fck            ƒ   F             Ç   V      clock-ssi-ssr-div-fck-3430es2@8                     µ              ti,composite-divider-clock          Âssi_ssr_div_fck_3430es2          ƒ   !      $  Ä                                       Ç   }         clock@c40         
    ti,clksel              @        µ                        +       clock-rm-ick@1                      µ              ti,divider-clock            Ârm_ick           ƒ   G        3            >      clock-gpt1-mux-fck@0                         µ              ti,composite-mux-clock          Âgpt1_mux_fck             ƒ   F             Ç   _      clock-usim-mux-fck@3                        µ              ti,composite-mux-clock          Âusim_mux_fck          (   ƒ       H   I   J   K   L   M   N   O   P         >         Ç   �         clock@a00         
    ti,clksel              
         µ                        +       clock-gpt10-gate-fck@11                     µ              ti,composite-gate-clock         Âgpt10_gate_fck           ƒ             Ç   S      clock-gpt11-gate-fck@12                     µ              ti,composite-gate-clock         Âgpt11_gate_fck           ƒ             Ç   U      clock-mmchs2-fck@25                     µ              ti,wait-gate-clock          Âmmchs2_fck           ƒ            Ç   ¶      clock-mmchs1-fck@24                     µ              ti,wait-gate-clock          Âmmchs1_fck           ƒ            Ç   ·      clock-i2c3-fck@17                       µ              ti,wait-gate-clock        	  Âi2c3_fck             ƒ            Ç   ¸      clock-i2c2-fck@16                       µ              ti,wait-gate-clock        	  Âi2c2_fck             ƒ            Ç   ¹      clock-i2c1-fck@15                       µ              ti,wait-gate-clock        	  Âi2c1_fck             ƒ            Ç   º      clock-mcbsp5-gate-fck@10                
        µ              ti,composite-gate-clock         Âmcbsp5_gate_fck          ƒ            Ç         clock-mcbsp1-gate-fck@9             	        µ              ti,composite-gate-clock         Âmcbsp1_gate_fck          ƒ            Ç   
      clock-mcspi4-fck@21                     µ              ti,wait-gate-clock          Âmcspi4_fck           ƒ   Q         Ç   »      clock-mcspi3-fck@20                     µ              ti,wait-gate-clock          Âmcspi3_fck           ƒ   Q         Ç   ¼      clock-mcspi2-fck@19                     µ              ti,wait-gate-clock          Âmcspi2_fck           ƒ   Q         Ç   ½      clock-mcspi1-fck@18                     µ              ti,wait-gate-clock          Âmcspi1_fck           ƒ   Q         Ç   ¾      clock-uart2-fck@14                      µ              ti,wait-gate-clock        
  Âuart2_fck            ƒ   Q         Ç   ¿      clock-uart1-fck@13                      µ              ti,wait-gate-clock        
  Âuart1_fck            ƒ   Q         Ç   À      clock-hdq-fck@22                        µ              ti,wait-gate-clock          Âhdq_fck          ƒ   R         Ç   Á      clock-modem-fck@31                      µ              ti,omap3-interface-clock          
  Âmodem_fck            ƒ             Ç   Ý      clock-mspro-fck@23                      µ              ti,wait-gate-clock        
  Âmspro_fck            ƒ         clock-ssi-ssr-gate-fck-3430es2@0                         µ               ti,composite-no-wait-gate-clock         Âssi_ssr_gate_fck_3430es2             ƒ   !         Ç   |      clock-mmchs3-fck@30                     µ              ti,wait-gate-clock          Âmmchs3_fck           ƒ            Ç   Ù         gpt10_fck           µ              ti,composite-clock           ƒ   S   T      gpt11_fck           µ              ti,composite-clock           ƒ   U   V      core_96m_fck            µ              fixed-factor-clock           ƒ   W        U           `            Ç         core_48m_fck            µ              fixed-factor-clock           ƒ   7        U           `            Ç   Q      core_12m_fck            µ              fixed-factor-clock           ƒ   X        U           `            Ç   R      core_l3_ick         µ              fixed-factor-clock           ƒ   E        U           `            Ç   Y      clock@a10         
    ti,clksel              
        µ                        +       clock-sdrc-ick@1                        µ              ti,wait-gate-clock        	  Âsdrc_ick             ƒ   Y         Ç   Œ      clock-mmchs2-ick@25                     µ              ti,omap3-interface-clock            Âmmchs2_ick           ƒ   Z         Ç   Â      clock-mmchs1-ick@24                     µ              ti,omap3-interface-clock            Âmmchs1_ick           ƒ   Z         Ç   Ã      clock-hdq-ick@22                        µ              ti,omap3-interface-clock            Âhdq_ick          ƒ   Z         Ç   Ä      clock-mcspi4-ick@21                     µ              ti,omap3-interface-clock            Âmcspi4_ick           ƒ   Z         Ç   Å      clock-mcspi3-ick@20                     µ              ti,omap3-interface-clock            Âmcspi3_ick           ƒ   Z         Ç   Æ      clock-mcspi2-ick@19                     µ              ti,omap3-interface-clock            Âmcspi2_ick           ƒ   Z         Ç   Ç      clock-mcspi1-ick@18                     µ              ti,omap3-interface-clock            Âmcspi1_ick           ƒ   Z         Ç   È      clock-i2c3-ick@17                       µ              ti,omap3-interface-clock          	  Âi2c3_ick             ƒ   Z         Ç   É      clock-i2c2-ick@16                       µ              ti,omap3-interface-clock          	  Âi2c2_ick             ƒ   Z         Ç   Ê      clock-i2c1-ick@15                       µ              ti,omap3-interface-clock          	  Âi2c1_ick             ƒ   Z         Ç   Ë      clock-uart2-ick@14                      µ              ti,omap3-interface-clock          
  Âuart2_ick            ƒ   Z         Ç   Ì      clock-uart1-ick@13                      µ              ti,omap3-interface-clock          
  Âuart1_ick            ƒ   Z         Ç   Í      clock-gpt11-ick@12                      µ              ti,omap3-interface-clock          
  Âgpt11_ick            ƒ   Z         Ç   Î      clock-gpt10-ick@11                      µ              ti,omap3-interface-clock          
  Âgpt10_ick            ƒ   Z         Ç   Ï      clock-mcbsp5-ick@10             
        µ              ti,omap3-interface-clock            Âmcbsp5_ick           ƒ   Z         Ç   Ð      clock-mcbsp1-ick@9              	        µ              ti,omap3-interface-clock            Âmcbsp1_ick           ƒ   Z         Ç   Ñ      clock-omapctrl-ick@6                        µ              ti,omap3-interface-clock            Âomapctrl_ick             ƒ   Z         Ç   Ò      clock-aes2-ick@28                       µ              ti,omap3-interface-clock          	  Âaes2_ick             ƒ   Z         Ç         clock-sha12-ick@27                      µ              ti,omap3-interface-clock          
  Âsha12_ick            ƒ   Z         Ç   Ó      clock-icr-ick@29                        µ              ti,omap3-interface-clock            Âicr_ick          ƒ   Z      clock-des2-ick@26                       µ              ti,omap3-interface-clock          	  Âdes2_ick             ƒ   Z      clock-mspro-ick@23                      µ              ti,omap3-interface-clock          
  Âmspro_ick            ƒ   Z      clock-mailboxes-ick@7                       µ              ti,omap3-interface-clock            Âmailboxes_ick            ƒ   Z      clock-sad2d-ick@3                       µ              ti,omap3-interface-clock          
  Âsad2d_ick            ƒ   E         Ç   Þ      clock-hsotgusb-ick-3430es2@4                        µ          "    ti,omap3-hsotgusb-interface-clock           Âhsotgusb_ick_3430es2             ƒ   Y         Ç   �      clock-ssi-ick-3430es2@0                      µ              ti,omap3-ssi-interface-clock            Âssi_ick_3430es2          ƒ   [         Ç   ø      clock-mmchs3-ick@30                     µ              ti,omap3-interface-clock            Âmmchs3_ick           ƒ   Z         Ç   Ø         gpmc_fck            µ              fixed-factor-clock           ƒ   Y        U           `         core_l4_ick         µ              fixed-factor-clock           ƒ   G        U           `            Ç   Z      clock@e00         
    ti,clksel                       µ                        +       clock-dss-tv-fck            µ              ti,gate-clock           Âdss_tv_fck           ƒ   ?        &            Ç   ±      clock-dss-96m-fck           µ              ti,gate-clock           Âdss_96m_fck          ƒ   W        &            Ç   ²      clock-dss2-alwon-fck            µ              ti,gate-clock           Âdss2_alwon_fck           ƒ            &            Ç   ³      clock-dss1-alwon-fck-3430es2@0                       µ              ti,dss-gate-clock           Âdss1_alwon_fck_3430es2           ƒ   \         ›         Ç   ´         dummy_ck            µ              fixed-clock                   clock@c00         
    ti,clksel                       µ                        +       clock-gpt1-gate-fck@0                        µ              ti,composite-gate-clock         Âgpt1_gate_fck            ƒ             Ç   ^      clock-gpio1-dbck@3                      µ              ti,gate-clock           Âgpio1_dbck           ƒ   ]         Ç   ¨      clock-wdt2-fck@5                        µ              ti,wait-gate-clock        	  Âwdt2_fck             ƒ   ]         Ç   ©      clock-sr1-fck@6                     µ              ti,wait-gate-clock          Âsr1_fck          ƒ             Ç   û      clock-sr2-fck@7                     µ              ti,wait-gate-clock          Âsr2_fck          ƒ             Ç   ú      clock-usim-gate-fck@9               	        µ              ti,composite-gate-clock         Âusim_gate_fck            ƒ   W         Ç   €         gpt1_fck            µ              ti,composite-clock           ƒ   ^   _         Ç   ó      wkup_32k_fck            µ              fixed-factor-clock           ƒ   F        U           `            Ç   ]      clock@c10         
    ti,clksel                      µ                        +       clock-wdt2-ick@5                        µ              ti,omap3-interface-clock          	  Âwdt2_ick             ƒ   `         Ç   ª      clock-wdt1-ick@4                        µ              ti,omap3-interface-clock          	  Âwdt1_ick             ƒ   `         Ç   «      clock-gpio1-ick@3                       µ              ti,omap3-interface-clock          
  Âgpio1_ick            ƒ   `         Ç   ¬      clock-omap-32ksync-ick@2                        µ              ti,omap3-interface-clock            Âomap_32ksync_ick             ƒ   `         Ç   ­      clock-gpt12-ick@1                       µ              ti,omap3-interface-clock          
  Âgpt12_ick            ƒ   `         Ç   ®      clock-gpt1-ick@0                         µ              ti,omap3-interface-clock          	  Âgpt1_ick             ƒ   `         Ç   ¯      clock-usim-ick@9                	        µ              ti,omap3-interface-clock          	  Âusim_ick             ƒ   `         Ç   °         per_96m_fck         µ              fixed-factor-clock           ƒ   0        U           `            Ç         per_48m_fck         µ              fixed-factor-clock           ƒ   7        U           `            Ç   a      clock@1000        
    ti,clksel                       µ                        +       clock-uart3-fck@11                      µ              ti,wait-gate-clock        
  Âuart3_fck            ƒ   a         Ç   Ž      clock-gpt2-gate-fck@3                       µ              ti,composite-gate-clock         Âgpt2_gate_fck            ƒ             Ç   c      clock-gpt3-gate-fck@4                       µ              ti,composite-gate-clock         Âgpt3_gate_fck            ƒ             Ç   e      clock-gpt4-gate-fck@5                       µ              ti,composite-gate-clock         Âgpt4_gate_fck            ƒ             Ç   g      clock-gpt5-gate-fck@6                       µ              ti,composite-gate-clock         Âgpt5_gate_fck            ƒ             Ç   i      clock-gpt6-gate-fck@7                       µ              ti,composite-gate-clock         Âgpt6_gate_fck            ƒ             Ç   k      clock-gpt7-gate-fck@8                       µ              ti,composite-gate-clock         Âgpt7_gate_fck            ƒ             Ç   m      clock-gpt8-gate-fck@9               	        µ              ti,composite-gate-clock         Âgpt8_gate_fck            ƒ             Ç   o      clock-gpt9-gate-fck@10              
        µ              ti,composite-gate-clock         Âgpt9_gate_fck            ƒ             Ç   q      clock-gpio6-dbck@17                     µ              ti,gate-clock           Âgpio6_dbck           ƒ   b         Ç   �      clock-gpio5-dbck@16                     µ              ti,gate-clock           Âgpio5_dbck           ƒ   b         Ç   �      clock-gpio4-dbck@15                     µ              ti,gate-clock           Âgpio4_dbck           ƒ   b         Ç   ‘      clock-gpio3-dbck@14                     µ              ti,gate-clock           Âgpio3_dbck           ƒ   b         Ç   ’      clock-gpio2-dbck@13                     µ              ti,gate-clock           Âgpio2_dbck           ƒ   b         Ç   “      clock-wdt3-fck@12                       µ              ti,wait-gate-clock        	  Âwdt3_fck             ƒ   b         Ç   ”      clock-mcbsp2-gate-fck@0                      µ              ti,composite-gate-clock         Âmcbsp2_gate_fck          ƒ            Ç         clock-mcbsp3-gate-fck@1                     µ              ti,composite-gate-clock         Âmcbsp3_gate_fck          ƒ            Ç         clock-mcbsp4-gate-fck@2                     µ              ti,composite-gate-clock         Âmcbsp4_gate_fck          ƒ            Ç            clock@1040        
    ti,clksel              @        µ                        +       clock-gpt2-mux-fck@0                         µ              ti,composite-mux-clock          Âgpt2_mux_fck             ƒ   F             Ç   d      clock-gpt3-mux-fck@1                        µ              ti,composite-mux-clock          Âgpt3_mux_fck             ƒ   F             Ç   f      clock-gpt4-mux-fck@2                        µ              ti,composite-mux-clock          Âgpt4_mux_fck             ƒ   F             Ç   h      clock-gpt5-mux-fck@3                        µ              ti,composite-mux-clock          Âgpt5_mux_fck             ƒ   F             Ç   j      clock-gpt6-mux-fck@4                        µ              ti,composite-mux-clock          Âgpt6_mux_fck             ƒ   F             Ç   l      clock-gpt7-mux-fck@5                        µ              ti,composite-mux-clock          Âgpt7_mux_fck             ƒ   F             Ç   n      clock-gpt8-mux-fck@6                        µ              ti,composite-mux-clock          Âgpt8_mux_fck             ƒ   F             Ç   p      clock-gpt9-mux-fck@7                        µ              ti,composite-mux-clock          Âgpt9_mux_fck             ƒ   F             Ç   r         gpt2_fck            µ              ti,composite-clock           ƒ   c   d         Ç   ô      gpt3_fck            µ              ti,composite-clock           ƒ   e   f      gpt4_fck            µ              ti,composite-clock           ƒ   g   h      gpt5_fck            µ              ti,composite-clock           ƒ   i   j      gpt6_fck            µ              ti,composite-clock           ƒ   k   l      gpt7_fck            µ              ti,composite-clock           ƒ   m   n      gpt8_fck            µ              ti,composite-clock           ƒ   o   p      gpt9_fck            µ              ti,composite-clock           ƒ   q   r      per_32k_alwon_fck           µ              fixed-factor-clock           ƒ   F        U           `            Ç   b      per_l4_ick          µ              fixed-factor-clock           ƒ   G        U           `            Ç   s      clock@1010        
    ti,clksel                      µ                        +       clock-gpio6-ick@17                      µ              ti,omap3-interface-clock          
  Âgpio6_ick            ƒ   s         Ç   •      clock-gpio5-ick@16                      µ              ti,omap3-interface-clock          
  Âgpio5_ick            ƒ   s         Ç   –      clock-gpio4-ick@15                      µ              ti,omap3-interface-clock          
  Âgpio4_ick            ƒ   s         Ç   —      clock-gpio3-ick@14                      µ              ti,omap3-interface-clock          
  Âgpio3_ick            ƒ   s         Ç   ˜      clock-gpio2-ick@13                      µ              ti,omap3-interface-clock          
  Âgpio2_ick            ƒ   s         Ç   ™      clock-wdt3-ick@12                       µ              ti,omap3-interface-clock          	  Âwdt3_ick             ƒ   s         Ç   š      clock-uart3-ick@11                      µ              ti,omap3-interface-clock          
  Âuart3_ick            ƒ   s         Ç   ›      clock-uart4-ick@18                      µ              ti,omap3-interface-clock          
  Âuart4_ick            ƒ   s         Ç   œ      clock-gpt9-ick@10               
        µ              ti,omap3-interface-clock          	  Âgpt9_ick             ƒ   s         Ç   �      clock-gpt8-ick@9                	        µ              ti,omap3-interface-clock          	  Âgpt8_ick             ƒ   s         Ç   ž      clock-gpt7-ick@8                        µ              ti,omap3-interface-clock          	  Âgpt7_ick             ƒ   s         Ç   Ÿ      clock-gpt6-ick@7                        µ              ti,omap3-interface-clock          	  Âgpt6_ick             ƒ   s         Ç          clock-gpt5-ick@6                        µ              ti,omap3-interface-clock          	  Âgpt5_ick             ƒ   s         Ç   ¡      clock-gpt4-ick@5                        µ              ti,omap3-interface-clock          	  Âgpt4_ick             ƒ   s         Ç   ¢      clock-gpt3-ick@4                        µ              ti,omap3-interface-clock          	  Âgpt3_ick             ƒ   s         Ç   £      clock-gpt2-ick@3                        µ              ti,omap3-interface-clock          	  Âgpt2_ick             ƒ   s         Ç   ¤      clock-mcbsp2-ick@0                       µ              ti,omap3-interface-clock            Âmcbsp2_ick           ƒ   s         Ç   ¥      clock-mcbsp3-ick@1                      µ              ti,omap3-interface-clock            Âmcbsp3_ick           ƒ   s         Ç   ¦      clock-mcbsp4-ick@2                      µ              ti,omap3-interface-clock            Âmcbsp4_ick           ƒ   s         Ç   §         emu_src_ck          µ              ti,clkdm-gate-clock          ƒ   t         Ç   (      secure_32k_fck          µ              fixed-clock           €          Ç   u      gpt12_fck           µ              fixed-factor-clock           ƒ   u        U           `            Ç   õ      wdt1_fck            µ              fixed-factor-clock           ƒ   u        U           `         security_l4_ick2            µ              fixed-factor-clock           ƒ   G        U           `            Ç   v      clock@a14         
    ti,clksel              
        µ                        +       clock-aes1-ick@3                        µ              ti,omap3-interface-clock          	  Âaes1_ick             ƒ   v         Ç         clock-rng-ick@2                     µ              ti,omap3-interface-clock            Ârng_ick          ƒ   v         Ç   î      clock-sha11-ick@1                       µ              ti,omap3-interface-clock          
  Âsha11_ick            ƒ   v      clock-des1-ick@0                         µ              ti,omap3-interface-clock          	  Âdes1_ick             ƒ   v      clock-pka-ick@4                     µ              ti,omap3-interface-clock            Âpka_ick          ƒ   w         clock@f00         
    ti,clksel                       µ                        +       clock-cam-mclk@0                         µ              ti,gate-clock         	  Âcam_mclk             ƒ   x         ›      clock-csi2-96m-fck@1                        µ              ti,gate-clock           Âcsi2_96m_fck             ƒ            Ç   Û         cam_ick@f10         µ          !    ti,omap3-no-wait-interface-clock             ƒ   G                   &             Ç   Ú      security_l3_ick         µ              fixed-factor-clock           ƒ   E        U           `            Ç   w      ssi_l4_ick          µ              fixed-factor-clock           ƒ   G        U           `            Ç   [      sr_l4_ick           µ              fixed-factor-clock           ƒ   G        U           `         dpll2_fck@40            µ              ti,divider-clock             ƒ   -        &           3               @         >         Ç   y      dpll2_ck@4          µ              ti,omap3-dpll-clock          ƒ       y               $   @   4         Ð         â         ê         Ç   z      dpll2_m2_ck@44          µ              ti,divider-clock             ƒ   z        3               D         >         Ç   {      iva2_ck@0           µ              ti,wait-gate-clock           ƒ   {                     &             Ç   Ü      clock@a18         
    ti,clksel              
        µ                       þ             +       clock-mad2d-ick@3                       µ              ti,omap3-interface-clock          
  Âmad2d_ick            ƒ   E         Ç   ß      clock-usbtll-ick@2                      µ              ti,omap3-interface-clock            Âusbtll_ick           ƒ   Z         Ç   ×         ssi_ssr_fck_3430es2         µ              ti,composite-clock           ƒ   |   }         Ç   ~      ssi_sst_fck_3430es2         µ              fixed-factor-clock           ƒ   ~        U           `            Ç   ÷      sys_d2_ck           µ              fixed-factor-clock           ƒ            U           `            Ç   H      omap_96m_d2_fck         µ              fixed-factor-clock           ƒ   W        U           `            Ç   I      omap_96m_d4_fck         µ              fixed-factor-clock           ƒ   W        U           `            Ç   J      omap_96m_d8_fck         µ              fixed-factor-clock           ƒ   W        U           `            Ç   K      omap_96m_d10_fck            µ              fixed-factor-clock           ƒ   W        U           `   
         Ç   L      dpll5_m2_d4_ck          µ              fixed-factor-clock           ƒ           U           `            Ç   M      dpll5_m2_d8_ck          µ              fixed-factor-clock           ƒ           U           `            Ç   N      dpll5_m2_d16_ck         µ              fixed-factor-clock           ƒ           U           `            Ç   O      dpll5_m2_d20_ck         µ              fixed-factor-clock           ƒ           U           `            Ç   P      usim_fck            µ              ti,composite-clock           ƒ   €   �      dpll5_ck@d04            µ              ti,omap3-dpll-clock          ƒ                     $  L  4         Ð         â         Ç   ‚      dpll5_m2_ck@d50         µ              ti,divider-clock             ƒ   ‚        3              P         >         Ç         sgx_gate_fck@b00            µ              ti,composite-gate-clock          ƒ   -        &                        Ç   Š      core_d3_ck          µ              fixed-factor-clock           ƒ   -        U           `            Ç   ƒ      core_d4_ck          µ              fixed-factor-clock           ƒ   -        U           `            Ç   „      core_d6_ck          µ              fixed-factor-clock           ƒ   -        U           `            Ç   …      omap_192m_alwon_fck         µ              fixed-factor-clock           ƒ   $        U           `            Ç   †      core_d2_ck          µ              fixed-factor-clock           ƒ   -        U           `            Ç   ‡      sgx_mux_fck@b40         µ              ti,composite-mux-clock            ƒ   ƒ   „   …   1   †   ‡   ˆ   ‰           @         Ç   ‹      sgx_fck         µ              ti,composite-clock           ƒ   Š   ‹         Ç   ü      sgx_ick@b10         µ              ti,wait-gate-clock           ƒ   E                   &             Ç   à      cpefuse_fck@a08         µ              ti,gate-clock            ƒ               
        &             Ç   Ô      ts_fck@a08          µ              ti,gate-clock            ƒ   F           
        &            Ç   Õ      usbtll_fck@a08          µ              ti,wait-gate-clock           ƒ              
        &            Ç   Ö      dss_ick_3430es2@e10         µ              ti,omap3-dss-interface-clock             ƒ   G                   &             Ç   µ      usbhost_120m_fck@1400           µ              ti,gate-clock            ƒ                       &            Ç   á      usbhost_48m_fck@1400            µ              ti,dss-gate-clock            ƒ   7                    &             Ç   â      usbhost_ick@1410            µ              ti,omap3-dss-interface-clock             ƒ   G                   &             Ç   ã         clockdomains       core_l3_clkdm             ti,clockdomain           ƒ   Œ   �      dpll3_clkdm           ti,clockdomain           ƒ         dpll1_clkdm           ti,clockdomain           ƒ         per_clkdm             ti,clockdomain        h   ƒ   Ž   �   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §      emu_clkdm             ti,clockdomain           ƒ   (      dpll4_clkdm           ti,clockdomain           ƒ         wkup_clkdm            ti,clockdomain        $   ƒ   ¨   ©   ª   «   ¬   ­   ®   ¯   °      dss_clkdm             ti,clockdomain           ƒ   ±   ²   ³   ´   µ      core_l4_clkdm             ti,clockdomain        ”   ƒ   ¶   ·   ¸   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò      Ó   Ô   Õ   Ö   ×   Ø   Ù      cam_clkdm             ti,clockdomain           ƒ   Ú   Û      iva2_clkdm            ti,clockdomain           ƒ   Ü      dpll2_clkdm           ti,clockdomain           ƒ   z      d2d_clkdm             ti,clockdomain           ƒ   Ý   Þ   ß      dpll5_clkdm           ti,clockdomain           ƒ   ‚      sgx_clkdm             ti,clockdomain           ƒ   à      usbhost_clkdm             ti,clockdomain           ƒ   á   â   ã            target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  Õrev sysc            ì                ƒ   ]   ­         Šfck ick                      +            ä    H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc                     ú            H               Ç         target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           Õrev sysc syss           ß  #                          ì                  ú            ƒ   Y         Šick                      +            ä    H`       dma-controller@0              ti,omap3430-sdma ti,omap-sdma                            Ï                               $            1   `         Ç            gpio@48310000             ti,omap3-gpio            H1              Ï            Úgpio1            >         P        `                     ú         gpio@49050000             ti,omap3-gpio            I              Ï            Úgpio2            P        `                     ú         gpio@49052000             ti,omap3-gpio            I              Ï            Úgpio3            P        `                     ú         gpio@49054000             ti,omap3-gpio            I@             Ï             Úgpio4            P        `                     ú         gpio@49056000             ti,omap3-gpio            I`             Ï   !         Úgpio5            P        `                     ú         gpio@49058000             ti,omap3-gpio            I€             Ï   "         Úgpio6            P        `                     ú         serial@4806a000           ti,omap3-uart            H              l      H              1      2        tx rx            Úuart1           Ül       serial@4806c000           ti,omap3-uart            HÀ            l      I              3      4        tx rx            Úuart2           Ül       serial@49020000           ti,omap3-uart            I             l      J              5      6        tx rx            Úuart3           Ül       i2c@48070000              ti,omap3-i2c             H     €         Ï   8                     +             Úi2c1             '¬@   twl@48              H         Ï             ti,twl4030                    ú           €default         Ž   ä   å   rtc           ti,twl4030-rtc           Ï         charger           ti,twl4030-bci           Ï   	           ˜   æ        ¦   ç           ²vac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         … 	'À        �        regulator-vdac            ti,twl4030-vdac         … w@        � w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            … :�        � 0°         Ç   ë      regulator-vmmc2           ti,twl4030-vmmc2            … :�        � 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           Ç   è      regulator-vusb1v8             ti,twl4030-vusb1v8           Ç   é      regulator-vusb3v1             ti,twl4030-vusb3v1           Ç   æ      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            … w@        � w@      regulator-vsim            ti,twl4030-vsim         … w@        � -ÆÀ         Ç   ì      gpio              ti,twl4030-gpio          P        `                     ú         twl4030-usb           ti,twl4030-usb           Ï   
           Ã   è        Ñ   é        ß   æ        í           ö          pwm           ti,twl4030-pwm                   pwmled            ti,twl4030-pwmled                    pwrbutton             ti,twl4030-pwrbutton             Ï         keypad            ti,twl4030-keypad            Ï                               madc              ti,twl4030-madc          Ï           /            Ç   ç            i2c@48072000              ti,omap3-i2c             H     €         Ï   9                     +             Úi2c2          i2c@48060000              ti,omap3-i2c             H     €         Ï   =                     +             Úi2c3          mailbox@48094000              ti,omap3-mailbox             Úmailbox          H	@             Ï           A           M           _      mbox-dsp            q                    |                    spi@48098000              ti,omap2-mcspi           H	€             Ï   A                     +             Úmcspi1          ‡         @        #      $      %      &      '      (      )      *         tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           H	              Ï   B                     +             Úmcspi2          ‡                  +      ,      -      .        tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           H€             Ï   [                     +             Úmcspi3          ‡                                            tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           H              Ï   0                     +             Úmcspi4          ‡                 F      G        tx0 rx0       1w@480b2000           ti,omap3-1w          H              Ï   :         Úhdq1w         mmc@4809c000              ti,omap3-hsmmc           H	À             Ï   S         Úmmc1             •              =      >        tx rx           ¢   ê        ¯   ë        »   ì        È         mmc@480b4000              ti,omap3-hsmmc           H@             Ï   V         Úmmc2                  /      0        tx rx         	  Òdisabled          mmc@480ad000              ti,omap3-hsmmc           H
Ð             Ï   ^         Úmmc3                  M      N        tx rx         	  Òdisabled          mmu@480bd400            Ù              ti,omap2-iommu           HÔ    €         Ï            Úmmu_isp         æ            Ç   ù      mmu@5d000000            Ù              ti,omap2-iommu           ]      €         Ï            Úmmu_iva       	  Òdisabled          wdt@48314000              ti,omap3-wdt             H1@    €      
   Úwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@    ÿ        Õmpu          Ï      ;   <        öcommon tx rx               €         Úmcbsp1                               tx rx            ƒ   í         Šfck       	  Òdisabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           Õrev sysc syss           ß           ì               ú            ƒ   î         Šick                      +            ä    H
         rng@0             ti,omap2-rng                              Ï   4         mcbsp@49022000            ti,omap3-mcbsp           I     ÿI€    ÿ        Õmpu sidetone             Ï      >   ?           öcommon tx rx sidetone                       Úmcbsp2 mcbsp2_sidetone                !      "        tx rx            ƒ   ï   ¥         Šfck ick       	  Òdisabled          mcbsp@49024000            ti,omap3-mcbsp           I@    ÿI     ÿ        Õmpu sidetone             Ï      Y   Z           öcommon tx rx sidetone              €         Úmcbsp3 mcbsp3_sidetone                              tx rx            ƒ   ð   ¦         Šfck ick       	  Òdisabled          mcbsp@49026000            ti,omap3-mcbsp           I`    ÿ        Õmpu          Ï      6   7        öcommon tx rx               €         Úmcbsp4                              tx rx            ƒ   ñ         Šfck                   	  Òdisabled          mcbsp@48096000            ti,omap3-mcbsp           H	`    ÿ        Õmpu          Ï      Q   R        öcommon tx rx               €         Úmcbsp5                              tx rx            ƒ   ò         Šfck       	  Òdisabled          sham@480c3000             ti,omap3-sham            Úsham             H0    d         Ï   1              E        rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1€    H1€   H1€           Õrev sysc syss           ß  '        ì                  ú            ƒ   ó   ¯         Šfck ick                      +            ä    H1€             &         :   timer@0           ti,omap3430-timer                   €         ƒ   ó         Šfck          Ï   %         E        T   ó        d   F         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            Õrev sysc syss           ß  '        ì                  ú            ƒ   ô   ¤         Šfck ick                      +            ä    I        timer@0           ti,omap3430-timer                            Ï   &         timer@49034000            ti,omap3430-timer            I@             Ï   '         Útimer3        timer@49036000            ti,omap3430-timer            I`             Ï   (         Útimer4        timer@49038000            ti,omap3430-timer            I€             Ï   )         Útimer5           {      timer@4903a000            ti,omap3430-timer            I              Ï   *         Útimer6           {      timer@4903c000            ti,omap3430-timer            IÀ             Ï   +         Útimer7           {      timer@4903e000            ti,omap3430-timer            Ià             Ï   ,         Útimer8           ˆ         {      timer@49040000            ti,omap3430-timer            I              Ï   -         Útimer9           ˆ      timer@48086000            ti,omap3430-timer            H`             Ï   .         Útimer10          ˆ      timer@48088000            ti,omap3430-timer            H€             Ï   /         Útimer11          ˆ      target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           Õrev sysc syss           ß  '        ì                  ú            ƒ   õ   ®         Šfck ick                      +            ä    H0@       timer@0           ti,omap3430-timer                            Ï   _         E         •         usbhstll@48062000             ti,usbhs-tll             H              Ï   N         Úusb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@             Úusb_host_hs                      +             ä   usb@48064400              ti,ohci-omap3            HD             Ï   L         ¥      usb@48064800              ti,ehci-omap             HH             Ï   M         gpmc@6e000000             ti,omap3430-gpmc             Úgpmc             n     Ð         Ï                         rxtx            ½           É                        +                     ú            P        `         0   ä                     (                             Ç   ö   nor@0,0       
    cfi-flash           Ûintel,pf48f6000m0y1be                        +                               ê           õ                          º        '   º        9           H   0        [   0        n   6        |   ¨        ‹   6        ™   ¨        ¨   º        ¹   º        Ê   r        Ù           ó           
           $   Z        <   º         N         h   partition@0         ‚bootloader-nor                        partition@40000         ‚params-nor                       partition@80000         ‚kernel-nor                        partition@280000            ‚filesystem-nor            $  Ø           nand@1,0              ti,omap2-nand                                  ö         Ï                                    +           ˆsw          ˜                          $        '   $        9           H           [   $        n           |   0        ‹           ™           ¨   H        ¹   H        Ê   6        <      partition@0         ‚xloader-nand                          partition@80000         ‚bootloader-nand                      partition@1c0000            ‚params-nand                      partition@280000            ‚kernel-nand           (   P        partition@780000            ‚filesystem-nand           x  ˆ           onenand@2,0                      +             ti,omap2-onenand                               §           õ                          T        '   H        9            H           [           n           |   T        ‹            ™   *        ¨   l        ¹   `        Ê   N        $      partition@0         ‚xloader-onenand                       partition@80000         ‚bootloader-onenand                       partition@c0000         ‚params-onenand                       partition@e0000         ‚kernel-onenand                        partition@2e0000            ‚filesystem-onenand            .  Ò              target-module@480ab000            ti,sysc-omap2 ti,sysc            H
´    H
´   H
´           Õrev sysc syss           ß                             ì                  ú            Šfck                      +            ä    H
°             ƒ   �   usb@0             ti,omap3-musb                            Ï   \   ]        ömc dma          ¹           Ä           Ì            dss@48050000              ti,omap3-dss             H           	  Òdisabled          	   Údss_core             ƒ   ´         Šfck                      +             ä   dispc@48050400            ti,omap3-dispc           H             Ï         
   Údss_dispc            ƒ   ´         Šfck       encoder@4804fc00              ti,omap3-dsi             Hü    Hþ    @Hÿ             Õproto phy pll            Ï         	  Òdisabled          	   Údss_dsi1             ƒ   ´   ³         Šfck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  Òdisabled          	   Údss_rfbi             ƒ   ´   µ         Šfck ick       encoder@48050c00              ti,omap3-venc            H          	  Òdisabled          	   Údss_venc             ƒ   ±         Šfck          ssi-controller@48058000           ti,omap3-ssi             Ússi         Òokay             H€    H�            Õsys gdd          Ï   G        ögdd_mpu                      +             ä         ƒ   ~   ÷   ø          Šssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H     H¨            Õtx rx            Ï   C   D      ssi-port@4805b000             ti,omap3-ssi-port            H°    H¸            Õtx rx            Ï   E   F         pinmux@480025d8            ti,omap3-padconf pinctrl-single          H %Ø   $                     +             ë            ú                                >  ÿ      isp@480bc000              ti,omap3-isp             HÀ   üHØ   |         Ï           Õ   ù        o      l        Ü            µ      ports                        +             bandgap@48002524             H %$             ti,omap34xx-bandgap         è             Ç   ý      target-module@480cb000            ti,sysc-omap3430-sr ti,sysc          Úsmartreflex_core             H°$           Õsysc            ß            ƒ   ú         Šfck                      +            ä    H°       smartreflex@0             ti,omap3-smartreflex-core                            Ï            target-module@480c9000            ti,sysc-omap3430-sr ti,sysc          Úsmartreflex_mpu_iva          H�$           Õsysc            ß            ƒ   û         Šfck                      +            ä    H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                             Ï            target-module@50000000            ti,sysc-omap2 ti,sysc            P             Õrev          ƒ   ü   à         Šfck ick                      +            ä    P         gpu@0         #    ti,omap3430-gpu img,powervr-sgx530                           Ï               opp-table             operating-points-v2-ti-cpu          o            Ç      opp-125000000           þ    sY@         à˜ à˜ à˜        ÿÿÿÿ         opp-250000000           þ    æ²€         g8 g8 g8        ÿÿÿÿ            $      opp-500000000           þ    Íe          O€ O€ O€        ÿÿÿÿ         opp-550000000           þ     ÈU€         tx tx tx        ÿÿÿÿ         opp-600000000           þ    #ÃF          ™p ™p ™p        ÿÿÿÿ         opp-720000000           þ    *êT          ™p ™p ™p        ÿÿÿÿ            0         thermal-zones      cpu-thermal         ;   ú        Q  è        _      N         l   ý   trips      cpu_alert           | 8€        ˆ  Ð         zpassive          Ç   þ      cpu_crit            | _�        ˆ  Ð      	   zcritical             cooling-maps       map0            “   þ        ˜   ÿÿÿÿÿÿÿÿÿ               memory@80000000          smemory           €               	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 device_type reg clocks clock-names clock-latency operating-points-v2 #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended pinctrl-names pinctrl-0 bci3v1-supply io-channels io-channel-names usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply vqmmc-supply bus-width status #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure remote-wakeup-connected gpmc,num-cs gpmc,num-waitpins linux,mtd-name bank-width gpmc,mux-add-data gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wr-data-mux-bus-ns gpmc,wr-access-ns gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen label ti,nand-ecc-opt nand-bus-width gpmc,device-width multipoint num-eps ram-bits iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device 