A8=0(^<$rockchip,rk3036-evbrockchip,rk3036&!7Rockchip RK3036 Evaluation boardaliases=/pinctrl/gpio@2007c000C/pinctrl/gpio@20080000I/pinctrl/gpio@20084000O/i2c@20072000T/i2c@20056000Y/i2c@2005a000^/mmc@1021c000d/mmc@10214000j/mmc@10218000p/serial@20060000x/serial@20064000/serial@20068000/spi@20074000cpusrockchip,rk3036-smpcpu@f00cpuarm,cortex-a7 sB@@cpu@f01cpuarm,cortex-a7arm-pmuarm,cortex-a7-pmuLMdisplay-subsystemrockchip,display-subsystemtimerarm,armv7-timer0   'n6oscillator fixed-clock'n67xin24mJsram@10080000 mmio-sram  W smp-sram@0rockchip,rk3066-smp-sramgpu@10090000"rockchip,rk3036-maliarm,mali-400 0^gpgpmmupp0ppmmu0n@~@@ buscorex disabledvideo-codec@10108000rockchip,rk3036-vpu ^vdpu aclkhclkiommu@10108800rockchip,iommu 7 aclkifacevop@10118000rockchip,rk3036-vop +daclk_vopdclk_vophclk_vopuvw axiahbdclk disabledportendpoint@0 #iommu@10118300rockchip,iommu + aclkiface disabledqos@1012d000rockchip,rk3036-qossyscon !qos@1012e000rockchip,rk3036-qossyscon  qos@1012f000rockchip,rk3036-qossyscon interrupt-controller@10139000 arm,gic-400      usb@101800002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2 otg otg$3@@ B  Gusb2-phy disabledusb@101c00002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2 otg hostB  Gusb2-phy disabledethernet@10200000rockchip,rk3036-emac @ Q hclkmacrefmacclkn^udrmiiokay   defaultmdioethernet-phy@0 mmc@102140000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@@'<4`<4`Dbiuciu Qreset disabledmmc@102180000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@<4` Eswbiuciuciu-driveciu-sample Rreset disabledmmc@1021c0000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@ '<4`<4` Guybiuciuciu-driveciu-sample  rx-tx#default Sreset disabledi2s@10220000(rockchip,rk3036-i2srockchip,rk3066-i2s"@ 3i2s_clki2s_hclkR txrxdefault1 disablednand-controller@10500000(rockchip,rk3036-nfcrockchip,rk2928-nfcP@ LahbnfcnL~рdefault disabledclock-controller@20000000rockchip,rk3036-cru xin24mQ JBn~#gsyscon@20008000&rockchip,rk3036-grfsysconsimple-mfd  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disabledserial@20060000&rockchip,rk3036-uartsnps,dw-apb-uart  'n6MUbaudclkapb_pclkdefault *+, disabledserial@20064000&rockchip,rk3036-uartsnps,dw-apb-uart @ 'n6NVbaudclkapb_pclkdefault- disabledserial@20068000&rockchip,rk3036-uartsnps,dw-apb-uart  'n6OWbaudclkapb_pclkdefault.okayi2c@20072000(rockchip,rk3036-i2crockchip,rk3288-i2c   i2cLdefault/ disabledspi@20074000rockchip,rk3036-spi @ ARspiclkapb_pclk  txrxdefault0123 disableddma-controller@20078000arm,pl330arm,primecell @ apb_pclkpinctrlrockchip,rk3036-pinctrlQ Wgpio@2007c000rockchip,gpio-bank  $@!gpio@20080000rockchip,gpio-bank  %A!gpio@20084000rockchip,gpio-bank @ &B!pcfg-pull-default-5pcfg-pull-noneC4pwm0pwm0-pinP4$pwm1pwm1-pinP4%pwm2pwm2-pinP4&pwm3pwm3-pinP4'sdmmcsdmmc-clkP4sdmmc-cmdP5sdmmc-cdP5sdmmc-bus1P5sdmmc-bus4@P5555sdiosdio-bus1P 5sdio-bus4@P 5 5 55sdio-cmdP5sdio-clkP 4emmcemmc-clkP4emmc-cmdP5emmc-bus8P55555555nfcflash-aleP5flash-bus8P55555555flash-cleP5flash-csn0P5flash-rdnP5flash-rdyP5flash-wrnP5emacemac-xferP 5 5555555emac-mdio P 55i2c0i2c0-xfer P44/i2c1i2c1-xfer P44(i2c2i2c2-xfer P44)i2si2s-bus`P555555hdmihdmi-ctl@P4 4 4 4"uart0uart0-xfer P54*uart0-ctsP5+uart0-rtsP4,uart1uart1-xfer P54-uart2uart2-xfer P54.spi-pinsspi-txdP50spi-rxdP51spi-clkP52spi-cs0P53spi-cs1P5memory@60000000memory`@ #address-cells#size-cellscompatibleinterrupt-parentmodelgpio0gpio1gpio2i2c0i2c1i2c2mshc0mshc1mshc2serial0serial1serial2spienable-methoddevice_typeregresetsoperating-pointsclock-latencyclocksphandleinterruptsinterrupt-affinityportsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsrangesinterrupt-namesassigned-clocksassigned-clock-ratesclock-namespower-domainsstatusiommus#iommu-cellsreset-namesremote-endpointinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfassigned-clock-parentsmax-speedphy-modephyphy-reset-durationphy-reset-gpiospinctrl-namespinctrl-0max-frequencyfifo-depthbus-widthcap-mmc-highspeeddisable-wpdmasdma-namesmmc-ddr-1_8vnon-removable#sound-dai-cells#reset-cells#phy-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#pwm-cellsreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pins