Ðþí  J   8  DÌ   (            E  D”                                                         Google Chameleon V3       L   !google,chameleon-v3 enclustra,mercury-aa1 altr,socfpga-arria10 altr,socfpga    cpus                                       ,altr,socfpga-a10-smp       cpu@0            !arm,cortex-a9            :cpu          F             J            [         cpu@1            !arm,cortex-a9            :cpu          F            J            [            pmu@ff111000             !arm,cortex-a9-pmu            c            t       |          }                           Fÿ    ÿ0          interrupt-controller@ffffd000            !arm,cortex-a9-gic            ’             £         FÿÿÐ    ÿÿÁ             [         soc                                   !simple-bus           :soc          c             ¸   amba             !simple-bus                                     ¸   pdma@ffda1000            !arm,pl330 arm,primecell          FÿÚ          l   t       S          T          U          V          W          X          Y          Z          [            ¿            Ê         	   Ñapb_pclk             Ý      0      5         ädma dma-ocp          [   "         base_fpga_region                                      !fpga-region          ð         clkmgr@ffd04000          !altr,clk-mgr             FÿÐ@       clocks                               cb_intosc_hs_div2_clk            ù             !fixed-clock          [         cb_intosc_ls_clk             ù             !fixed-clock          [   	      f2s_free_clk             ù             !fixed-clock          [   
      osc1             ù             !fixed-clock         ü“P         [         main_pll@40                                    ù             !altr,socfpga-a10-pll-clock           Ê      	   
         F   @         [      main_mpu_base_clk            ù             !altr,socfpga-a10-perip-clk           Ê             @                [         main_noc_base_clk            ù             !altr,socfpga-a10-perip-clk           Ê             D                [         main_emaca_clk@68            ù             !altr,socfpga-a10-perip-clk           Ê            F   h      main_emacb_clk@6c            ù             !altr,socfpga-a10-perip-clk           Ê            F   l      main_emac_ptp_clk@70             ù             !altr,socfpga-a10-perip-clk           Ê            F   p      main_gpio_db_clk@74          ù             !altr,socfpga-a10-perip-clk           Ê            F   t      main_sdmmc_clk@78            ù             !altr,socfpga-a10-perip-clk           Ê            F   x         [         main_s2f_usr0_clk@7c             ù             !altr,socfpga-a10-perip-clk           Ê            F   |      main_s2f_usr1_clk@80             ù             !altr,socfpga-a10-perip-clk           Ê            F   €         [         main_hmc_pll_ref_clk@84          ù             !altr,socfpga-a10-perip-clk           Ê            F   „      main_periph_ref_clk@9c           ù             !altr,socfpga-a10-perip-clk           Ê            F   œ         [            periph_pll@c0                                      ù             !altr,socfpga-a10-pll-clock           Ê      	   
            F   À         [      peri_mpu_base_clk            ù             !altr,socfpga-a10-perip-clk           Ê             @               [         peri_noc_base_clk            ù             !altr,socfpga-a10-perip-clk           Ê             D               [         peri_emaca_clk@e8            ù             !altr,socfpga-a10-perip-clk           Ê            F   è      peri_emacb_clk@ec            ù             !altr,socfpga-a10-perip-clk           Ê            F   ì      peri_emac_ptp_clk@f0             ù             !altr,socfpga-a10-perip-clk           Ê            F   ð         [         peri_gpio_db_clk@f4          ù             !altr,socfpga-a10-perip-clk           Ê            F   ô      peri_sdmmc_clk@f8            ù             !altr,socfpga-a10-perip-clk           Ê            F   ø         [         peri_s2f_usr0_clk@fc             ù             !altr,socfpga-a10-perip-clk           Ê            F   ü      peri_s2f_usr1_clk@100            ù             !altr,socfpga-a10-perip-clk           Ê            F            [         peri_hmc_pll_ref_clk@104             ù             !altr,socfpga-a10-perip-clk           Ê            F           mpu_free_clk@60          ù             !altr,socfpga-a10-perip-clk           Ê               
         F   `         [         noc_free_clk@64          ù             !altr,socfpga-a10-perip-clk           Ê               
         F   d         [         s2f_user1_free_clk@104           ù             !altr,socfpga-a10-perip-clk           Ê               
         F        sdmmc_free_clk@f8            ù             !altr,socfpga-a10-perip-clk           Ê               
                    F   ø         [         l4_sys_free_clk          ù             !altr,socfpga-a10-perip-clk           Ê                       [   ,      l4_main_clk          ù             !altr,socfpga-a10-gate-clk            Ê              ¨               ,   H            [         l4_mp_clk            ù             !altr,socfpga-a10-gate-clk            Ê              ¨              ,   H            [         l4_sp_clk            ù             !altr,socfpga-a10-gate-clk            Ê              ¨              ,   H            [          mpu_periph_clk           ù             !altr,socfpga-a10-gate-clk            Ê                      ,   H             [   +      sdmmc_clk            ù             !altr,socfpga-a10-gate-clk            Ê           ,   È            [   #      qspi_clk             ù             !altr,socfpga-a10-gate-clk            Ê           ,   È            [   *      nand_x_clk           ù             !altr,socfpga-a10-gate-clk            Ê           ,   È   
         [         nand_ecc_clk             ù             !altr,socfpga-a10-gate-clk            Ê           ,   È   
         [   %      nand_clk             ù             !altr,socfpga-a10-gate-clk            Ê                      ,   È   
         [   $      spi_m_clk            ù             !altr,socfpga-a10-gate-clk            Ê           ,   È   	         [   !      usb_clk          ù             !altr,socfpga-a10-gate-clk            Ê           ,   È            [   -      s2f_usr1_clk             ù             !altr,socfpga-a10-gate-clk            Ê           ,   È               stmmac-axi-config           5           E           U                                    [         ethernet@ff800000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      D             Fÿ€               t       \           rmacirq          ‚           �   €        ¹           Ç  @          Ê               Ñstmmaceth ptp_ref            Ý             (         ästmmaceth stmmaceth-ocp         Õ           åokay          	  ìrgmii-id            õÿÿÿÿ        þ  Ø                    [   '   mdio                                       !snps,dwmac-mdio    ethernet-phy@3           F             �        $  ¤        1  ¤        >  ¤        K  ¤        X  ¤        e  D        q            ~            ‹            ˜            ¥             [               ethernet@ff802000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      H            Fÿ€               t       ]           rmacirq          ²                ‚           �   €        ¹           Ç  @          Ê               Ñstmmaceth ptp_ref            Ý      !      )         ästmmaceth stmmaceth-ocp         Õ         	  ådisabled          ethernet@ff804000         8   !altr,socfpga-stmmac-a10-s10 snps,dwmac-3.72a snps,dwmac         _      L            Fÿ€@              t       ^           rmacirq          ²                ‚           �   €        ¹           Ç  @          Ê               Ñstmmaceth ptp_ref            Ý      "      *         ästmmaceth stmmaceth-ocp         Õ         	  ådisabled          gpio@ffc02900                                      !snps,dw-apb-gpio             FÿÀ)             Ý      X        åokay       gpio-controller@0            !snps,dw-apb-gpio-port            ¾        Î           Ú            F              £         ’            t       p            gpio@ffc02a00                                      !snps,dw-apb-gpio             FÿÀ*             Ý      Y        åokay       gpio-controller@0            !snps,dw-apb-gpio-port            ¾        Î           Ú            F              £         ’            t       q            gpio@ffc02b00                                      !snps,dw-apb-gpio             FÿÀ+             Ý      Z        åokay       gpio-controller@0            !snps,dw-apb-gpio-port            ¾        Î           Ú            F              £         ’            t       r            fpga-mgr@ffd03000            !altr,socfpga-a10-fpga-mgr            FÿÐ0    ÿÏä              Ê            Ý      ƒ         äfpgamgr          [         i2c@ffc02200                                       !snps,designware-i2c          FÿÀ"             t       i            Ê             Ý      H        åokay            è  ,   audio-codec@1a           !adi,ssm2603          F            i2c@ffc02300                                       !snps,designware-i2c          FÿÀ#             t       j            Ê             Ý      I        åokay            è  ,         †    crypto@64            !atmel,atsha204a          F   d      rtc@6f           !isil,isl12022            F   o      gpio@21          !nxp,pca9535          F   !         ¾        Î         ¶  ýSOM_AUD_MUTE DP1_OUT_CEC_EN DP2_OUT_CEC_EN DP1_SOM_PS8469_CAD DPD_SOM_PS8469_CAD DP_OUT_PWR_EN STM32_RST_L STM32_BOOT0 FPGA_PROT STM32_FPGA_COMM0 TP119 TP120 TP121 TP122 TP123 TP124            i2c@ffc02400                                       !snps,designware-i2c          FÿÀ$             t       k            Ê             Ý      J      	  ådisabled          i2c@ffc02500                                       !snps,designware-i2c          FÿÀ%             t       l            Ê             Ý      K      	  ådisabled          i2c@ffc02600                                       !snps,designware-i2c          FÿÀ&             t       m            Ê             Ý      L      	  ådisabled          spi@ffda4000             !snps,dw-apb-ssi                                    FÿÚ@             t       e                       Ê   !         Ý      1         äspi       	  ådisabled          spi@ffda5000             !snps,dw-apb-ssi                                    FÿÚP             t       f                         "           #   "            Ê   !         Ý      2         äspi       	  ådisabled          sdr@ffcfb100             !altr,sdr-ctl syscon          FÿÏ±    €         [   &      cache-controller@fffff000            !arm,pl310-cache          Fÿÿð             t                   2        @           L           Z            i         [         mmc@ff808000                                       !altr,socfpga-dw-mshc             Fÿ€€             t       b           ¼            Ê      #         Ñbiu ciu          Ý      '        _      (           åokay             }         Ž        ˜           ¢       ‡         [   (      nand-controller@ffb90000                                       !altr,socfpga-denali-nand             Fÿ¹     ÿ¸             ²nand_data denali_reg             t       c            Ê   $      %         Ñnand nand_x ecc          Ý      %      	  ådisabled          sram@ffe00000         
   !mmio-sram            Fÿà           eccmgr           !altr,socfpga-a10-ecc-manager            _                                     t                               £         ’             ¸   sdramedac            !altr,sdram-edac-a10         ¼   &         t         1         l2-ecc@ffd06010          !altr,socfpga-a10-l2-ecc          FÿÐ`            t                    ocram-ecc@ff8c3000           !altr,socfpga-a10-ocram-ecc           FÿŒ0             t         !         emac0-rx-ecc@ff8c0800            !altr,socfpga-eth-mac-ecc             FÿŒ            Ì   '         t         $         emac0-tx-ecc@ff8c0c00            !altr,socfpga-eth-mac-ecc             FÿŒ            Ì   '         t         %         sdmmca-ecc@ff8c2c00          !altr,socfpga-sdmmc-ecc           FÿŒ,            Ì   (          t         /            0         dma-ecc@ff8c8000             !altr,socfpga-dma-ecc             FÿŒ€            Ì   "         t   
      *         usb0-ecc@ff8c8800            !altr,socfpga-usb-ecc             FÿŒˆ            Ì   )         t         "            spi@ff809000          !   !intel,socfpga-qspi cdns,qspi-nor                                       Fÿ€�    ÿ               t       d           Ü   €        ì           ü             Ê   *         Ý      &      .         äqspi qspi-ocp           åokay       flash@0                                            !jedec,spi-nor            F            %           6           G ˜–€        Y           i   2        w   2        …           “      partition@raw         
  ¡Flash Raw            F                   rstmgr@ffd05000         §            !altr,rst-mgr             FÿÐP            ´             [         snoop-control-unit@ffffc000          !arm,cortex-a9-scu            FÿÿÀ          sysmgr@ffd06000          !altr,sys-mgr syscon          FÿÐ`            ÇÿÐb0         [         timer@ffffc600           !arm,cortex-a9-twd-timer          FÿÿÆ             t                 Ê   +      timer0@ffc02700          !snps,dw-apb-timer            t       s            FÿÀ'             Ê             Ñtimer            Ý      D         ätimer         timer1@ffc02800          !snps,dw-apb-timer            t       t            FÿÀ(             Ê             Ñtimer            Ý      E         ätimer         timer2@ffd00000          !snps,dw-apb-timer            t       u            FÿÐ              Ê   ,         Ñtimer            Ý      B         ätimer         timer3@ffd00100          !snps,dw-apb-timer            t       v            FÿÐ             Ê   ,         Ñtimer            Ý      C         ätimer         serial@ffc02000          !snps,dw-apb-uart             FÿÀ              t       n           ×           á            Ê             Ý      P        åokay          serial@ffc02100          !snps,dw-apb-uart             FÿÀ!             t       o           ×           á            Ê             Ý      Q        åokay          usbphy          î             !usb-nop-xceiv           åokay             [   .      usb@ffb00000          
   !snps,dwc2            Fÿ°    ÿÿ         t       _            Ê   -         Ñotg          Ý      #         ädwc2            ù   .      	  þusb2-phy            åokay            host             [   )      usb@ffb40000          
   !snps,dwc2            Fÿ´    ÿÿ         t       `            Ê   -         Ñotg          Ý      $         ädwc2            ù   .      	  þusb2-phy          	  ådisabled          watchdog@ffd00200            !snps,dw-wdt          FÿÐ             t       w            Ê   ,         Ý      @      	  ådisabled          watchdog@ffd00300            !snps,dw-wdt          FÿÐ             t       x            Ê   ,         Ý      A      	  ådisabled             aliases         /soc/ethernet@ff800000          /soc/serial@ffc02100            "/soc/spi@ff809000           '/soc/serial@ffc02000            //soc/i2c@ffc02200           4/soc/i2c@ffc02300         memory@0             :memory           F    €         chosen          9serial1:115200n8             	#address-cells #size-cells model compatible enable-method device_type reg next-level-cache phandle interrupt-parent interrupts interrupt-affinity #interrupt-cells interrupt-controller ranges #dma-cells clocks clock-names resets reset-names fpga-mgr #clock-cells clock-frequency div-reg fixed-divider clk-gate snps,wr_osr_lmt snps,rd_osr_lmt snps,blen altr,sysmgr-syscon interrupt-names snps,multicast-filter-bins snps,perfect-filter-entries tx-fifo-depth rx-fifo-depth snps,axi-config status phy-mode phy-addr max-frame-size phy-handle rxc-skew-ps rxd0-skew-ps rxd1-skew-ps rxd2-skew-ps rxd3-skew-ps rxdv-skew-ps txc-skew-ps txd0-skew-ps txd1-skew-ps txd2-skew-ps txd3-skew-ps txen-skew-ps mac-address gpio-controller #gpio-cells snps,nr-gpios i2c-sda-hold-time-ns gpio-line-names num-cs tx-dma-channel rx-dma-channel cache-unified cache-level prefetch-data prefetch-instr arm,shared-override cap-sd-highspeed broken-cd bus-width clk-phase-sd-hs reg-names altr,sdr-syscon altr,ecc-parent cdns,fifo-depth cdns,fifo-width cdns,trigger-address u-boot,dm-pre-reloc spi-rx-bus-width spi-tx-bus-width spi-max-frequency cdns,read-delay cdns,tshsl-ns cdns,tsd2d-ns cdns,tchsh-ns cdns,tslch-ns label #reset-cells altr,modrst-offset cpu1-start-addr reg-shift reg-io-width #phy-cells phys phy-names dr_mode ethernet0 serial1 spi0 serial0 i2c0 i2c1 stdout-path 