Ðþí  a3   8  \�   (            £  \X                             $    rockchip,rk3128-evb rockchip,rk3128                                  +         !   7Rockchip RK3128 Evaluation board       aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/pinctrl/gpio@20088000           U/i2c@20072000            Z/i2c@20056000            _/i2c@2005a000            d/i2c@2005e000            i/serial@20060000             q/serial@20064000             y/serial@20068000             �/mmc@1021c000         arm-pmu           arm,cortex-a7-pmu         0   †       L          M          N          O            ‘                  cpus                         +             ¤rockchip,rk3036-smp    cpu@f00          ²cpu           arm,cortex-a7            ¾            Â               É               Ð            ä            ó         cpu@f01          ²cpu           arm,cortex-a7            ¾           É               Ð            ó         cpu@f02          ²cpu           arm,cortex-a7            ¾           É               Ð            ó         cpu@f03          ²cpu           arm,cortex-a7            ¾           É               Ð            ó            opp-table-0           operating-points-v2           û         ó      opp-216000000               ßæ          ~ð ~ð 7È          œ@      opp-408000000               Q–          ~ð ~ð 7È          œ@      opp-600000000               #ÃF          ~ð ~ð 7È          œ@      opp-696000000               )|          à˜ à˜ 7È          œ@      opp-816000000               0£,          g8 g8 7È         ,          œ@      opp-1008000000              <Ü          O€ O€ 7È          œ@      opp-1200000000              G†Œ          7È 7È 7È          œ@         display-subsystem             rockchip,display-subsystem          8         	  >disabled          opp-table-1           operating-points-v2          ó   	   opp-200000000               ëÂ          à˜ à˜ Ð      opp-300000000               á£          � � Ð      opp-400000000               ×„          Œ0 Œ0 Ð      opp-480000000               œ8          Ð Ð Ð         timer             arm,armv7-timer       0   †                              
           E        in6       oscillator            fixed-clock         in6         yxin24m          Œ             ó   )      sram@10080000         
    mmio-sram            ¾                           +           ™             smp-sram@0            rockchip,rk3066-smp-sram             ¾                gpu@10090000          "    rockchip,rk3128-mali arm,mali-400            ¾	           H   †                                                                     gp gpmmu pp0 ppmmu0 pp1 ppmmu1           Â      Õ      Õ      	  °bus core             Ð   	         É      x        ¼   
         	  >disabled          syscon@100a0000       &    rockchip,rk3128-pmu syscon simple-mfd            ¾
        power-controller          !    rockchip,rk3128-power-controller            Ê                        +             ó   
   power-domain@1           ¾         ˜   Â      Æ     Ö      ¿     Ñ      Ç     Ô      Ì     Ï     E     r      ”      Í     Ó      À      Á     Ò     Õ      ¾      z        Þ                       Ê          power-domain@2           ¾         (   Â      Å     Î      Ä     Í      †        Þ           Ê          power-domain@3           ¾            Â      Õ        Þ           Ê                video-codec@10106000          (    rockchip,rk3128-vpu rockchip,rk3066-vpu          ¾`             †                          
   vepu vdpu             Â      Å     Î      Ä     Í      (  °aclk_vdpu hclk_vdpu aclk_vepu hclk_vepu         å           ¼   
         iommu@10106800            rockchip,iommu           ¾h             †       C            Â      Ä     Î        °aclk iface          ¼   
           ì             ó         vop@1010e000              rockchip,rk3126-vop          ¾à             †       	            Â      Ì      ¾     Ï        °aclk_vop dclk_vop hclk_vop           É      d      e      f        ùaxi ahb dclk            ¼   
         	  >disabled       port                         +             ó      endpoint@0           ¾                        ó   .      endpoint@1           ¾                       ó               dsi@10110000          *    rockchip,rk3128-mipi-dsi snps,dw-mipi-dsi            ¾    @          †       !            Â     E        °pclk                       dphy            ¼   
            É      ‰        ùapb         $         	  >disabled       ports                        +       port@0           ¾       endpoint                        ó            port@1           ¾               qos@1012d000              rockchip,rk3128-qos syscon           ¾Ð              ó         qos@1012e000              rockchip,rk3128-qos syscon           ¾à              ó         qos@1012f000              rockchip,rk3128-qos syscon           ¾ð              ó         qos@1012f080              rockchip,rk3128-qos syscon           ¾ð€             ó         qos@1012f100              rockchip,rk3128-qos syscon           ¾ñ              ó         qos@1012f180              rockchip,rk3128-qos syscon           ¾ñ€             ó         qos@1012f200              rockchip,rk3128-qos syscon           ¾ò              ó         interrupt-controller@10139000             arm,cortex-a7-gic             ¾�         À     à              †      	           1        F                         ó         usb@10180000          2    rockchip,rk3128-usb rockchip,rk3066-usb snps,dwc2            ¾              †       
            Â     Ú        °otg         Wotg         _           q          €      €   €   @                        	  usb2-phy            >okay            �         usb@101c0000              generic-ehci             ¾              †                   Â     Ù                   usb         >okay          usb@101e0000              generic-ohci             ¾              †                    Â     Ù                   usb         >okay          i2s@10200000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s          ¾               †       D            Â      P     »        °i2s_clk i2s_hclk            ›                     tx rx           ª          	  >disabled          spdif@10204000        ,    rockchip,rk3128-spdif rockchip,rk3066-spdif          ¾ @             †       7            Â      S     ¸      
  °mclk hclk           ›               tx          »default         É           ª          	  >disabled          spi@1020c000              rockchip,sfc             ¾ À   €          †       2            Â      ™     ß        °clk_sfc hclk_sfc          	  >disabled          mmc@10214000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          ¾!@   @          †                    Â     È      D      r      v        °biu ciu ciu-drive ciu-sample            ›      
         rx-tx           Ó           ÞðÑ€         É      Q        ùreset         	  >disabled          mmc@10218000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          ¾!€   @          †                    Â     É      E      s      w        °biu ciu ciu-drive ciu-sample            ›               rx-tx           Ó           ÞðÑ€         É      R        ùreset         	  >disabled          mmc@1021c000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          ¾!À   @          †                    Â     Ë      G      u      y        °biu ciu ciu-drive ciu-sample            ›               rx-tx           Ó           ÞðÑ€         É      S        ùreset           >okay            ì           »default         É               i2s@10220000          (    rockchip,rk3128-i2s rockchip,rk3066-i2s          ¾"              †                   Â      Q     ¼        °i2s_clk i2s_hclk            ›                      tx rx           ö           »default         É            ª          	  >disabled          nand-controller@10500000          (    rockchip,rk3128-nfc rockchip,rk2928-nfc          ¾P    @          †                   Â     Å      C        °ahb nfc         »default          É   !   "   #   $   %   &   '   (      	  >disabled          clock-controller@20000000             rockchip,rk3128-cru          ¾                Â   )        °xin24m          $           Œ                                    .#g¸€         ó         syscon@20008000       &    rockchip,rk3128-grf syscon simple-mfd            ¾  €                         +            ó      usb2phy@17c           rockchip,rk3128-usb2phy          ¾  |            Â      Ž        °phyclk          yusb480m_phy               š        C   *        Œ            >okay             ó   *   host-port            †       5         
   linestate           Z            >okay             ó         otg-port          $   †       #          3          4            otg-bvalid otg-id linestate         Z            >okay             ó               hdmi@20034000             rockchip,rk3128-inno-hdmi            ¾ @   @          †       -            Â     G      ¾      	  °pclk ref            »default         É   +   ,   -        ¼   
           ª          	  >disabled       ports                        +       port@0           ¾       endpoint               .         ó            port@1           ¾               phy@20038000              rockchip,rk3128-dsi-dphy             ¾ €   @          Â      ”     r      	  °ref pclk            Z            ¼   
            É      $        ùapb       	  >disabled             ó         timer@20044000        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @              †                   Â     a      U        °pclk timer        timer@20044020        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @              †                   Â     a      V        °pclk timer        timer@20044040        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @@             †       ;            Â     a      W        °pclk timer        timer@20044060        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @`             †       <            Â     a      X        °pclk timer        timer@20044080        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @€             †       =            Â     a      Y        °pclk timer        timer@200440a0        ,    rockchip,rk3128-timer rockchip,rk3288-timer          ¾ @              †       >            Â     a      Z        °pclk timer        watchdog@2004c000              rockchip,rk3128-wdt snps,dw-wdt          ¾ À             †       "            Â     ?      	  >disabled          pwm@20050000          (    rockchip,rk3128-pwm rockchip,rk3288-pwm          ¾               Â     ^        »default         É   /        e         	  >disabled          pwm@20050010          (    rockchip,rk3128-pwm rockchip,rk3288-pwm          ¾              Â     ^        »default         É   0        e         	  >disabled          pwm@20050020          (    rockchip,rk3128-pwm rockchip,rk3288-pwm          ¾               Â     ^        »default         É   1        e         	  >disabled          pwm@20050030          (    rockchip,rk3128-pwm rockchip,rk3288-pwm          ¾  0            Â     ^        »default         É   2        e         	  >disabled          i2c@20056000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c          ¾ `             †                  °i2c          Â     M        »default         É   3                     +            >okay       rtc@51            haoyu,hym8563            ¾   Q        Œ            yxin32k           i2c@2005a000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c          ¾               †                  °i2c          Â     N        »default         É   4                     +          	  >disabled          i2c@2005e000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c          ¾ à             †                  °i2c          Â     O        »default         É   5                     +          	  >disabled          serial@20060000       &    rockchip,rk3128-uart snps,dw-apb-uart            ¾               †                  in6          Â      M     U        °baudclk apb_pclk            ›                     tx rx           »default         É   6   7   8        p           }         	  >disabled          serial@20064000       &    rockchip,rk3128-uart snps,dw-apb-uart            ¾ @             †                  in6          Â      N     V        °baudclk apb_pclk            ›                     tx rx           »default         É   9        p           }         	  >disabled          serial@20068000       &    rockchip,rk3128-uart snps,dw-apb-uart            ¾ €             †                  in6          Â      O     W        °baudclk apb_pclk            ›                     tx rx           »default         É   :        p           }         	  >disabled          saradc@2006c000           rockchip,saradc          ¾ À             †                   Â      [     >        °saradc apb_pclk          É      W        ùsaradc-apb          ‡         	  >disabled          i2c@20072000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c          ¾               †                  °i2c          Â     L        »default         É   ;                     +          	  >disabled          spi@20074000          (    rockchip,rk3128-spi rockchip,rk3066-spi          ¾ @             †                   Â      A     R        °spiclk apb_pclk         ›            	         tx rx           »default         É   <   =   >   ?   @                     +          	  >disabled          dma-controller@20078000           arm,pl330 arm,primecell          ¾ €   @          †                              ™         ´         Â      Â      	  °apb_pclk            Ë            ó         ethernet@2008c000             rockchip,rk3128-gmac             ¾ À   @          †       8          9            macirq eth_wake_irq       8   Â      ~      �      ‚      €            Ô     o      M  °stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac             É      8      
  ùstmmaceth           $           Ö           ä         	  >disabled       mdio              snps,dwmac-mdio                      +             pinctrl           rockchip,rk3128-pinctrl         $                        +            ™   gpio@2007c000             rockchip,gpio-bank           ¾ À             †       $            Â     @         ò                    1        F            ó   C      gpio@20080000             rockchip,gpio-bank           ¾               †       %            Â     A         ò                    1        F         gpio@20084000             rockchip,gpio-bank           ¾ @             †       &            Â     B         ò                    1        F            ó   E      gpio@20088000             rockchip,gpio-bank           ¾ €             †       '            Â     C         ò                    1        F         pcfg-pull-default                     ó   B      pcfg-pull-none           $         ó   A      emmc       emmc-clk            1            A         ó         emmc-cmd            1            B         ó         emmc-cmd1           1            B      emmc-pwr            1            B      emmc-bus1           1            B      emmc-bus4         @  1            B            B            B            B      emmc-bus8         €  1            B            B            B            B            B            B            B            B         ó            gmac       rgmii-pins        ð  1            B      	      B            B            B            B            B            B            B            B            B            B            B            B            B            B      rmii-pins            1            B            B            B            B            B            B            B            B            B            B         hdmi       hdmii2c-xfer             1             A             A         ó   +      hdmi-hpd            1             A         ó   ,      hdmi-cec            1             A         ó   -         i2c0       i2c0-xfer            1              A             A         ó   ;         i2c1       i2c1-xfer            1             A             A         ó   3         i2c2       i2c2-xfer            1            A            A         ó   4         i2c3       i2c3-xfer            1             A             A         ó   5         i2s    i2s-bus       `  1             A       	      A             A             A             A             A         ó          i2s1-bus          `  1             A            A            A            A            A            A         lcdc       lcdc-dclk           1            A      lcdc-den            1            A      lcdc-hsync          1      	      A      lcdc-vsync          1      
      A      lcdc-rgb24        à  1            A            A            A            A            A            A            A            A            A            A            A            A            A            A         nfc    flash-ale           1             A         ó   !      flash-cle           1            A         ó   #      flash-wrn           1            A         ó   (      flash-rdn           1            A         ó   &      flash-rdy           1            A         ó   '      flash-cs0           1            A         ó   $      flash-dqs           1            A         ó   %      flash-bus8        €  1            A            A            A            A            A            A            A            A         ó   "         pwm0       pwm0-pin            1             A         ó   /         pwm1       pwm1-pin            1             A         ó   0         pwm2       pwm2-pin            1             A         ó   1         pwm3       pwm3-pin            1            A         ó   2         sdio       sdio-clk            1             A      sdio-cmd            1             B      sdio-pwren          1             B      sdio-bus4         @  1            B            B            B            B         sdmmc      sdmmc-clk           1            A      sdmmc-cmd           1            B      sdmmc-det           1            B      sdmmc-wp            1            B      sdmmc-pwren         1             B      sdmmc-bus4        @  1            B            B            B            B         sfc    sfc-bus2             1            B            B      sfc-bus4          @  1            B            B            B            B      sfc-clk         1            A      sfc-cs0         1            B      sfc-cs1         1            B         spdif      spdif-tx            1            A         ó            spi0       spi0-clk            1            B         ó   >      spi0-cs0            1            B         ó   ?      spi0-tx         1      	      B         ó   <      spi0-rx         1      
      B         ó   =      spi0-cs1            1            B         ó   @      spi1-clk            1             B      spi1-cs0            1            B      spi1-tx         1            B      spi1-rx         1            B      spi1-cs1            1            B      spi2-clk            1       	      B      spi2-cs0            1             B      spi2-tx         1             B      spi2-rx         1             B         uart0      uart0-xfer           1            B            A         ó   6      uart0-cts           1            A         ó   7      uart0-rts           1             A         ó   8         uart1      uart1-xfer           1      	      B      
      B         ó   9      uart1-cts           1            A      uart1-rts           1            A         uart2      uart2-xfer           1            B            A         ó   :      uart2-cts           1             A      uart2-rts           1             A         usb-host       host-vbus-drv           1             A         ó   F         usb-otg    otg-vbus-drv            1              A         ó   D            chosen          ?/serial@20068000          memory@60000000          ²memory           ¾`   @         regulator-vcc5v0-otg              regulator-fixed         K   C               »default         É   D        Pvcc5v0_otg          _ LK@        w LK@         ó         regulator-vcc5v0-host             regulator-fixed         K   E               »default         É   F        Pvcc5v0_host          �        _ LK@        w LK@         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 mmc0 interrupts interrupt-affinity enable-method device_type reg clocks resets operating-points-v2 #cooling-cells phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports status arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names clock-names power-domains #power-domain-cells pm_qos iommus #iommu-cells reset-names remote-endpoint phys phy-names rockchip,grf interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size vbus-supply dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 fifo-depth max-frequency bus-width rockchip,playback-channels #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents #phy-cells #pwm-cells reg-io-width reg-shift #io-channel-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst #dma-cells rx-fifo-depth tx-fifo-depth gpio-controller #gpio-cells bias-pull-pin-default bias-disable rockchip,pins stdout-path gpio regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on 