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Ÿmain_clkV #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclock-frequencyinterrupt-parentrangesinterruptsclocksclock-names#pwm-cellsresetspinctrl-0pinctrl-namesi2c-scl-rising-time-nsi2c-scl-falling-time-ns#io-channel-cells#dma-cellsst,mem2memdma-requestsdma-channelsdma-mastersvdda-supplyvref-supplyst,adc-channelsg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizephysphy-namesdr_modearm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencypinctrl-1pinctrl-2broken-cdst,sig-dirst,neg-edgest,use-ckinbus-widthvmmc-supplyregulator-min-microvoltregulator-max-microvoltassigned-clocksassigned-clock-parentsst,syscfg#clock-cells#reset-cellsreg-namesinterrupt-namesst,sysconsnps,pblphy-modephy-handlegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxbias-disabledrive-open-drainslew-ratedrive-push-pullbias-pull-upbootargsstdout-pathdevice_typeserial0functioncolorlinux,default-triggerdefault-stateboot-ledregulator-nameregulator-always-on#phy-cells