    8    (            (                                                                       ,PHYTEC phyBOARD-Pollux i.MX8MP        G   2phytec,imx8mp-phyboard-pollux-rdk phytec,imx8mp-phycore-som fsl,imx8mp     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         &   G/soc@0/bus@30800000/ethernet@30bf0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   /soc@0/bus@30800000/i2c@30ad0000          !   /soc@0/bus@30800000/i2c@30ae0000          !   /soc@0/bus@30800000/mmc@30b40000          !   /soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30bb0000          (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                       !  
        2          D            cpu@0           Lcpu          2arm,cortex-a53          X            \             cpsci            q           ~   @                                 @                                         speed_grade                                          *           D         cpu@1           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@2           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@3           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         l2-cache0            2cache            5        C           s              @                   D            opp-table            2operating-points-v2          O        D      opp-1200000000          Z    G         a P        o              I               opp-1600000000          Z    _^         a ~        o               I               opp-1800000000          Z    kI         a B@        o                I                  clock-osc-32k            2fixed-clock                                osc_32k         D   '      clock-osc-24m            2fixed-clock                     n6         osc_24m         D   (      clock-ext1           2fixed-clock                     k@      	  clk_ext1            D   )      clock-ext2           2fixed-clock                     k@      	  clk_ext2            D   *      clock-ext3           2fixed-clock                     k@      	  clk_ext3            D   +      clock-ext4           2fixed-clock                     k@      	  clk_ext4            D   ,      funnel           2arm,coresight-static-funnel    in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint               	        D            port@2          X      endpoint               
        D            port@3          X      endpoint                       D               out-ports      port       endpoint                       D                  reserved-memory                                      dsp@92400000            X    @                        	  disabled            D            pmu          2arm,cortex-a53-pmu                        psci             2arm,psci-1.0             smc       thermal-zones      cpu-thermal                              !         trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical            D            cooling-maps       map0            H         T  M                                 soc-thermal                              !          trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical            D         trip2           1  `        =          Sactive          D            cooling-maps       map0            H         T  M                           map1            H           M                     timer            2arm,armv8-timer       0                                
           z          \      soc@0            2fsl,imx8mp-soc simple-bus                                                >                      soc_unique_id           D      etm@28440000          "   2arm,coresight-etm4x arm,primecell           X(D             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D                  etm@28540000          "   2arm,coresight-etm4x arm,primecell           X(T             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D   	               etm@28640000          "   2arm,coresight-etm4x arm,primecell           X(d             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D   
               etm@28740000          "   2arm,coresight-etm4x arm,primecell           X(t             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D                  funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell          X(0            \      ]      	  wapb_pclk       in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint            D            port@2          X      endpoint            D               out-ports      port       endpoint                       D                   etf@28c04000              2arm,coresight-tmc arm,primecell         X(@            \      ]      	  wapb_pclk       in-ports       port       endpoint                        D               out-ports      port       endpoint               !        D   "               etr@28c06000              2arm,coresight-tmc arm,primecell         X(`            \      ]      	  wapb_pclk       in-ports       port       endpoint               "        D   !               bus@30000000             2fsl,aips-bus simple-bus         X0    @                                            D      gpio@30200000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0                     @          A           \                                                         #                o    X_PMIC_WDOG_B  PMIC_SD_VSEL    PCIe_nPERST LVDS1REG_EN PCIe_nWAKE PCIe_nCLKREQ USB1_OTG_PWR  PCIe_nW_DISABLE          D   w      gpio@30210000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0!                    B          C           \                                                         #       #         5              X_SD2_CD_B       SD2_RESET_B LVDS1_BL_EN            D   G      gpio@30220000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0"                    D          E           \                                                          #       8      #               &                      nCAN1_EN nCAN2_EN           D         gpio@30230000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0#                    F          G           \                                                         #       R          8                    X_PMIC_IRQ_B nRTC_INT nENET0_INT_PWDN         D   ;      gpio@30240000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0$                    H          I           \                                                         #       r                    X_ECSPI1_SSO           D   0      tmu@30260000             2fsl,imx8mp-tmu          X0&             \                $        calib                      D         watchdog@30280000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0(                    N           \             okay            default            %                 D         watchdog@30290000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0)                    O           \           	  disabled            D         watchdog@302a0000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0*                    
           \           	  disabled            D         timer@302d0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0-                    7           \                    wipg per         D         timer@302e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0.                    6           \                    wipg per         D         timer@302f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0/                    5           \                    wipg per         D         pinctrl@30330000             2fsl,imx8mp-iomuxc           X03             D   #   fecgrp       P  $  X                  \    |           `               d               h                  l                  t                  x                  |                                                                                          p                     D   O      flexspi0grp         $     @                  D                   X                   \                   `                  d                      D   M      i2c1grp       0  $    d         @      `         @         D   9      i2c1gpiogrp       0  $     `                 d                     D   :      pmicirqgrp          $                 @        D   <      usdhc3grp          $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   J      usdhc3-100mhzgrp           $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   K      usdhc3-200mhzgrp           $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   L      wdoggrp         $     |                      D   %      ecspi1grp         `  $    H  \               D  `               @  X               L                       D   1      eqosgrp      h  $   T                    X                 |                                                                                x                    t                    h                    d                    `                    \                    l                    p                                           D   R      fan0grp         $    8                      D         flexcan1grp       0  $  <    L         T  8               T        D   5      flexcan2grp       0  $  D    P         T  @               T        D   7      flexcan1reggrp          $  0               T        D         flexcan2reggrp          $  4               T        D         i2c2grp       0  $    h         @     l         @         D   ?      i2c2gpiogrp       0  $    h                 l                     D   @      lvds1grp            $     <                      D         pcie0grp          `  $   4                 @   <                 `   @                 `   L                 @        D   v      pwm3grp         $    4                      D   .      regusdhc2vmmcgrp            $     8              @        D         rtcgrp          $                         D   >      uart1grp          0  $                @  $                @        D   2      usb1vbusgrp         $   D                         D         uart2grp          `  $  (             @  ,                @                 @               @        D   3      usdhc2-gpiogrp          $                   @        D   D      usdhc2grp           $                         $                   (                   ,                   0                   4                 $                        D   C      usdhc2-100mhzgrp            $                         $                   (                   ,                   0                   4                 $                        D   E      usdhc2-200mhzgrp            $                         $                   (                   ,                   0                   4                 $                        D   F         syscon@30340000          2fsl,imx8mp-iomuxc-gpr syscon            X04             D   4      efuse@30350000        )   2fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon            X05             \                                       D      unique-id@8         X              D         speed-grade@10          X              D         mac-address@90          X              D   N      mac-address@96          X              D   Q      calib@264           X  d           D   $         clock-controller@30360000         $   2fsl,imx8mp-anatop fsl,imx8mm-anatop         X06                        D         snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          X07             D   &   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         -   &        4   4                                    \            	  wsnvs-rtc            D         snvs-powerkey            2fsl,sec-v4.0-pwrkey         -   &                          \              wsnvs-pwrkey         ;   t         I        okay            D         snvs-lpgpr        +   2fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr          D            clock-controller@30380000            2fsl,imx8mp-ccm          X08                    U          V                      \   '   (   )   *   +   ,      4  wosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (  W      B            g      h            (  g      8      ,      A      8      @        ~        ; / e         D         reset-controller@30390000            2fsl,imx8mp-src syscon           X09                    Y                      D   f      gpc@303a0000             2fsl,imx8mp-gpc          X0:                                 W                               D      pgc                              power-domain@0                      X            D   `      power-domain@1                      X           D   k      power-domain@2                      X           D   i      power-domain@3                      X           D   j      power-domain@4                      X           \      i      j             W     2      i      j        g      A      8      8        ~; / ׄ         D         power-domain@5                      X           \          6        W      l      H        g      8      8        ~ׄ /         D   U      power-domain@6                      X           \                 -        D   y      power-domain@7                      X           \           f        W      e      f        g      8      8        ~/ ׄ         D   -      power-domain@8                      X           \             D   {      power-domain@9                      X   	        \           4           -        D   x      power-domain@10                     X   
        \                  D   _      power-domain@11                     X           D   |      power-domain@12                     X           D   }      power-domain@13                     X           D   ~      power-domain@14                     X           \           c        W      d      c        g      @      3        ~e k@        D   l      power-domain@15                     X           D   m      power-domain@16                     X           D   a      power-domain@17                     X           \     7             W     7        g      @        ~e         D   h      power-domain@18                     X           \             D   b               bus@30400000             2fsl,aips-bus simple-bus         X0@   @                                            D      pwm@30660000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0f                    Q           \                    wipg per                  	  disabled            D         pwm@30670000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0g                    R           \                    wipg per                  	  disabled            D         pwm@30680000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0h                    S           \                    wipg per                    okay            default            .        D         pwm@30690000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0i                    T           \                    wipg per                  	  disabled            D         timer@306a0000           2nxp,sysctr-timer            X0j                    /           \   (        wper         D         timer@306e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0n                    3           \                    wipg per         D         timer@306f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0o                    3           \                    wipg per         D         timer@30700000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0p                    4           \                    wipg per         D            bus@30800000             2fsl,aips-bus simple-bus         X0   @                                            D      spba-bus@30800000            2fsl,spba-bus simple-bus         X0                                          spi@30820000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                               \                    wipg per         ~Ĵ         W              g      8            /             /                 rx tx           okay               0   	           default            1        D      tpm@0         !   2infineon,slb9670 tcg,tpm_tis-spi            X            CՀ        D            spi@30830000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                                \                    wipg per         ~Ĵ         W              g      8            /            /                 rx tx         	  disabled            D         spi@30840000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                    !           \                    wipg per         ~Ĵ         W              g      8            /            /                 rx tx         	  disabled            D         serial@30860000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             /             /                  rx tx           okay            default            2        D         serial@30880000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             /             /                  rx tx         	  disabled            D         serial@30890000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             /             /                  rx tx           okay            W              g      1        default            3                 D         can@308c0000             2fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      t        g      0        ~bZ                        4              okay            default            5        $   6        D         can@308d0000             2fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      u        g      0        ~bZ                        4              okay            default            7        $   8        D            crypto@30900000          2fsl,sec-v4.0                                     X0                 0                    [           \      k      n      	  waclk ipg            D      jr@1000          2fsl,sec-v4.0-job-ring           X                     i         	  disabled            D         jr@2000          2fsl,sec-v4.0-job-ring           X                      j           D         jr@3000          2fsl,sec-v4.0-job-ring           X  0                   r           D            i2c@30a20000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    #           \              okay                     default gpio               9        3   :        =   0              G   0              D      pmic@25          2nxp,pca9450c            X   %                           ;        default            <        D      regulators     BUCK1            Q         e        w B@         H        VDD_SOC (BUCK1)           5        D         BUCK2            ~         P         Q         e        w          H        VDD_ARM (BUCK2)           5        D         BUCK4            Q         e        w 2Z         2Z        VDD_3V3 (BUCK4)         D         BUCK5            Q         e        w w@         w@        VDD_1V8 (BUCK5)         D         BUCK6            Q         e        w                  NVCC_DRAM_1V1 (BUCK6)           D         LDO1             Q         e        w 0                 NVCC_SNVS_1V8 (LDO1)            D         LDO3             Q         e        w w@         w@        VDDA_1V8 (LDO3)         D         LDO5             Q         e        w 2Z         w@        NVCC_SD2 (LDO5)         D   I            eeprom@51            2atmel,24c32         X   Q                        =      rtc@52           2microcrystal,rv3028         X   R        default            >             ;                                  I        "          D            i2c@30a30000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    $           \              okay                     default gpio               ?        3   @        G   0              =   0              D      eeprom@51            2atmel,24c02         X   Q                       A      leds@62          2nxp,pca9533         X   b   led-1           S         led-2           S         led-3           S               i2c@30a40000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    %           \            	  disabled            D         i2c@30a50000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    &           \            	  disabled            D         serial@30a60000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             /             /                  rx tx         	  disabled            D         mailbox@30aa0000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                    X           \              8           D         mailbox@30e60000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                               8           \   B   $      	  disabled            D         i2c@30ad0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    L           \            	  disabled            D         i2c@30ae0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    M           \            	  disabled            D         mmc@30b40000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         D           Y           i         	  disabled            D         mmc@30b50000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         D           Y           i           okay            W              ~       "  default state_100mhz state_200mhz              C   D        3   E   D        s   F   D        }   G                          H           I        D         mmc@30b60000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         D           Y           i           okay            W             ~ׄ       "  default state_100mhz state_200mhz              J        3   K        s   L                 D         spi@30bb0000             2nxp,imx8mp-fspi         X0                   fspi_base fspi_mmap                k           \                    wfspi_en fspi            ~Ĵ         W                                        okay            default            M        D      flash@0          2jedec,spi-nor           X            Ĵ                               D            dma-controller@30bd0000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                               \            k        wipg ahb                    imx/sdma/sdma-imx7d.bin         D   /      ethernet@30be0000         -   2fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec            X0           0         v          w          x          y         (  \                                    "  wipg ahb ptp enet_clk_ref enet_out            W      ^                           g      6      :      ;      9        ~     sY@                                     N        mac-address            4              okay            default            O        ,   P      	  7rgmii-id             @        D      mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          X             Q        g        y                                          D   P            ethernet@30bf0000         '   2nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a          X0                                         macirq eth_wake_irq          \                                wstmmaceth pclk ptp_ref tx           W      ^                    g      6      :      ;        ~     sY@           Q        mac-address            4           okay            default            R      	  7rgmii-id            ,   S        D      mdio             2snps,dwmac-mdio                              ethernet-phy@1           2ethernet-phy-ieee802.3-c22          X                                 y           g         Q        D   S               bus@30c00000             2fsl,aips-bus simple-bus         X0   @                                            D      spba-bus@30c00000            2fsl,spba-bus simple-bus         X0                                          sai@30c10000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B              B      B      B           wbus mclk0 mclk1 mclk2 mclk3             T              T                  rx tx                  _         	  disabled            D         sai@30c20000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B             B      B      B           wbus mclk0 mclk1 mclk2 mclk3             T             T                  rx tx                  `         	  disabled            D         sai@30c30000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B             B   	   B   
   B           wbus mclk0 mclk1 mclk2 mclk3             T             T                  rx tx                  2         	  disabled            D         sai@30c50000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B             B      B      B           wbus mclk0 mclk1 mclk2 mclk3             T             T   	               rx tx                  Z         	  disabled            D         sai@30c60000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B             B      B      B           wbus mclk0 mclk1 mclk2 mclk3             T   
          T                  rx tx                  Z         	  disabled            D         sai@30c80000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   B             B      B      B           wbus mclk0 mclk1 mclk2 mclk3             T             T                  rx tx                  o         	  disabled            D         easrc@30c90000        "   2fsl,imx8mp-easrc fsl,imx8mn-easrc           X0                    z           \   B           wmem            T             T             T             T             T             T             T             T                @  ctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         imx/easrc/easrc-imx8mn.bin            @                 	  disabled            D         audio-controller@30ca0000            2fsl,imx8mp-micfil           X0                       0         m          n          ,          -         (  \   B      B   6      &      '            )  wipg_clk ipg_clk_app pll8k pll11k clkext3               T                 rx        	  disabled            D         aud2htx@30cb0000             2fsl,imx8mp-aud2htx          X0                               \   B   !        wbus            T                  tx        	  disabled            D         xcvr@30cc0000            2fsl,imx8mp-xcvr          X0     0    0    0            ram regs rxfifo txfifo        $                                         \   B      B   &   B      B   #        wipg phy spba pll_ipg                T             T                  rx tx               B          	  disabled            D            dma-controller@30e00000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   B                wipg ahb                "           imx/sdma/sdma-imx7d.bin         D         dma-controller@30e10000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   B                wipg ahb                g           imx/sdma/sdma-imx7d.bin         D   T      clock-controller@30e20000            2fsl,imx8mp-audio-blk-ctrl           X0                                 @  \           {      |      }                       A      &  wahb sai1 sai2 sai3 sai5 sai6 sai7 axi              U        W                    ~p           D   B         interconnect@32700000            2fsl,imx8mp-noc fsl,imx8m-noc            X2p             \      g        '              V        D   c   opp-table            2operating-points-v2         D   V   opp-200000000           Z           opp-800000000           Z    /       opp-1000000000          Z    ;             bus@32c00000             2fsl,aips-bus simple-bus         X2   @                                            D      isi@32e00000             2fsl,imx8mp-isi          X2    @                          *           \                  waxi apb         ;   W           W         	  disabled            D      ports                                port@0          X       endpoint               X        D   Z         port@1          X      endpoint               Y        D   [               isp@32e10000             2fsl,imx8mp-isp          X2                    J            \                            wisp aclk hclk pclk             W      W         	  Hisp csi2            ;   W          	  disabled            D      ports                                port@1          X               isp@32e20000             2fsl,imx8mp-isp          X2                    K            \                            wisp aclk hclk pclk             W      W         	  Hisp csi2            ;   W         	  disabled            D      ports                                port@1          X               dwe@32e30000             2nxp,imx8mp-dw100            X2                    d           \                  waxi ahb            W           D         csi@32e40000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                               沀         \                            wpclk wrap phy axi           W                    g      >                 W         	  disabled            D      ports                                port@0          X          port@1          X      endpoint               Z        D   X               csi@32e50000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                    P           沀         \                            wpclk wrap phy axi           W                    g      >                 W         	  disabled            D      ports                                port@0          X          port@1          X      endpoint               [        D   Y               dsi@32e60000             2fsl,imx8mp-mipi-dsim            X2             \                   wbus_clk sclk_mipi           W      b              g      8              ~ n6         [n6                              W          	  disabled            D      ports                                port@0          X       endpoint               \        D   ]         port@1          X      endpoint            D                  display-controller@32e80000          2fsl,imx8mp-lcdif            X2             \                       wpix axi disp_axi                                 W         	  disabled            D      port       endpoint               ]        D   \            display-controller@32e90000          2fsl,imx8mp-lcdif            X2                               \                       wpix axi disp_axi               W           okay            D      port       endpoint               ^        D   d            blk-ctrl@32ec0000         !   2fsl,imx8mp-media-blk-ctrl syscon            X2                                    (     _   `   `   _   _   a   _   b   b   a      F  Hbus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2           w   c      c      c      c      c      c      c      c      c       c      c   !   c      c   "   c      c   #   c         /  lcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @  \                                              &  wapb axi cam1 cam2 disp1 disp2 isp phy         0  W      a      b           9     8            (  g      A      8      (      (      @        ~e          e 5'                   D   W   bridge@5c            2fsl,imx8mp-ldb          X   \     (         	  ldb lvds            \     I        wldb         W              g      (        okay            D      ports                                port@0          X       endpoint               d        D   ^         port@1          X      endpoint            D            port@2          X      endpoint               e        D                     pcie-phy@32f00000            2fsl,imx8mp-pcie-phy         X2                 f      f           pciephy perst              g                       okay            \   g        wref                             D   u      blk-ctrl@32f10000             2fsl,imx8mp-hsio-blk-ctrl syscon         X2     $        \                  	  wusb pcie               h   h   i   j   h   k      (  Hbus usb usb-phy1 usb-phy2 pcie pcie-phy       @  w   c      c      c      c      c      c      c      c           noc-pcie usb1 usb2 pcie                                D   g      blk-ctrl@32fc0000             2fsl,imx8mp-hdmi-blk-ctrl syscon         X2           (  \      c                               wapb axi ref_266m ref_24m fdcc         (     l   l   l   l   l   l   l   m   l   l      =  Hbus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv          0  w   c      c      c      c      c      c           hrv lcdif-hdmi hdcp                    D   n      interrupt-controller@32fc2000         %   2fsl,imx8mp-irqsteer fsl,imx-irqsteer            X2                    +                                             @        \      c        wipg            n            D   o      display-bridge@32fc4000          2fsl,imx8mp-hdmi-pvi         X2@                 o                      n         	  disabled            D      ports                                port@0          X       endpoint               p        D   s         port@1          X      endpoint               q        D   t               display-controller@32fc6000          2fsl,imx8mp-lcdif            X2`                 o                   \   r      c             wpix axi disp_axi               n         	  disabled            D      port       endpoint               s        D   p            hdmi@32fd8000            2fsl,imx8mp-hdmi-tx          X2   ~             o                    \      c               r        wiahb isfr cec pix           W              g      6           n                    	  disabled            D      ports                                port@0          X       endpoint               t        D   q         port@1          X               phy@32fdff00             2fsl,imx8mp-hdmi-phy         X2            \      c              wapb ref         W              g                 n                                 	  disabled            D   r         pcie@33800000            2fsl,imx8mp-pcie         X3   @               dbi config          \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9                                 Lpci         	              0  ݁                                               	
           	                             msi                    	!                       	4                         ~                            }                            |                            {           	B           	U               g               f      f           apps turnoff            	f   u      	  	kpcie-phy            okay            default            v        	u   w              	   A        D         pcie-ep@33800000             2fsl,imx8mp-pcie-ep           X3           3     3             dbi addr_space dbi2 atu         \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9        	
                             dma         	B              g               f      f           apps turnoff            	f   u      	  	kpcie-phy            	           	         	  disabled            D         gpu@38000000             2vivante,gc          X8                                 \           4           f        wcore shader bus reg                    W     3     4        g      A      A        ~; ;            x        D         gpu@38008000             2vivante,gc          X8                               \                 f        wcore bus reg                       W     5        g      A        ~;            y        D         video-codec@38300000             2nxp,imx8mm-vpu-g1           X80                               \             W      r        g      8        ~/            z            D         video-codec@38310000             2nxp,imx8mq-vpu-g2           X81                               \     
        W      s      +        g      +        ~)' )'            z           D         blk-ctrl@38330000            2fsl,imx8mp-vpu-blk-ctrl syscon          X83                           {   |   }   ~        Hbus g1 g2 vc8000e           \          
     	        wg1 g2 vc8000e           W      `        g      8        ~/       0  w   c   %   c   $   c   &   c   $   c   '   c   $        g1 g2 vc8000e           D   z      npu@38500000             2vivante,gc          X8P                                 \                i      j        wcore shader bus reg                               D         interrupt-controller@38800000            2arm,gic-v3          X8     8                                                    	                        D         memory-controller@3d400000           2snps,ddrc-3.80a         X=@   @                            D         ddr-pmu@3d800000          %   2fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu            X=   @                 b         usb-phy@381f0040             2fsl,imx8mp-usb-phy          X8 @   @        \              wphy         W              g                 g                       okay            	           D         usb@32f10100             2fsl,imx8mp-dwc3         X2    8              \          @        whsio suspend                                 g                                     	@   @                       okay            D      usb@38100000          
   2snps,dwc3           X8             \                 @        wbus_early ref suspend                  (           	f              	kusb2-phy usb3-phy            	         	        
host            okay            D            usb-phy@382f0040             2fsl,imx8mp-usb-phy          X8/ @   @        \              wphy         W              g                 g                       okay            	           D         usb@32f10108             2fsl,imx8mp-dwc3         X2   8/              \          @        whsio suspend                                 g                                     	@   @                       okay             

         
#        D      usb@38200000          
   2snps,dwc3           X8              \                 @        wbus_early ref suspend                  )           	f              	kusb2-phy usb3-phy            	         	        
host            okay            D            dsp@3b6e8000             2fsl,imx8mp-hifi4            X;n            \   B      B       B      B           wipg ocram core debug               U        
Btx rx rxdb        $  
M                                       imx/dsp/hifi4.bin               B         	  runstall          	  disabled            D            memory@40000000         Lmemory          X    @                regulator-vdd-io             2regulator-fixed          Q         e        w 2Z         2Z        VDD_IO          D   =      chosen        6  
T/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         backlight            2pwm-backlight           default                     
`                    @              
r           
   G              
           
           
         P            D         fan       	   2gpio-fan            default                    
          2              0                          D         panel-lvds           2edt,etml1010g3dra           
           
   A        D      port       endpoint                       D   e            regulator-vcc-5v-sw          2regulator-fixed          Q         e        w LK@         LK@      
  VCC_5V_SW           D         regulator-can1-stby          2regulator-fixed         default                    	{                 w 2Z         2Z      
  can1-stby           D   6      regulator-can2-stby          2regulator-fixed         default                    	{                 w 2Z         2Z      
  can2-stby           D   8      regulator-lvds1          2regulator-fixed          
        	{   w   	            w O         O        lvds1_reg_en            D         regulator-usb1-vbus          2regulator-fixed         default                    	{   w              w LK@         LK@        usb1_host_vbus          D         regulator-usdhc2             2regulator-fixed         default                    VSD_3V3          2Z        w 2Z        	{   G                
        
   d          .        D   H      regulator-vcc-3v3-sw             2regulator-fixed         VCC_3V3_SW           2Z        w 2Z        D   A      __symbols__         /cpus/idle-states/cpu-pd-wait           /cpus/cpu@0         $/cpus/cpu@1         */cpus/cpu@2         0/cpus/cpu@3         6/cpus/l2-cache0         =/opp-table          K/clock-osc-32k          S/clock-osc-24m          [/clock-ext1         d/clock-ext2         m/clock-ext3         v/clock-ext4       !  /funnel/in-ports/port@0/endpoint          !  /funnel/in-ports/port@1/endpoint          !  /funnel/in-ports/port@2/endpoint          !  /funnel/in-ports/port@3/endpoint             /funnel/out-ports/port/endpoint         /reserved-memory/dsp@92400000         '  /thermal-zones/cpu-thermal/trips/trip0        '  /thermal-zones/cpu-thermal/trips/trip1        '  /thermal-zones/soc-thermal/trips/trip0        '  /thermal-zones/soc-thermal/trips/trip1        '  /thermal-zones/soc-thermal/trips/trip2          /soc@0          "/soc@0/etm@28440000       ,  '/soc@0/etm@28440000/out-ports/port/endpoint         5/soc@0/etm@28540000       ,  :/soc@0/etm@28540000/out-ports/port/endpoint         H/soc@0/etm@28640000       ,  M/soc@0/etm@28640000/out-ports/port/endpoint         [/soc@0/etm@28740000       ,  `/soc@0/etm@28740000/out-ports/port/endpoint       0  n/soc@0/funnel@28c03000/in-ports/port@0/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@1/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@2/endpoint       /  /soc@0/funnel@28c03000/out-ports/port/endpoint        +  /soc@0/etf@28c04000/in-ports/port/endpoint        ,  /soc@0/etf@28c04000/out-ports/port/endpoint       +  /soc@0/etr@28c06000/in-ports/port/endpoint          /soc@0/bus@30000000       "   W/soc@0/bus@30000000/gpio@30200000         "   ]/soc@0/bus@30000000/gpio@30210000         "   c/soc@0/bus@30000000/gpio@30220000         "   i/soc@0/bus@30000000/gpio@30230000         "  /soc@0/bus@30000000/gpio@30240000         !  /soc@0/bus@30000000/tmu@30260000          &  /soc@0/bus@30000000/watchdog@30280000         &  /soc@0/bus@30000000/watchdog@30290000         &  /soc@0/bus@30000000/watchdog@302a0000         #  
/soc@0/bus@30000000/timer@302d0000        #  /soc@0/bus@30000000/timer@302e0000        #  /soc@0/bus@30000000/timer@302f0000        %  /soc@0/bus@30000000/pinctrl@30330000          ,   /soc@0/bus@30000000/pinctrl@30330000/fecgrp       1  ,/soc@0/bus@30000000/pinctrl@30330000/flexspi0grp          -  =/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  J/soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          0  \/soc@0/bus@30000000/pinctrl@30330000/pmicirqgrp       /  i/soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  x/soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  /soc@0/bus@30000000/pinctrl@30330000/wdoggrp          /  /soc@0/bus@30000000/pinctrl@30330000/ecspi1grp        -  /soc@0/bus@30000000/pinctrl@30330000/eqosgrp          -  /soc@0/bus@30000000/pinctrl@30330000/fan0grp          1  /soc@0/bus@30000000/pinctrl@30330000/flexcan1grp          1  /soc@0/bus@30000000/pinctrl@30330000/flexcan2grp          4  /soc@0/bus@30000000/pinctrl@30330000/flexcan1reggrp       4  /soc@0/bus@30000000/pinctrl@30330000/flexcan2reggrp       -  %/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  2/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          .  D/soc@0/bus@30000000/pinctrl@30330000/lvds1grp         .  R/soc@0/bus@30000000/pinctrl@30330000/pcie0grp         -  `/soc@0/bus@30000000/pinctrl@30330000/pwm3grp          6  m/soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         ,  /soc@0/bus@30000000/pinctrl@30330000/rtcgrp       .  /soc@0/bus@30000000/pinctrl@30330000/uart1grp         1  /soc@0/bus@30000000/pinctrl@30330000/usb1vbusgrp          .  /soc@0/bus@30000000/pinctrl@30330000/uart2grp         4  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-gpiogrp       /  /soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         $  /soc@0/bus@30000000/syscon@30340000       #  /soc@0/bus@30000000/efuse@30350000        /  /soc@0/bus@30000000/efuse@30350000/unique-id@8        2  #/soc@0/bus@30000000/efuse@30350000/speed-grade@10         2  3/soc@0/bus@30000000/efuse@30350000/mac-address@90         2  </soc@0/bus@30000000/efuse@30350000/mac-address@96         -  E/soc@0/bus@30000000/efuse@30350000/calib@264          .  O/soc@0/bus@30000000/clock-controller@30360000         "  V/soc@0/bus@30000000/snvs@30370000         .  [/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  d/soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  p/soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  {/soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@12          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@13          5  -/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@14          5  9/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@15          5  F/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@16          5  T/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@17          5  `/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@18            k/soc@0/bus@30400000       !  q/soc@0/bus@30400000/pwm@30660000          !  v/soc@0/bus@30400000/pwm@30670000          !  h/soc@0/bus@30400000/pwm@30680000          !  {/soc@0/bus@30400000/pwm@30690000          #  /soc@0/bus@30400000/timer@306a0000        #  /soc@0/bus@30400000/timer@306e0000        #  /soc@0/bus@30400000/timer@306f0000        #  /soc@0/bus@30400000/timer@30700000          /soc@0/bus@30800000       3  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        9  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000/tpm@0          3  /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         3  /soc@0/bus@30800000/spba-bus@30800000/can@308c0000        3  /soc@0/bus@30800000/spba-bus@30800000/can@308d0000        $  /soc@0/bus@30800000/crypto@30900000       ,  /soc@0/bus@30800000/crypto@30900000/jr@1000       ,  /soc@0/bus@30800000/crypto@30900000/jr@2000       ,  /soc@0/bus@30800000/crypto@30900000/jr@3000       !   t/soc@0/bus@30800000/i2c@30a20000          )  d/soc@0/bus@30800000/i2c@30a20000/pmic@25          :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK1         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK2         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK4         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK5         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK6         9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO1          9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO3          9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO5          (  /soc@0/bus@30800000/i2c@30a20000/rtc@52       !   y/soc@0/bus@30800000/i2c@30a30000          !   ~/soc@0/bus@30800000/i2c@30a40000          !   /soc@0/bus@30800000/i2c@30a50000          $  /soc@0/bus@30800000/serial@30a60000       %  /soc@0/bus@30800000/mailbox@30aa0000          %  /soc@0/bus@30800000/mailbox@30e60000          !   /soc@0/bus@30800000/i2c@30ad0000          !  /soc@0/bus@30800000/i2c@30ae0000          !  /soc@0/bus@30800000/mmc@30b40000          !  /soc@0/bus@30800000/mmc@30b50000          !  q/soc@0/bus@30800000/mmc@30b60000          !  %/soc@0/bus@30800000/spi@30bb0000          )  -/soc@0/bus@30800000/spi@30bb0000/flash@0          ,  7/soc@0/bus@30800000/dma-controller@30bd0000       &  (/soc@0/bus@30800000/ethernet@30be0000         :  =/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0         &  /soc@0/bus@30800000/ethernet@30bf0000         :  E/soc@0/bus@30800000/ethernet@30bf0000/mdio/ethernet-phy@1           M/soc@0/bus@30c00000       3  S/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c10000        3  X/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c20000        3  ]/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c30000        3  b/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c50000        3  g/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c60000        3  l/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c80000        5  q/soc@0/bus@30c00000/spba-bus@30c00000/easrc@30c90000          @  w/soc@0/bus@30c00000/spba-bus@30c00000/audio-controller@30ca0000       7  ~/soc@0/bus@30c00000/spba-bus@30c00000/aud2htx@30cb0000        4  /soc@0/bus@30c00000/spba-bus@30c00000/xcvr@30cc0000       ,  /soc@0/bus@30c00000/dma-controller@30e00000       ,  /soc@0/bus@30c00000/dma-controller@30e10000       .  /soc@0/bus@30c00000/clock-controller@30e20000           /soc@0/interconnect@32700000          '  /soc@0/interconnect@32700000/opp-table          /soc@0/bus@32c00000       !  /soc@0/bus@32c00000/isi@32e00000          7  /soc@0/bus@32c00000/isi@32e00000/ports/port@0/endpoint        7  /soc@0/bus@32c00000/isi@32e00000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/isp@32e10000          !  /soc@0/bus@32c00000/isp@32e20000          !  /soc@0/bus@32c00000/dwe@32e30000          !  /soc@0/bus@32c00000/csi@32e40000          7  /soc@0/bus@32c00000/csi@32e40000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/csi@32e50000          7  /soc@0/bus@32c00000/csi@32e50000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/dsi@32e60000          7  &/soc@0/bus@32c00000/dsi@32e60000/ports/port@0/endpoint        7  7/soc@0/bus@32c00000/dsi@32e60000/ports/port@1/endpoint        0  0/soc@0/bus@32c00000/display-controller@32e80000       >  D/soc@0/bus@32c00000/display-controller@32e80000/port/endpoint         0  S/soc@0/bus@32c00000/display-controller@32e90000       >  Z/soc@0/bus@32c00000/display-controller@32e90000/port/endpoint         &  h/soc@0/bus@32c00000/blk-ctrl@32ec0000         0  w/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c       F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@0/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@1/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@2/endpoint         &  /soc@0/bus@32c00000/pcie-phy@32f00000         &  /soc@0/bus@32c00000/blk-ctrl@32f10000         &  /soc@0/bus@32c00000/blk-ctrl@32fc0000         2  /soc@0/bus@32c00000/interrupt-controller@32fc2000         ,  /soc@0/bus@32c00000/display-bridge@32fc4000       B  /soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@0/endpoint         B  /soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@1/endpoint         0  /soc@0/bus@32c00000/display-controller@32fc6000       >  /soc@0/bus@32c00000/display-controller@32fc6000/port/endpoint         "  /soc@0/bus@32c00000/hdmi@32fd8000         8  /soc@0/bus@32c00000/hdmi@32fd8000/ports/port@0/endpoint       !  /soc@0/bus@32c00000/phy@32fdff00            Z/soc@0/pcie@33800000            */soc@0/pcie@33800000            //soc@0/pcie-ep@33800000         8/soc@0/pcie-ep@33800000         /soc@0/gpu@38000000         /soc@0/gpu@38008000         /soc@0/video-codec@38300000         /soc@0/video-codec@38310000         @/soc@0/blk-ctrl@38330000            P/soc@0/npu@38500000       %  T/soc@0/interrupt-controller@38800000          "  X/soc@0/memory-controller@3d400000           _/soc@0/usb-phy@381f0040         i/soc@0/usb@32f10100       !  p/soc@0/usb@32f10100/usb@38100000            {/soc@0/usb-phy@382f0040         /soc@0/usb@32f10108       !  /soc@0/usb@32f10108/usb@38200000            /soc@0/dsp@3b6e8000         /regulator-vdd-io           /backlight          /fan            /panel-lvds         /panel-lvds/port/endpoint           /regulator-vcc-5v-sw            /regulator-can1-stby            /regulator-can2-stby            /regulator-lvds1            /regulator-usb1-vbus            u/regulator-usdhc2           /regulator-vcc-3v3-sw            	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-idle-states cpu-supply cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names cs-gpios spi-max-frequency uart-has-rtscts fsl,clk-source fsl,stop-mode xceiver-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-ramp-delay nxp,dvs-run-voltage nxp,dvs-standby-voltage pagesize vcc-supply aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 cd-gpios disable-wp vmmc-supply vqmmc-supply non-removable reg-names spi-rx-bus-width spi-tx-bus-width #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues phy-handle phy-mode fsl,magic-packet enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,min-output-impedance ti,rx-internal-delay ti,tx-internal-delay interrupt-names intf_mode #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl power-domain-names samsung,pll-clock-frequency interconnects interconnect-names reset-names #phy-cells fsl,refclk-pad-mode fsl,clkreq-unsupported fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names reset-gpio vpcie-supply num-ib-windows num-ob-windows vbus-supply dma-ranges snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk dr_mode fsl,permanently-attached fsl,disable-port-power-control mbox-names mboxes stdout-path brightness-levels default-brightness-level enable-gpios num-interpolated-steps power-supply pwms gpio-fan,speed-map backlight enable-active-high startup-delay-us off-on-delay-us cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 ca_funnel_in_port0 ca_funnel_in_port1 ca_funnel_in_port2 ca_funnel_in_port3 ca_funnel_out_port0 dsp_reserved cpu_alert0 cpu_crit0 soc_alert0 soc_crit0 active1 soc etm0 etm0_out_port etm1 etm1_out_port etm2 etm2_out_port etm3 etm3_out_port hugo_funnel_in_port0 hugo_funnel_in_port1 hugo_funnel_in_port2 hugo_funnel_out_port0 etf_in_port etf_out_port etr_in_port aips1 gpio5 tmu wdog1 wdog2 wdog3 gpt1 gpt2 gpt3 iomuxc pinctrl_fec pinctrl_flexspi0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_pmic pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_ecspi1 pinctrl_eqos pinctrl_fan pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_flexcan1_reg pinctrl_flexcan2_reg pinctrl_i2c2 pinctrl_i2c2_gpio pinctrl_lvds1 pinctrl_pcie0 pinctrl_pwm3 pinctrl_reg_usdhc2_vmmc pinctrl_rtc pinctrl_uart1 pinctrl_usb1_vbus pinctrl_uart2 pinctrl_usdhc2_pins pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz gpr ocotp imx8mp_uid cpu_speed_grade eth_mac1 eth_mac2 tmu_calib anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_mipi_phy1 pgc_pcie_phy pgc_usb1_phy pgc_usb2_phy pgc_mlmix pgc_audio pgc_gpu2d pgc_gpumix pgc_vpumix pgc_gpu3d pgc_mediamix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_vc8000e pgc_hdmimix pgc_hdmi_phy pgc_mipi_phy2 pgc_hsiomix pgc_ispdwp aips2 pwm1 pwm2 pwm4 system_counter gpt6 gpt5 gpt4 aips3 tpm ecspi2 ecspi3 uart3 crypto sec_jr0 sec_jr1 sec_jr2 buck1 buck2 buck4 buck5 buck6 ldo1 ldo3 ldo5 rv3028 uart4 mu2 i2c6 usdhc1 flexspi som_flash sdma1 ethphy1 ethphy0 aips5 sai1 sai2 sai3 sai5 sai6 sai7 easrc micfil aud2htx xcvr sdma3 sdma2 audio_blk_ctrl noc noc_opp_table aips4 isi_0 isi_in_0 isi_in_1 isp_0 isp_1 dewarp mipi_csi_0 mipi_csi_0_out mipi_csi_1 mipi_csi_1_out mipi_dsi dsim_from_lcdif1 mipi_dsi_out lcdif1_to_dsim lcdif2 lcdif2_to_ldb media_blk_ctrl lvds_bridge ldb_from_lcdif2 ldb_lvds_ch0 ldb_lvds_ch1 hsio_blk_ctrl hdmi_blk_ctrl irqsteer_hdmi hdmi_pvi pvi_from_lcdif3 pvi_to_hdmi_tx lcdif3_to_pvi hdmi_tx_from_pvi hdmi_tx_phy pcie pcie0_ep pcie_ep vpumix_blk_ctrl npu gic edacmc usb3_phy0 usb3_0 usb_dwc3_0 usb3_phy1 usb3_1 usb_dwc3_1 dsp reg_vdd_io backlight_lvds fan0 panel1_lvds panel1_in reg_vcc_5v_sw reg_can1_stby reg_can2_stby reg_lvds1_reg_en reg_usb1_vbus reg_vcc_3v3_sw 