  a5   8  Xt   (              X<                             O    renesas,smarc2-evk renesas,rzg3s-smarcm renesas,r9a08g045s33 renesas,r9a08g045                                2   &Renesas SMARC EVK version 2 based on r9a08g045s33      audio1-clk            fixed-clock          ,             9             I         audio2-clk            fixed-clock          ,             9           I         opp-table-0           operating-points-v2           Q         I      opp-137500000            \    2`         c W         q       opp-275000000            \    d*         c W         q       opp-550000000            \     U         c W         q       opp-1100000000           \    A          c W         q                    cpus                                cpu@0             arm,cortex-a55                        cpu                                  psci                                             I   "      cache-controller-0            cache                                             I            extal-clk             fixed-clock          ,             9n6          I         psci              arm,psci-1.0 arm,psci-0.2            smc       soc           simple-bus                                                       I   #   serial@1004b800       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      @         B         C         A         D         D           /eri rxi txi bri dri tei                   O        ?fck         K           Y      ;        `okay            gdefault         u            I   $      serial@1004bc00       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      E         G         H         F         I         I           /eri rxi txi bri dri tei                   P        ?fck         K           Y      <      	  `disabled             I   %      serial@1004c000       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      J         L         M         K         N         N           /eri rxi txi bri dri tei                   Q        ?fck         K           Y      =      	  `disabled             I   &      serial@1004c400       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      O         Q         R         P         S         S           /eri rxi txi bri dri tei                   R        ?fck         K           Y      >        `okay            gdefault         u            I   '      serial@1004c800       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      T         V         W         U         X         X           /eri rxi txi bri dri tei                   S        ?fck         K           Y      ?      	  `disabled             I   (      serial@1004e000       .    renesas,scif-r9a08g045 renesas,scif-r9a07g044                              H  $      Y         [         \         Z         ]         ]           /eri rxi txi bri dri tei                   T        ?fck         K           Y      @      	  `disabled             I   )      rtc@1004ec00          )    renesas,r9a08g045-rtca3 renesas,rz-rtca3                               $  $      ;         <         =           /alarm period carry                    j              ?bus counter         K           Y      ]        `okay             I   *      adc@10058000              renesas,r9a08g045-adc                                $      8                     `         a        ?adclk pclk          Y      N      O        presetn adrst-n         K                                               `okay             I   +   channel@0                      channel@1                     channel@2                     channel@3                     channel@4                     channel@5                     channel@6                     channel@7                     channel@8                        i3c@1005b000              renesas,r9a08g045-i3c                                          h         i      
  ?pclk tclk           $      !         "         %         &         '         (         )         *         +         0         1         3         4         5         6         7         2         F  /ierr terr abort resp cmd ibi rx tx rcv st sp tend nack al tmo wu exit           Y      \      [        presetn tresetn         K                                  	  `disabled             I   ,      clock-controller@1005c000             renesas,r9a08g045-vbattb                                 $       +                     j         	  ?bclk rtx             ,           K           Y      ]        `okay                                           0         I         i2c@10090000          .    renesas,riic-r9a08g045 renesas,riic-r9a09g057                	               `  $                                                                                 /tei ri ti spi sti naki ali tmoi                   K         9 B@        Y      7        K                                    `okay             I   -   codec@1a              dlg,da7212                          	           ?mclk                          	          	        lrise_rfall         !between_clkedge         6 -        G   
        S           `           n   
         I   !         i2c@10090400          .    renesas,riic-r9a08g045 renesas,riic-r9a09g057                	              `  $      	                                             
                              /tei ri ti spi sti naki ali tmoi                   L         9         Y      8        K                                    `okay             I   .   clock-generator@68            renesas,5l35023             h                     ,         0     	       	      	      	      	      	           {n6    D }x@        %   LB/} _' @      ?𐆠00            I   	      power-monitor@44              renesas,isl28022                D          @                     i2c@10090800          .    renesas,riic-r9a08g045 renesas,riic-r9a09g057                	              `  $                                                                                 /tei ri ti spi sti naki ali tmoi                   M         9         Y      9        K                                  	  `disabled             I   /      i2c@10090c00          .    renesas,riic-r9a08g045 renesas,riic-r9a09g057                	              `  $                                                                                  /tei ri ti spi sti naki ali tmoi                   N         9         Y      :        K                                  	  `disabled             I   0      ssi@100a8000          %    renesas,r9a08g045-ssi renesas,rz-ssi                 
              $  $                                      /int_req dma_rx dma_tx                      8         9            "  ?ssi ssi_sfr audio_clk1 audio_clk2           Y      ,             &e     &f        tx rx           K                     	  `disabled             I   1      ssi@100a8400          %    renesas,r9a08g045-ssi renesas,rz-ssi                 
              $  $                                      /int_req dma_rx dma_tx                      :         ;            "  ?ssi ssi_sfr audio_clk1 audio_clk2           Y      -             &i     &j        tx rx           K                     	  `disabled             I   2      ssi@100a8800          %    renesas,r9a08g045-ssi renesas,rz-ssi                 
              $  $                                      /int_req dma_rx dma_tx                      <         =            "  ?ssi ssi_sfr audio_clk1 audio_clk2           Y      .             &m     &n        tx rx           K                     	  `disabled             I   3      ssi@100a8c00          %    renesas,r9a08g045-ssi renesas,rz-ssi                 
              $  $                                      /int_req dma_rx dma_tx         $            >         ?   	            "  ?ssi ssi_sfr audio_clk1 audio_clk2           Y      /             &q     &r        tx rx           K                       `okay            gdefault         u               I          clock-controller@11010000             renesas,r9a08g045-cpg                                             ?extal            ,                                   I         system-controller@11020000            renesas,r9a08g045-sysc                              0  $       '          (          )          *         1  /lpm_int ca55stbydone_int cm33stbyr_int ca55_deny             I   4      pinctrl@11030000              renesas,r9a08g045-pinctrl                                                              4                      E                                _        K           Y      K      L      M         I      eth0-phy-irq-hog             Q        Z   `            `        feth0-phy-irq          eth0             I      txc         p          w                              P      tx_ctl          p  	        w                     P      mux       4  p  
                   !  #  $  %        w           eth1-phy-irq-hog             Q        Z   a            `        feth1-phy-irq          eth1             I      txc         p  8        w                              P      tx_ctl          p  9        w                     P      mux       4  p  :  ;  <  @  D  H  I  J  K  P  R  S  T        w           sd0          I   5   data          (  SD0_DATA0 SD0_DATA1 SD0_DATA2 SD0_DATA3         w        ctrl            SD0_CLK SD0_CMD         w        cd          p            sd0-uhs          I   6   data          (  SD0_DATA0 SD0_DATA1 SD0_DATA2 SD0_DATA3         w        ctrl            SD0_CLK SD0_CMD         w        cd          p            sd0-emmc          i  SD0_DATA0 SD0_DATA1 SD0_DATA2 SD0_DATA3 SD0_DATA4 SD0_DATA5 SD0_DATA6 SD0_DATA7 SD0_CLK SD0_CMD SD0_RST#            w           I         sd2          I   7   data            P11_2 P11_3 P12_0 P12_1                ctrl            P11_1                  mux         p  X  Y  Z  [  `  a  q         audio-clock         AUDIO_CLK1 AUDIO_CLK2                     I         key-1-gpio-hog           Q        Z               `        fkey-1-gpio-irq        key-2-gpio-hog           Q        Z               `        fkey-2-gpio-irq        key-3-gpio-hog           Q        Z               `        fkey-3-gpio-irq        scif0           p  3  4         I         scif3           p             I         sd1          I      data          (  SD1_DATA0 SD1_DATA1 SD1_DATA2 SD1_DATA3         w        ctrl            SD1_CLK SD1_CMD         w        cd          p           sd1-uhs          I      data          (  SD1_DATA0 SD1_DATA1 SD1_DATA2 SD1_DATA3         w        ctrl            SD1_CLK SD1_CMD         w        cd          p           ssi3            p                 I            interrupt-controller@11050000         *    renesas,r9a08g045-irqc renesas,rzg2l-irqc           4                                                      $                                                                                                                                                                                                                                                                                                                                                                                                                                 !        )  /nmi irq0 irq1 irq2 irq3 irq4 irq5 irq6 irq7 tint0 tint1 tint2 tint3 tint4 tint5 tint6 tint7 tint8 tint9 tint10 tint11 tint12 tint13 tint14 tint15 tint16 tint17 tint18 tint19 tint20 tint21 tint22 tint23 tint24 tint25 tint26 tint27 tint28 tint29 tint30 tint31 bus-err ec7tie1-0 ec7tie2-0 ec7tiovf-0                                     	  ?clk pclk            K           Y               I         dma-controller@11820000       '    renesas,r9a08g045-dmac renesas,rz-dmac                                              $       o          p          q          r          s          t          u          v          w          x          y          z          {          |          }          ~                   L  /error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15                                    ?main register           K           Y                    arst rst_async                                 I         mmc@11c00000          *    renesas,sdhi-r9a08g045 renesas,rzg2l-sdhi                                 $       X          Y         0            ,         .         -         /        ?core clkh cd aclk           Y      )        K           `okay            u                      gdefault state_uhs                         
                                                5sY@         I   8      mmc@11c10000          *    renesas,sdhi-r9a08g045 renesas,rzg2l-sdhi                                 $       Z          [         0            0         2         1         3        ?core clkh cd aclk           Y      *        K           `okay            u                      gdefault state_uhs                                             C         P        5sY@         I   9      mmc@11c20000          *    renesas,sdhi-r9a08g045 renesas,rzg2l-sdhi                                 $       \          ]         0            4         6         5         7        ?core clkh cd aclk           Y      +        K         	  `disabled             I   :      ethernet@11c30000         ,    renesas,r9a08g045-gbeth renesas,rzg2l-gbeth                             $  $       D          E          F           /mux fil arp_ns        	  ^rgmii-id          $            E         F         G        ?axi chi refclk          Y      5        K                                    `okay            u           gdefault         g            I   ;   ethernet-phy@7                      r      `                                                                                                                                               )             I            ethernet@11c40000         ,    renesas,r9a08g045-gbeth renesas,rzg2l-gbeth                             $  $       G          H          I           /mux fil arp_ns        	  ^rgmii-id          $            H         I         J        ?axi chi refclk          Y      6        K                                    `okay            u           gdefault         g            I   <   ethernet-phy@7                      r      a                                                                                                                                               )             I            interrupt-controller@12400000             arm,gic-v3          4                                       @             D                 $      	            I         watchdog@12800800         (    renesas,r9a08g045-wdt renesas,rzg2l-wdt                                        "         #        ?pclk oscclk         $       5          4           /wdt perrout         Y      $        K           `okay            8   <         I   =         timer             arm,armv8-timer       P  r                                             
                     %  /sec-phys phys virt hyp-phys hyp-virt          vbattb-xtal           fixed-clock          ,             9            I         aliases         D/soc/i2c@10090400           I/soc/mmc@11c00000           N/soc/ethernet@11c30000          X/soc/ethernet@11c40000          b/soc/i2c@10090000           g/soc/serial@1004bc00            o/soc/serial@1004c400            w/soc/serial@1004b800            /soc/mmc@11c10000         memory@48000000          memory               H       8         regulator0            regulator-fixed       
  SDHI0 Vcc            2Z         2Z        Z                            I         regulator1            regulator-gpio          SDHI0 VccQ           w@         2Z        Z                              2Z    w@             I   >      regulator2            regulator-fixed         fixed-1.8V           w@         w@                           I   
      regulator3            regulator-fixed         fixed-3.3V           2Z         2Z                           I         regulator4            regulator-fixed       
  SDHI2 Vcc            2Z         2Z        Z      A                      I   ?      x3-clock              fixed-clock          ,             9n6          I         chosen          	ignore_loglevel         serial3:115200n8          keys          
    gpio-keys      key-1           r                          	  )USER_SW1             /        =         key-2           r                          	  )USER_SW2             /        =         key-3           r                          	  )USER_SW3             /        =            sound             simple-audio-card           Oi2s         h                                  I   @   simple-audio-card,cpu                        I         simple-audio-card,codec            !            	            I   A         regulator-vcc-sdhi1           regulator-fixed       
  SDHI1 Vcc            2Z         2Z        Z                            I         regulator-vccq-sdhi1              regulator-gpio          SDHI1 VccQ           w@         2Z        Z      "                        2Z    w@             I         __symbols__         /audio1-clk         /audio2-clk         /opp-table-0            /cpus/cpu@0         /cpus/cache-controller-0            /extal-clk          /soc            /soc/serial@1004b800            /soc/serial@1004bc00            /soc/serial@1004c000            /soc/serial@1004c400            #/soc/serial@1004c800            )/soc/serial@1004e000            //soc/rtc@1004ec00           3/soc/adc@10058000           7/soc/i3c@1005b000           ;/soc/clock-controller@1005c000          b/soc/i2c@10090000           B/soc/i2c@10090000/codec@1a          D/soc/i2c@10090400         %  I/soc/i2c@10090400/clock-generator@68            P/soc/i2c@10090800           U/soc/i2c@10090c00           Z/soc/ssi@100a8000           _/soc/ssi@100a8400           d/soc/ssi@100a8800           i/soc/ssi@100a8c00           n/soc/clock-controller@11010000           r/soc/system-controller@11020000         w/soc/pinctrl@11030000           /soc/pinctrl@11030000/eth0          /soc/pinctrl@11030000/eth1          /soc/pinctrl@11030000/sd0           /soc/pinctrl@11030000/sd0-uhs           /soc/pinctrl@11030000/sd0-emmc          /soc/pinctrl@11030000/sd2         "  /soc/pinctrl@11030000/audio-clock           /soc/pinctrl@11030000/scif0         /soc/pinctrl@11030000/scif3         /soc/pinctrl@11030000/sd1           /soc/pinctrl@11030000/sd1-uhs           	/soc/pinctrl@11030000/ssi3        #  /soc/interrupt-controller@11050000          /soc/dma-controller@11820000            /soc/mmc@11c00000           #/soc/mmc@11c10000           )/soc/mmc@11c20000           //soc/ethernet@11c30000        &  4/soc/ethernet@11c30000/ethernet-phy@7           9/soc/ethernet@11c40000        &  >/soc/ethernet@11c40000/ethernet-phy@7         #  C/soc/interrupt-controller@12400000          G/soc/watchdog@12800800          L/vbattb-xtal            X/regulator0         b/regulator1         m/regulator2         v/regulator3         /regulator4       
  /x3-clock           /sound          /sound/simple-audio-card,cpu            /sound/simple-audio-card,codec          /regulator-vcc-sdhi1            /regulator-vccq-sdhi1            	compatible #address-cells #size-cells model #clock-cells clock-frequency phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend reg device_type #cooling-cells next-level-cache enable-method clocks operating-points-v2 cache-level cache-unified cache-size interrupt-parent ranges interrupts interrupt-names clock-names power-domains resets status pinctrl-names pinctrl-0 reset-names #io-channel-cells assigned-clocks assigned-clock-parents quartz-load-femtofarads #sound-dai-cells dlg,micbias1-lvl dlg,micbias2-lvl dlg,dmic-data-sel dlg,dmic-samplephase dlg,dmic-clkrate VDDA-supply VDDSP-supply VDDMIC-supply VDDIO-supply assigned-clock-rates renesas,settings shunt-resistor-micro-ohms renesas,average-samples dmas dma-names #reset-cells #power-domain-cells gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-hog gpios input line-name pinmux power-source output-enable input-enable drive-strength-microamp pins #dma-cells dma-channels pinctrl-1 vmmc-supply vqmmc-supply bus-width mmc-hs200-1_8v non-removable fixed-emmc-driver-type max-frequency sd-uhs-sdr50 sd-uhs-sdr104 phy-mode phy-handle interrupts-extended rxc-skew-psec txc-skew-psec rxdv-skew-psec txen-skew-psec rxd0-skew-psec rxd1-skew-psec rxd2-skew-psec rxd3-skew-psec txd0-skew-psec txd1-skew-psec txd2-skew-psec txd3-skew-psec timeout-sec i2c1 mmc0 ethernet0 ethernet1 i2c0 serial0 serial1 serial3 mmc1 regulator-name regulator-min-microvolt regulator-max-microvolt enable-active-high gpios-states regulator-boot-on regulator-always-on bootargs stdout-path linux,code label wakeup-source debounce-interval simple-audio-card,format simple-audio-card,bitclock-master simple-audio-card,frame-master simple-audio-card,mclk-fs sound-dai audio_clk1 audio_clk2 cluster0_opp cpu0 L3_CA55 extal_clk soc scif0 scif1 scif2 scif3 scif4 scif5 rtc adc i3c vbattb da7212 versa3 i2c2 i2c3 ssi0 ssi1 ssi2 ssi3 cpg sysc pinctrl eth0_pins eth1_pins sdhi0_pins sdhi0_uhs_pins sdhi0_emmc_pins sdhi2_pins audio_clock_pins scif0_pins scif3_pins sdhi1_pins sdhi1_pins_uhs ssi3_pins irqc dmac sdhi0 sdhi1 sdhi2 eth0 phy0 eth1 phy1 gic wdt0 vbattb_xtal vcc_sdhi0 vccq_sdhi0 reg_1p8v reg_3p3v vcc_sdhi2 x3_clk snd_rzg3s cpu_dai codec_dai vcc_sdhi1 vccq_sdhi1 