  x   8  q   (              q                                 radxa,rock-2a rockchip,rk3528                                    +            7Radxa ROCK 2A      aliases          =/pinctrl/gpio@ff610000           C/pinctrl/gpio@ffaf0000           I/pinctrl/gpio@ffb00000           O/pinctrl/gpio@ffb10000           U/pinctrl/gpio@ffb20000           [/soc/i2c@ffa58000            `/soc/mmc@ffbf0000            e/soc/mmc@ffc30000            j/soc/serial@ff9f0000             r/soc/ethernet@ffbe0000        cpus                         +       cpu-map    cluster0       core0            |         core1            |         core2            |         core3            |               cpu@0             arm,cortex-a53                        cpu          psci                                                             cpu@1             arm,cortex-a53                       cpu          psci                                                             cpu@2             arm,cortex-a53                       cpu          psci                                                             cpu@3             arm,cortex-a53                       cpu          psci                                                                firmware       scmi              arm,scmi-smc             ̂              	                     +       protocol@14                                                 opp-table-cpu             operating-points-v2                          opp-1200000000               G           Y Y         
  @      opp-1416000000               Tfr           H H         
  @      opp-1608000000               _"                     
  @      opp-1800000000               kI           Լ Լ         
  @      opp-2016000000               x)                     
  @         opp-table-gpu             operating-points-v2             -   opp-300000000                           Y Y B@               opp-500000000                e           Y Y B@      opp-600000000                #F           Y Y B@      opp-700000000                )'             B@      opp-800000000                /           ~ ~ B@         pinctrl           rockchip,rk3528-pinctrl         '   
                     +            4               gpio@ff610000             rockchip,gpio-bank               a                       r     s        ;       G            F        V           b                        n                       c      gpio@ffaf0000             rockchip,gpio-bank                                                     ;       I            F        V           b                        n                                     _      gpio@ffb00000             rockchip,gpio-bank                                      $     %        ;       K            F        V           b          @             n                               gpio@ffb10000             rockchip,gpio-bank                                                     ;       L            F        V           b          `             n                                     `      gpio@ffb20000             rockchip,gpio-bank                                                     ;       N            F        V           b                       n                                     K      pcfg-pull-up                               pcfg-pull-down                             pcfg-pull-none                             pcfg-pull-none-drv-level-0                                         pcfg-pull-none-drv-level-2                                        pcfg-pull-up-drv-level-2                                          pcfg-pull-none-smt                                      arm       clk       emmc       emmc-bus8                                                                                                                       L      emmc-clk                                    M      emmc-cmd                                    N      emmc-strb                                   O         eth       fephy      fephym0-led-link                                    >      fephym0-led-spd                                 ?         fspi          gpu       hdmi          hsm       i2c0          i2c1       i2c1m0-xfer                                              1         i2c2       i2c2m1-xfer                                              3         i2c3          i2c4       i2c4-xfer                                                 4         i2c5          i2c6          i2c7       i2c7-xfer                                                5         i2s0          i2s1          jtag          pcie          pdm       pmu       pwm0          pwm1       pwm1m0-pins                                 6         pwm2       pwm2m0-pins                                 7         pwm3          pwm4          pwm5          pwm6          pwm7          pwr       ref       rgmii      rgmii-miim                                               E      rgmii-rx-bus2         0                                                  G      rgmii-tx-bus2         0                                                   F      rgmii-rgmii-clk                                              H      rgmii-rgmii-bus       @                                	                              I         scr       sdio0      sdio0-bus4        @                                                               P      sdio0-clk                                   Q      sdio0-cmd                                   R         sdio1      sdio1-bus4        @                                            	                  S      sdio1-clk                                   T      sdio1-cmd                                   U         sdmmc      sdmmc-bus4        @                                                               V      sdmmc-clk                                   W      sdmmc-cmd                                   X      sdmmc-det                                   Y      sdmmc-vol-ctrl-h                                     e         spdif         spi0          spi1          tsi0          tsi1          uart0      uart0m0-xfer                                                 0         uart1         uart2         uart3         uart4         uart5         uart6         uart7         bluetooth      bt-wake-host-h                             host-wake-bt-h                                leds       state-led-b                                  ]      sys-led-g                                    ^         usb    usb-host-en                                   d      usb-otg-en                                   i         wifi       usb-wifi-pwr                                     b      wifi-reg-on-h                                    h      wifi-wake-host-h                                  ethernet       gmac1-rstn-l                                     J            psci              arm,psci-1.0 arm,psci-0.2            smc       reserved-memory                      +            4   shmem@10f000              arm,scmi-shmem                                             	         timer             arm,armv8-timer       0  ;                              
        clock-xin24m              fixed-clock         n6         xin24m                                 clock-gmac50m             fixed-clock                 gmac0                                  soc           simple-bus          4                                          +      interrupt-controller@fed01000             arm,gic-400       @                                 @             `                 ;      	           n                                          qos@ff200000              rockchip,rk3528-qos syscon                                qos@ff200080              rockchip,rk3528-qos syscon                               qos@ff200100              rockchip,rk3528-qos syscon                               qos@ff200200              rockchip,rk3528-qos syscon                               qos@ff200280              rockchip,rk3528-qos syscon                              qos@ff200300              rockchip,rk3528-qos syscon                               qos@ff200380              rockchip,rk3528-qos syscon                              qos@ff210000              rockchip,rk3528-qos syscon               !                qos@ff210080              rockchip,rk3528-qos syscon               !               qos@ff220000              rockchip,rk3528-qos syscon               "                            qos@ff220080              rockchip,rk3528-qos syscon               "                           qos@ff240000              rockchip,rk3528-qos syscon               $                qos@ff250000              rockchip,rk3528-qos syscon               %                            qos@ff260000              rockchip,rk3528-qos syscon               &                            qos@ff270000              rockchip,rk3528-qos syscon               '                            qos@ff270080              rockchip,rk3528-qos syscon               '                           qos@ff270100              rockchip,rk3528-qos syscon               '                           qos@ff270200              rockchip,rk3528-qos syscon               '                           qos@ff270280              rockchip,rk3528-qos syscon               '                          qos@ff270300              rockchip,rk3528-qos syscon               '                            qos@ff270380              rockchip,rk3528-qos syscon               '                    !      qos@ff270480              rockchip,rk3528-qos syscon               '                    "      qos@ff270500              rockchip,rk3528-qos syscon               '                     #      qos@ff280000              rockchip,rk3528-qos syscon               (                      $      qos@ff280080              rockchip,rk3528-qos syscon               (                     %      qos@ff280100              rockchip,rk3528-qos syscon               (                     &      qos@ff280180              rockchip,rk3528-qos syscon               (                    '      qos@ff280200              rockchip,rk3528-qos syscon               (                     (      qos@ff280280              rockchip,rk3528-qos syscon               (                    )      qos@ff280300              rockchip,rk3528-qos syscon               (                     *      qos@ff280380              rockchip,rk3528-qos syscon               (                    +      qos@ff280400              rockchip,rk3528-qos syscon               (                     ,      syscon@ff340000           rockchip,rk3528-vpu-grf syscon               4                     @      syscon@ff348000       $    rockchip,rk3528-pipe-phy-grf syscon              4                    [      syscon@ff360000           rockchip,rk3528-vo-grf syscon                6                     :      clock-controller@ff4a0000             rockchip,rk3528-cru              J                 '     t                                                      	      
                              z      y            L      L  7   Fq ; ;] Q 沀e  р  C ׄ #F  sY@e                        Lxin24m gmac0                        X                     syscon@ff540000           rockchip,rk3528-ioc-grf syscon               T                     
      power-management@ff600000         &    rockchip,rk3528-pmu syscon simple-mfd                `             power-controller          !    rockchip,rk3528-power-controller            e                        +                   power-domain@4                                           y              e          power-domain@5                      y           e          	  disabled          power-domain@6                      y           e          power-domain@7                    $  y                      !   "   #        e          power-domain@8                    $  y   $   %   &   '   (   )   *   +   ,        e                gpu@ff700000          "    rockchip,rk3528-mali arm,mali-450                p                 '                    7@                            	  Lbus core          T  ;       X          Y          V          \          ]          Z          [         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1               -                            w        okay               .      spi@ff9c0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    Lspiclk apb_pclk         ;                     /      /           tx rx                                      +          	  disabled          spi@ff9d0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    Lspiclk apb_pclk         ;                     /      /           tx rx                                      +          	  disabled          serial@ff9f0000       &    rockchip,rk3528-uart snps,dw-apb-uart                                              k        Lbaudclk apb_pclk            ;       (              /   	   /                                 okay            default            0      serial@ff9f8000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     Lbaudclk apb_pclk            ;       )              /      /   
                                          	  disabled          serial@ffa00000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                      Lbaudclk apb_pclk            ;       *              /      /                                             	  disabled          serial@ffa08000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     Lbaudclk apb_pclk            ;       +              /      /                                             	  disabled          serial@ffa10000       &    rockchip,rk3528-uart snps,dw-apb-uart                                             1        Lbaudclk apb_pclk            ;       ,              /      /                                             	  disabled          serial@ffa18000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       "              Lbaudclk apb_pclk            ;       -              /      /                                             	  disabled          serial@ffa20000       &    rockchip,rk3528-uart snps,dw-apb-uart                                        %              Lbaudclk apb_pclk            ;       .              /      /                                             	  disabled          serial@ffa28000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       (              Lbaudclk apb_pclk            ;       /              /      /                                             	  disabled          i2c@ffa50000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  Li2c pclk            ;       =                                      +          	  disabled          i2c@ffa58000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  Li2c pclk            ;       >                                      +            okay            default            1   eeprom@50             belling,bl24c16a atmel,24c16                P                               2         i2c@ffa60000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     j     i      	  Li2c pclk            ;       ?           default            3                     +          	  disabled          i2c@ffa68000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  Li2c pclk            ;       @                                      +          	  disabled          i2c@ffa70000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     3     2      	  Li2c pclk            ;       A           default            4                                   +          	  disabled          i2c@ffa78000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  Li2c pclk            ;       B                                      +          	  disabled          i2c@ffa80000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  Li2c pclk            ;       C                                      +          	  disabled          i2c@ffa88000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                    5     4      	  Li2c pclk            ;       D           default            5                                   +          	  disabled          pwm@ffa90000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  Lpwm pclk                     	  disabled          pwm@ffa90010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     o      n      	  Lpwm pclk                       okay            default            6            f      pwm@ffa90020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  Lpwm pclk                       okay            default            7            g      pwm@ffa90030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm               0                      o      n      	  Lpwm pclk                     	  disabled          pwm@ffa98000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  Lpwm pclk                     	  disabled          pwm@ffa98010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                    r      q      	  Lpwm pclk                     	  disabled          pwm@ffa98020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  Lpwm pclk                     	  disabled          pwm@ffa98030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm              0                      r      q      	  Lpwm pclk                     	  disabled          adc@ffae0000              rockchip,rk3528-saradc                                                     Lsaradc apb_pclk         ;                                      o        saradc-apb                     okay            /   8            \      ethernet@ffbd0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                               0                                       >  Lstmmaceth clk_mac_ref mac_clk_rx mac_clk_tx pclk_mac aclk_mac           ;       q          t           macirq eth_wake_irq         ;   9        Frmii                                      
  stmmaceth           '   :        O   ;         _        p   <           =               	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@2            ethernet-phy-ieee802.3-c22                            "                 default            >   ?                          9         stmmac-axi-config                                                                      ;      rx-queues-config                           <   queue0           tx-queues-config                           =   queue0              ethernet@ffbe0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                                                                 (  Lstmmaceth clk_mac_ref pclk_mac aclk_mac         ;       y          |           macirq eth_wake_irq                             a      
  stmmaceth           '   @        O   A         _        p   B           C                 okay            output          ;   D      	  Frgmii-id               2        default            E   F   G   H   I   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                      default            J          N         /         A   K                  D         stmmac-axi-config                                                                      A      rx-queues-config                           B   queue0           tx-queues-config                           C   queue0              mmc@ffbf0000          0    rockchip,rk3528-dwcmshc rockchip,rk3588-dwcmshc                               '                          7 n6        (                                         Lcore bus axi block timer            ;                  M         default            L   M   N   O                    (        A      B      C      D      E        core bus axi block timer            okay            [            e         w                                      2           8      mmc@ffc10000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         Lbiu ciu ciu-drive ciu-sample                       ;                  M         default            P   Q   R                            g        reset         	  disabled          mmc@ffc20000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         Lbiu ciu ciu-drive ciu-sample                       ;                  M         default            S   T   U                            h        reset         	  disabled          mmc@ffc30000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                (     '                  Lbiu ciu ciu-drive ciu-sample                       ;                  M         default            V   W   X   Y                                    reset              Z        okay            [            e                                       2           Z      dma-controller@ffd60000           arm,pl330 arm,primecell                      @                ^      	  Lapb_pclk          l  ;                                                                                                                           /      phy@ffdc0000              rockchip,rk3528-naneng-combphy                                '      {        7                {                    Lref apb pipe                                c      e        phy apb         0           ;   @        M   [      	  disabled             chosen          cserial0:1500000n8         adc-keys          	    adc-keys            o   \            {buttons          w@           d   button-maskrom          MASKROM                                 leds          
    gpio-leds           default            ]   ^   led-0                      on        
  heartbeat           G   _             
  heartbeat         led-1                      on          status          G   `              default-on           regulator-0v9-vdd             regulator-fixed         vdd_0v9          !         5        G         _         w   a      regulator-1v1-vcc-ddr             regulator-fixed         vcc_ddr          !         5        G         _         w   a      regulator-1v8-vcc             regulator-fixed         vcc_1v8          !         5        G w@        _ w@        w   2            8      regulator-3v3-vcc             regulator-fixed         vcc_3v3          !         5        G 2Z        _ 2Z        w   a            2      regulator-3v3-vcc-wifi            regulator-fixed                  G   K               default            b      	  vcc_wifi            G 2Z        _ 2Z        w   2      regulator-5v0-vcc-sys             regulator-fixed         vcc5v0_sys           !         5        G LK@        _ LK@            a      regulator-5v0-vcc-usb20           regulator-fixed                  G   c               default            d        vcc5v0_usb20            G LK@        _ LK@        w   a      regulator-vccio-sd            regulator-gpio          G   _               default            e      	  vccio_sd            G w@        _ 2Z         w@     2Z           w   a            Z      regulator-vdd-arm             pwm-regulator              f                    a        vdd_arm          !         5        G b        _ Sh                             regulator-vdd-logic           pwm-regulator              g                    a      
  vdd_logic            !         5        G 
        _ Y                       .      rfkill            rfkill-gpio         rfkill-wlan         default            h        wlan               _             regulator-5v0-vcc-usb30-otg           regulator-fixed                  G   _               default            i        vcc5v0_usb30_otg            G LK@        _ LK@        w   a         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c1 mmc0 mmc1 serial0 ethernet0 cpu reg device_type enable-method clocks operating-points-v2 cpu-supply phandle arm,smc-id shmem #clock-cells opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,grf ranges interrupts gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells power-domains bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins no-map clock-frequency clock-output-names assigned-clocks assigned-clock-rates clock-names #reset-cells #power-domain-cells pm_qos status interrupt-names resets mali-supply dmas dma-names reg-io-width reg-shift pinctrl-names pinctrl-0 pagesize read-only vcc-supply #pwm-cells reset-names #io-channel-cells vref-supply phy-handle phy-mode snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-is-integrated snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use clock_in_out phy-supply reset-assert-us reset-deassert-us reset-gpios max-frequency bus-width cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable vmmc-supply vqmmc-supply fifo-depth rockchip,default-sample-phase cap-sd-highspeed disable-wp sd-uhs-sdr104 #dma-cells arm,pl330-periph-burst #phy-cells rockchip,pipe-grf rockchip,pipe-phy-grf stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt color default-state function linux,default-trigger regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply enable-active-high states pwms pwm-supply regulator-settling-time-up-us radio-type shutdown-gpios 