 %   8 
    (             	                             !    Toradex Verdin AM62 on Ivy Board          Y   toradex,verdin-am62-nonwifi-ivy toradex,verdin-am62-nonwifi toradex,verdin-am62 ti,am625                         "            1      chosen           =serial2:115200n8          firmware       optee            linaro,optee-tz          Ismc       psci             arm,psci-1.0             Ismc          P   }         timer-cl0-cpu0           arm,armv8-timer       0   X                                 
            P   ~      pmu          arm,cortex-a53-pmu           X                  P         bus@f0000             c         simple-bus           "            1           n                          B       B              `       `              p0      p0             p      p                                                                                                                                 
      0      0             0     0           0       0              1       1              1      1             ;       ;              @      @             C`      C`             D0     D0           D      D             H       H       @      P       P              `       `              p       p                             1                                                              $     +       +        0     C       C              x       x              x      x                  P      bus@4000000           c         simple-bus           "            1            n                            P      pinctrl@4084000           c         pinctrl-single           u    @                 y                                  P      mcu-gpio0-0-default-pins                  @         P   
      mcu-gpio0-1-default-pins                 @         P   /      mcu-gpio0-2-default-pins                 @         P         mcu-gpio0-3-default-pins                 @         P   	      mcu-gpio0-4-default-pins                 @         P   0      mcu-i2c0-default-pins               D @    H @          P         mcu-mcan0-default-pins              8 @    4            P         mcu-uart0-default-pins               @                P         wkup-clkout0-default-pins                           P         wkup-uart0-default-pins              , @    0      $ @    (            P            esm@4100000                    ti,j721e-esm             u                                   U         P         timer@4800000            ti,am654-timer           u                            #            fck               #                  	   reserved             P         timer@4810000            ti,am654-timer           u                            0            fck               0                  	   reserved             P         timer@4820000            ti,am654-timer           u                            1            fck               1                  	   reserved             P         timer@4830000            ti,am654-timer           u                            2            fck               2                  	   reserved             P         serial@4a00000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled            'default         5            P         i2c@4900000          ti,am64-i2c ti,omap4-i2c             u                      X       k            "            1                  j                  j            fck       	   disabled            'default         5            P         spi@4b00000          ti,am654-mcspi ti,omap4-mcspi            u                      X                   "            1                                              	   disabled             P         spi@4b10000          ti,am654-mcspi ti,omap4-mcspi            u                      X                   "            1                                              	   disabled             P         interrupt-controller@4210000             ti,sci-intr          u    !                 ?            T                    i           z                             h            P         gpio@4201000             ti,am64-gpio ti,keystone-gpio            u                                                      X               T        i                                        O                  O             gpio          "    GPIO2 GPIO3                               'default         5      	   
         P   1   pcie-1-reset-hog                                     PCIE_1_RESET#            
         okay             P            watchdog@4880000             ti,j7-rti-wdt            u                                                                           %               	   reserved             P         can@4e08000          bosch,m_can           u                                 <m_can message_ram                                                     
   hclk cclk            F          @   @   @   @                 okay            'default         5            P         can@4e18000          bosch,m_can           u                                 <m_can message_ram                                                     
   hclk cclk            F          @   @   @   @              	   disabled             P         m4fss@5000000            ti,am64-m4fss             u                                 
  <iram dram           U      	           \am62-mcu-m4f0_0-fw          z              	        j               okay            z                             P            bus@b00000            c         simple-bus           "            1         x   n                    $     +       +        0     C       C              x       x              x      x                  P      bus@43000000              c         simple-bus           u    C                   "            1            n        C               P      chipid@14             c         ti,am654-chipid          u               P         syscon@18            ti,am62-opp-efuse-table syscon           u               P   h      ethernet-mac-syscon@200          ti,am62p-cpsw-mac-efuse syscon           u               P   I      syscon@4008          ti,am62-usb-phy-ctrl syscon          u  @            P   B      syscon@4018          ti,am62-usb-phy-ctrl syscon          u  @            P   D         target-module@2b300050           ti,sysc-omap2 ti,sysc         0   u    +0 P           +0 T           +0 X               <rev sysc syss                                                                     r                  r             fck          "            1            n        +0        serial@0             ti,am64-uart ti,am654-uart           u                X                   okay            'default         5                                       P            i2c@2b200000             ti,am64-i2c ti,omap4-i2c             u    +                   X                   "            1                  k                  k            fck       	   disabled             P         rtc@2b1f0000             ti,am62-rtc          u    +                  X       d                  u         u             vbus osc32k               u                     P         watchdog@2b000000            ti,j7-rti-wdt            u    +                                                                        %               	   reserved             P         r5fss@78000000           ti,am62-r5fss            "            1             nx       x      x      x                   w            okay             P      r5f@78000000             ti,am62-r5f          ux      x           
  <atcm btcm           U      y           \am62-wkup-r5f0_0-fw         "           1           @           z              y        j               okay            z                             P            temperature-sensor@b00000            ti,j7200-vtm              u                                         _           L            P   _         sram@70000000         
   mmio-sram            u    p                   "            1            n        p               P         interrupt-controller@1800000             arm,gic-v3           "            1             n        i            T      P   u                                                                             X      	            P      msi-controller@1820000           arm,gic-v3-its           u                     b    @           ~                    P            bus@100000           simple-bus           "            1            n                       P      phy@4044             ti,am654-phy-gmii-sel            u  @D                       P   H      clock-controller@4130            ti,am62-epwm-tbclk           u  A0                       P   U      clock-controller@82e0            ti,am62-audio-refclk             u                                                  %                              P         clock-controller@82e4            ti,am62-audio-refclk             u                       
                 
        %                             }x@         P            bus@48000000              c         simple-bus           "            1                     n    H       H       @                      P      mailbox@4d000000              c         ti,am654-secure-proxy                      <target_data rt scfg       0   u    M              J`             J@                 rx_012           X       "            P         interrupt-controller@48000000            ti,sci-inta          u    H                  i             T                     ~        z                            D   $                       P         dma-controller@485c0100          ti,am64-dmss-bcdma           u    H\            L              J             J             K             H`             HJ@             HL              HB                ;  <gcfg bchanrt rchanrt tchanrt ringrt ring tchan rchan bchan                                z                                  2   !        H   "         P         dma-controller@485c0000          ti,am64-dmss-pktdma          u    H\             J             J             K              H^             HJ              HL              HC               3  <gcfg rchanrt tchanrt ringrt ring tchan rchan rflow                                z                      H   #   $   %   &        ^                    2   )   +   -   /   1   3        t   *   ,   .   2         P            system-controller@44043000            c         ti,k2g-sci                     rx tx           z                    <debug_messages           u    D0                P      power-controller              c         ti,sci-pm-domain                        P         clock-controller              c         ti,k2g-sci-clk                      P         reset-controller              c         ti,sci-reset                        P            crypto@40900000          ti,am62-sa3ul            u    @               $                u         u            tx rx1 rx2           P         mailbox@43600000                       ti,am654-secure-proxy                      <target_data rt scfg       0   u    C`             D             D               	   disabled             P         pinctrl@f4000             c         pinctrl-single           u     @                y                                  P   2   main-epwm0a-default-pins                          P   V      main-epwm0b-default-pins                          P   W      main-epwm1a-default-pins                          P   X      main-gpio0-0-default-pins                 @         P         main-gpio0-3-default-pins                @         P   6      main-gpio0-4-default-pins                @         P   7      main-gpio0-5-default-pins                @         P   8      main-gpio0-6-default-pins                @         P   9      main-gpio0-7-default-pins                @         P         main-gpio0-11-default-pins              , @         P         main-gpio0-12-default-pins              0 @         P   5      main-gpio0-15-default-pins              < @         P         main-gpio0-16-default-pins              @ @         P         main-gpio0-17-default-pins              D @         P   O      main-gpio0-20-default-pins              P @         P         main-gpio0-21-default-pins              T @         P   n      main-gpio0-22-default-pins              X @         P         main-gpio0-25-default-pins              d @         P   N      main-gpio0-26-default-pins              h @         P         main-gpio0-27-default-pins              l @         P         main-gpio0-29-default-pins              t @         P   m      main-gpio0-30-default-pins              x @         P         main-gpio0-31-default-pins              | @         P   4      main-gpio0-32-default-pins               @         P   l      main-gpio0-34-default-pins               @         P         main-gpio0-35-default-pins               @         P         main-gpio0-36-default-pins               @         P   w      main-gpio0-38-default-pins               @         P   P      main-gpio0-40-default-pins               @         P   r      main-gpio0-41-default-pins               @         P   )      main-gpio0-42-default-pins               @         P   +      main-gpio0-71-default-pins             $ @         P         main-gpio0-72-default-pins             ( @         P         main-gpio1-17-default-pins              @         P         main-gpio1-18-default-pins              @         P   :      main-gpio1-19-default-pins              @         P   i      main-gpio1-48-default-pins             @ @         P   =      main-gpio1-49-default-pins             D @         P         main-gpio1-50-default-pins             T @         P   p      main-i2c0-default-pins              @    @          P         main-i2c1-default-pins              @    @          P   &      main-i2c2-default-pins               @    @         P   '      main-i2c3-default-pins              @   @         P   (      main-system-audio-ext-reflock1-default-pins                        P         main-mcasp0-default-pins                 @    @         @          P   Y      main-mcasp1-default-pins                  @    @         @         P   Z      main-mcan0-default-pins             @               P   T      main-mdio1-default-pins            `     \ @          P   M      main-mmc0-default-pins        P       @    @    @    @    @    @    @     @    @    @          P   ;      main-mmc1-default-pins        0     < @   4 @   0 @   , @   ( @   $ @          P   <      main-mmc2-default-pins        8       @    @    @    @    @    @    @          P   A      main-ospi0-default-pins       8             ,      0       @     @     @     @          P   F      main-rgmii1-default-pins          `     L @   P @   T @   X @   H @   D @   4     8     <     @     0     ,            P   G      main-rgmii2-default-pins          `      @    @    @    @    @   | @   l     p     t     x     h     d            P         main-spi1-default-pins                @   $ @   ( @         P   -      main-spi1-cs0-default-pins               @         P   .      main-system-clkout0-default-pins                          P   L      main-system-extint-default-pins             @          P   "      main-uart0-default-pins             @               P         main-uart1-default-pins              @       @             P         main-uart5-default-pins               @        4 @   8           P         main-usb1-default-pins             X            P   E      main-vout-default-pins                                                                                                                                     \     `           P   R      ivy-leds-default-pins         @      @   @   @   @    @    @    @   , @         P   {         esm@420000                     ti,j721e-esm             u     B                                             P         timer@2400000             c         ti,am654-timer           u    @                  X       x                  $            fck               $           %      $                 $                     P         timer@2410000            ti,am654-timer           u    A                  X       y                  %            fck               %           %      %                 %                     P         timer@2420000            ti,am654-timer           u    B                  X       z                  &            fck               &           %      &                 &                     P         timer@2430000            ti,am654-timer           u    C                  X       {                  '            fck               '           %      '                 '                     P         timer@2440000            ti,am654-timer           u    D                  X       |                  (            fck               (           %      (                 (                     P         timer@2450000            ti,am654-timer           u    E                  X       }                  )            fck               )           %      )                 )                     P         timer@2460000            ti,am654-timer           u    F                  X       ~                  *            fck               *           %      *                 *                     P         timer@2470000            ti,am654-timer           u    G                  X                         +            fck               +           %      +                 +                     P         serial@2800000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk             okay            'default         5            P         serial@2810000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk             okay            'default         5            P         serial@2820000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled             P         serial@2830000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled             P         serial@2840000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled             P         serial@2850000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled            'default         5            P         serial@2860000           ti,am64-uart ti,am654-uart           u                      X                                                       fclk          	   disabled             P         i2c@20000000             ti,am64-i2c ti,omap4-i2c             u                        X                   "            1                  f                  f            fck          okay            'default         5                     P      dsi@e            toshiba,tc358778             u                            %                 }x@        'default         5                              refclk                                                           	   disabled             P      ports            "            1             P      port@0           u       endpoint                          !         P   S         port@1           u               tpm@2e        !   st,st33ktpm2xi2c tcg,tpm-tis-i2c             u   .      pmic@30          ti,tps65219          u   0        'default         5   "                     X                  /   #        <   #        I   #        V   $        b   %        n   $        z   $                     regulators     buck1                              P         q        +VDD_CORE (PMIC BUCK1)           P         buck2                              w@         w@        +V1.8 (PMIC BUCK2)           P   %      buck3                                               +VDD_DDR (PMIC BUCK3)            P         ldo1                                        2Z         2Z        +V3.3_1.8_SD (PMIC LDO1)             P   o      ldo2                               P         P        +VDDR_CORE (PMIC LDO2)           P         ldo3                               w@         w@        +V1.8A (PMIC LDO3)           P         ldo4                               &%         &%        +V2.5_ETH (PMIC LDO4)            P               rtc@32           epson,rx8130             u   2         P         sensor@48            ti,tmp1075           u   H      adc@49           ti,tla2024           u   I         "            1            *            P   |   channel@0            u            <           H         channel@1            u           <           H         channel@2            u           <           H         channel@3            u           <           H         channel@4            u           <           H         channel@5            u           <           H         channel@6            u           <           H         channel@7            u           <           H            eeprom@50            st,24c02 atmel,24c02            P            u   P         i2c@20010000             ti,am64-i2c ti,omap4-i2c             u                       X                   "            1                  g                  g            fck          okay            'default         5   &         P      temperature-sensor@4f            ti,tmp1075           u   O      eeprom@57            st,24c02 atmel,24c02             u   W        P            i2c@20020000             ti,am64-i2c ti,omap4-i2c             u                       X                   "            1                  h                  h            fck       	   disabled            'default         5   '         P         i2c@20030000             ti,am64-i2c ti,omap4-i2c             u                       X                   "            1                  i                  i            fck          okay            'default         5   (         P      adc@40           ti,ads1119           u   @        'default         5   )                     X   )           Y   *        e   *        q   *         "           *            1             P   q   channel@0            u            }             channel@1            u           }               adc@41           ti,ads1119           u   A        'default         5   +                     X   *           Y   ,        e   ,        q   ,         "           *            1             P   v   channel@0            u            }             channel@1            u           }                  spi@20100000             ti,am654-mcspi ti,omap4-mcspi            u                       X                   "            1                                              	   disabled             P         spi@20110000             ti,am654-mcspi ti,omap4-mcspi            u                       X                   "            1                                                 okay            'default         5   -   .   /   0                        1         1               P      tpm@1         !   infineon,slb9670 tcg,tpm_tis-spi             u           I      fram@2           fujitsu,mb85rs256 atmel,at25             u                      T           @        P            spi@20120000             ti,am654-mcspi ti,omap4-mcspi            u                       X                   "            1                                              	   disabled             P         interrupt-controller@a00000          ti,sci-intr          u                      ?            T                    i           z                                          P   3      gpio@600000          ti,am64-gpio ti,keystone-gpio            u     `               0     2               2       !   &   2   F   H                                   3         X                           T        i              \                          M                  M             gpio          o     DIGI_1 DIGI_2 REL1 REL2      REL3                                                                                    'default         5   4   5   6   7   8   9         P         gpio@601000          ti,am64-gpio ti,keystone-gpio            u     `                       @     2       ^   )   2   )         2   /         2   2                             3         X                           T        i              4                          N                  N             gpio          \                    REL4                                                                              'default         5   :         P   >      mmc@fa10000          ti,am62-sdhci             u                                  X                        9                  9         9            clk_ahb clk_xin                                                                ,           B            Y             okay            'default         5   ;         p         P         mmc@fa00000          ti,am62-sdhci             u                                  X       S                 :                  :         :            clk_ahb clk_xin                                           ~                                                           	        B                                    /             okay            'default         5   <   =        E   >   0            N        Y   ?        e   @         r         P         mmc@fa20000          ti,am62-sdhci             u                                  X       R                                                        clk_ahb clk_xin                                           ~                                                           	        B                                    /          	   disabled            5   A         P         dwc3-usb@f900000             ti,am62-usb           u                                                    ref            B             "            1                              n         okay                      P      usb@31000000          
   snps,dwc3            u    1                   X                            host peripheral         high-speed          otg                                     		         okay             P      port       endpoint               C         P   k               dwc3-usb@f910000             ti,am62-usb           u                                                    ref            D             "            1                              n         okay                      P      usb@31100000          
   snps,dwc3            u    1                  X                            host peripheral         high-speed          host                              'default         5   E         okay             P            bus@fc00000          simple-bus           u                      "            1             n         P      spi@fc40000          ti,am654-ospi cdns,qspi-nor           u                                    X                  	           	)           	9                   K                 K           %      K           	!              K            "            1          	   disabled            'default         5   F         P            gpu@fd00000       8   ti,am62-gpu img,img-axe-1-16m img,img-axe img,img-rogue          u                                         core             X       V                            	Na            P         ethernet@8000000             ti,am642-cpsw-nuss           "            1            u                     
  <cpsw_nuss            n                                                                   %                  fck                        l                                                                        F          #  tx0 tx1 tx2 tx3 tx4 tx5 tx6 tx7 rx          'default         5   G         okay             P      ethernet-ports           "            1       port@1           u            	a        	mport1           	s   H           	x                	   I            	   J        	rgmii-rxid           okay             P         port@2           u            	a        	mport2           	s   H           	x                 okay            	   K        	rgmii-rxid           P            mdio@f00             ti,cpsw-mdio ti,davinci_mdio             u                       "            1                                fck         	 B@         okay                             %                 }x@        'default         5   L   M         P      ethernet-phy@0           ethernet-phy-id2000.a231             u                         X              'default         5   N   O                         	   
        	          	           	            P   J      ethernet-phy@2           u           'default         5   P                     X   &           	            P   K         cpts@3d000           ti,j721e-cpts            u                                        cpts            	          f           cpts            

           
             dss@30200000             ti,am625-dss             u    0              0              0 `            0 p            0             0             0             0               +  <common vidl1 vid ovr1 ovr2 vp1 vp2 common1                                        Q                  fck vp1 vp2          X       T         	   disabled            'default         5   R         P      ports            "            1             P      port@1           u      endpoint               S         P   !               spinlock@2a000000            ti,am64-hwspinlock           u    *                  
9            P         mailbox@29000000             ti,am64-mailbox          u    )                   X       L          M                      
G           
Y            okay             P      mbox-m4-0           
k                    
v                    P         mbox-r5-0           
k                   
v                    P            pwm@23100000             ti,am3352-ecap          
            u    #                       3                  3             fck       	   disabled             P         pwm@23110000             ti,am3352-ecap          
            u    #                       4                  4             fck       	   disabled             P         pwm@23120000             ti,am3352-ecap          
            u    #                       5                  5             fck       	   disabled             P         counter@23200000             ti,am62-eqep             u    #                        ;                  ;             X       t         	   disabled             P         counter@23210000             ti,am62-eqep             u    #!                       <                  <             X       u         	   disabled             P         counter@23220000             ti,am62-eqep             u    #"                       >                  >             X       v         	   disabled             P         can@20701000             bosch,m_can           u     p             p                <m_can message_ram                 b                  b         b         
   hclk cclk            X                          
  int0 int1            F          @   @   @   @                 okay            'default         5   T         P         watchdog@e000000             ti,j7-rti-wdt            u                             }                  }                 }            %      }            P         watchdog@e010000             ti,j7-rti-wdt            u                            ~                  ~                 ~            %      ~            P         watchdog@e020000             ti,j7-rti-wdt            u                                                                           %                  P         watchdog@e030000             ti,j7-rti-wdt            u                                                                           %                  P         watchdog@e0f0000             ti,j7-rti-wdt            u                                                                           %                  P         pwm@23000000             ti,am64-epwm ti,am3352-ehrpwm           
            u    #                        V               U          V          
   tbclk fck         	   disabled            'default         5   V   W         P         pwm@23010000             ti,am64-epwm ti,am3352-ehrpwm           
            u    #                       W               U         W          
   tbclk fck         	   disabled            'default         5   X         P         pwm@23020000             ti,am64-epwm ti,am3352-ehrpwm           
            u    #                       X               U         X          
   tbclk fck         	   disabled             P         audio-controller@2b00000             ti,am33xx-mcasp-audio             u                                  <mpu dat          X                            tx rx                                   E             tx rx                               fck                           %                                	   disabled            'default         5   Y        
          @  
                                                                      
           
             P         audio-controller@2b10000             ti,am33xx-mcasp-audio             u                                  <mpu dat          X                            tx rx                                  E            tx rx                               fck                           %                                	   disabled            'default         5   Z        
          @  
                                                                      
           
             P         audio-controller@2b20000             ti,am33xx-mcasp-audio             u                                  <mpu dat          X                            tx rx                                  E            tx rx                               fck                           %                                	   disabled             P         ticsi2rx@30102000            ti,j721e-csi2rx-shim                     G             rx0          u    0                                   "            1             n      	   disabled             P      csi-bridge@30101000          ti,j721e-csi2rx cdns,csi2rx          u    0                 X                            error_irq irq         H                                                                  F   sys_clk p_clk pixel_if0_clk pixel_if1_clk pixel_if2_clk pixel_if3_clk           	s   [        
dphy             P      ports            "            1       port@0           u          	   disabled             P         port@1           u         	   disabled             P         port@2           u         	   disabled             P         port@3           u         	   disabled             P         port@4           u         	   disabled             P                  phy@30110000             cdns,dphy-rx             u    0                                            	   disabled             P   [      pruss@30040000           ti,am625-pruss           u    0                       Q            "            1            n        0              P      memories@0           u                              <dram0 dram1 shrdram2             P         cfg@26000            ti,pruss-cfg syscon          u `             "            1            n     `              P      clocks           "            1       coreclk-mux@3c           u   <                           Q          Q              \        %      Q            P   \      iepclk-mux@30            u   0                           Q      \           ]        %   \         P   ]            interrupt-controller@20000           ti,pruss-intc            u                T        i         `   X       X          Y          Z          [          \          ]          ^          _         X  host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7          P   ^      pru@34000            ti,am625-pru             u @   0        $            <iram control debug          \am62x-pru0-fw               ^         X                 vring            P         pru@38000            ti,am625-pru             u    0  @     D            <iram control debug          \am62x-pru1-fw               ^         X                 vring            P           memory-controller@3b000000           ti,am64-gpmc                  P                  P             fck           u    ;              P                	  <cfg data             X       j           
           
            "            1            T        i                             	   disabled             P        ecc@25010000             ti,am64-elm          u    %                   X                        6                  6             fck       	   disabled             P           clock-divider-oldi           fixed-factor-clock                                         
           
            P   Q      thermal-zones            P     main0-thermal           
                        _             P     trips      main0-alert         + s        7          Opassive          P   `      main0-crit          + (        7        	  Ocritical             P           cooling-maps       map0            B   `      0  G   a   b   c   d            main1-thermal           
                        _            P     trips      main1-alert         + s        7          Opassive          P   e      main1-crit          + (        7        	  Ocritical             P           cooling-maps       map0            B   e      0  G   a   b   c   d               cpus             "            1       cpu-map    cluster0             P  	   core0           V   a      core1           V   b      core2           V   c      core3           V   d            cpu@0            arm,cortex-a53           u            Zcpu         fpsci            t              @                                 @                      f           g                                       P   a      cpu@1            arm,cortex-a53           u           Zcpu         fpsci            t              @                                 @                      f           g                                       P   b      cpu@2            arm,cortex-a53           u           Zcpu         fpsci            t              @                                 @                      f           g                                       P   c      cpu@3            arm,cortex-a53           u           Zcpu         fpsci            t              @                                 @                      f           g                                       P   d         opp-table            operating-points-v2-ti-cpu                       h         P   g   opp-200000000                                      * [      opp-400000000               ׄ                       * [      opp-600000000               #F                       * [      opp-800000000               /                       * [      opp-1000000000              ;                       * [      opp-1250000000              J|                      * [         ;      opp-1400000000              SrN                       * [         l2-cache0            cache            G        U           v              @                    P   f      aliases         a/bus@f0000/can@20701000       #  f/bus@f0000/bus@4000000/can@4e08000        2  k/bus@f0000/ethernet@8000000/ethernet-ports/port@1         2  u/bus@f0000/ethernet@8000000/ethernet-ports/port@2           /bus@f0000/i2c@20000000         /bus@f0000/i2c@20010000         /bus@f0000/i2c@20020000       #  /bus@f0000/bus@4000000/i2c@4900000          /bus@f0000/i2c@20030000         /bus@f0000/mmc@fa10000          /bus@f0000/mmc@fa00000          /bus@f0000/mmc@fa20000          /bus@f0000/i2c@20000000/rtc@32        #  /bus@f0000/bus@b00000/rtc@2b1f0000          /bus@f0000/serial@2810000         6  /bus@f0000/bus@b00000/target-module@2b300050/serial@0           /bus@f0000/serial@2800000         &  /bus@f0000/bus@4000000/serial@4a00000           /bus@f0000/serial@2850000         )  /bus@f0000/dwc3-usb@f900000/usb@31000000          )  /bus@f0000/dwc3-usb@f910000/usb@31100000          connector         %   gpio-usb-b-connector usb-b-connector            'default         5   i           >               	mUSB_1                       j   port       endpoint               k         P   C            gpio-keys         
   gpio-keys           'default         5   l      	   disabled             P  
   key-wakeup             
                          	mWake-Up                              P           memory@80000000         Zmemory           u                    regulator-vsodimm            regulator-fixed       
  +V_SODIMM            P   #      regulator-3v3            regulator-fixed          2Z         2Z        On-module +V3.3         "   #         P   $      regulator-1v2-dsi            regulator-fixed          O         O        On-module +V1.2_DSI         "   %         P         regulator-1v8-dsi            regulator-fixed          w@         w@        On-module +V1.8_DSI         "   %         P          regulator-1v0-eth            regulator-fixed          B@         B@        On-module +V1.0_ETH         "   %         P        regulator-1v8-eth            regulator-fixed          w@         w@        On-module +V1.8_ETH         "   %         P        regulator-force-sleep-moci           regulator-fixed          -                                            CTRL_SLEEP_MOCI#             P        regulator-sdhci1             regulator-fixed         'default         5   m         -                          @          2Z         2Z      	  +V3.3_SD            P  N          P   ?      regulator-sdhci1-vqmmc           regulator-gpio          'default         5   n                          LDO1-VSEL-SD (PMIC)          w@         2Z        a w@     2Z           "   o         P   @      regulator-usb0-vbus          regulator-fixed         'default         5   p         -           >   2             LK@         LK@      	  USB_1_EN             P   j      reserved-memory          "            1             n         P     tfa@9e780000             u    x                 h            r         P        optee@9e800000           u                    h            r         P        memory@9da00000          shared-dma-pool          u                      r         P         memory@9db00000          shared-dma-pool          u                      r         P         memory@9cb00000          shared-dma-pool          u                      r         P         memory@9cc00000          shared-dma-pool          u                      r         P            voltage-divider-ain1             voltage-divider         *           y   q                                   P   s      current-sense-shunt-ain1             current-sense-shunt         *            y   q                     P   u      mux-controller-0          	   gpio-mux            'default         5   r                          (             P   t      ain1-voltage             io-channel-mux          ain1_voltage            y   s            parent             t                ain1-current             io-channel-mux           ain1_current           y   u        parent             t                voltage-divider-ain2             voltage-divider         *           y   v                                   P   x      current-sense-shunt-ain2             current-sense-shunt         *            y   v                     P   z      mux-controller-1          	   gpio-mux            'default         5   w                          $             P   y      ain2-voltage             io-channel-mux          ain2_voltage            y   x            parent             y                ain2-current             io-channel-mux           ain2_current           y   z        parent             y                leds          
   gpio-leds           'default         5   {   led-0                      off         status                        >             led-1                      off         status                        >             led-2                      off         status                        >   
          led-3                      off         status                        >   	          led-4                      off         status                                     led-5                      off         status                           %          led-6                      off         status                           "          led-7                      off         status                           !             regulator-3v2-ain1           regulator-fixed          0          0       
  +3V2_AIN1            P   *      regulator-3v2-ain2           regulator-fixed          0          0       
  +3V2_AIN2            P   ,      ivy-input-voltage            voltage-divider         y   |                      \      ivy-5v-voltage           voltage-divider         y   |             X          .      ivy-3v3-voltage          voltage-divider         y   |                       ix      ivy-1v8-voltage          voltage-divider         y   |             X          ix      __symbols__         0/firmware/psci          5/timer-cl0-cpu0         @/pmu            D/bus@f0000          O/bus@f0000/bus@4000000        '  Y/bus@f0000/bus@4000000/pinctrl@4084000        @  b/bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-0-default-pins       @  w/bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-1-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-2-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-3-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-4-default-pins       =  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-i2c0-default-pins          >  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-mcan0-default-pins         >  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-uart0-default-pins         A  /bus@f0000/bus@4000000/pinctrl@4084000/wkup-clkout0-default-pins          ?  /bus@f0000/bus@4000000/pinctrl@4084000/wkup-uart0-default-pins        #  /bus@f0000/bus@4000000/esm@4100000        %  /bus@f0000/bus@4000000/timer@4800000          %   /bus@f0000/bus@4000000/timer@4810000          %  +/bus@f0000/bus@4000000/timer@4820000          %  6/bus@f0000/bus@4000000/timer@4830000          &  /bus@f0000/bus@4000000/serial@4a00000         #  /bus@f0000/bus@4000000/i2c@4900000        #  A/bus@f0000/bus@4000000/spi@4b00000        #  J/bus@f0000/bus@4000000/spi@4b10000        4  S/bus@f0000/bus@4000000/interrupt-controller@4210000       $  a/bus@f0000/bus@4000000/gpio@4201000       5  k/bus@f0000/bus@4000000/gpio@4201000/pcie-1-reset-hog          (  /bus@f0000/bus@4000000/watchdog@4880000       #  /bus@f0000/bus@4000000/can@4e08000        #  /bus@f0000/bus@4000000/can@4e18000        %  /bus@f0000/bus@4000000/m4fss@5000000            /bus@f0000/bus@b00000         #  /bus@f0000/bus@b00000/bus@43000000        -  /bus@f0000/bus@b00000/bus@43000000/chipid@14          -  /bus@f0000/bus@b00000/bus@43000000/syscon@18          ;  /bus@f0000/bus@b00000/bus@43000000/ethernet-mac-syscon@200        /  /bus@f0000/bus@b00000/bus@43000000/syscon@4008        /  /bus@f0000/bus@b00000/bus@43000000/syscon@4018        6  /bus@f0000/bus@b00000/target-module@2b300050/serial@0         #  /bus@f0000/bus@b00000/i2c@2b200000        #  /bus@f0000/bus@b00000/rtc@2b1f0000        (  /bus@f0000/bus@b00000/watchdog@2b000000       %  /bus@f0000/bus@b00000/r5fss@78000000          2  $/bus@f0000/bus@b00000/r5fss@78000000/r5f@78000000         0  6/bus@f0000/bus@b00000/temperature-sensor@b00000         @/bus@f0000/sram@70000000          (  H/bus@f0000/interrupt-controller@1800000       ?  O/bus@f0000/interrupt-controller@1800000/msi-controller@1820000          W/bus@f0000/bus@100000           a/bus@f0000/bus@100000/phy@4044        ,  n/bus@f0000/bus@100000/clock-controller@4130       ,  y/bus@f0000/bus@100000/clock-controller@82e0       ,  /bus@f0000/bus@100000/clock-controller@82e4         /bus@f0000/bus@48000000       )  /bus@f0000/bus@48000000/mailbox@4d000000          6  /bus@f0000/bus@48000000/interrupt-controller@48000000         0  /bus@f0000/bus@48000000/dma-controller@485c0100       0  /bus@f0000/bus@48000000/dma-controller@485c0000       &  /bus@f0000/system-controller@44043000         7  /bus@f0000/system-controller@44043000/power-controller        7  /bus@f0000/system-controller@44043000/clock-controller        7  /bus@f0000/system-controller@44043000/reset-controller          /bus@f0000/crypto@40900000          /bus@f0000/mailbox@43600000         /bus@f0000/pinctrl@f4000          2  /bus@f0000/pinctrl@f4000/main-epwm0a-default-pins         2  !/bus@f0000/pinctrl@f4000/main-epwm0b-default-pins         2  1/bus@f0000/pinctrl@f4000/main-epwm1a-default-pins         3  A/bus@f0000/pinctrl@f4000/main-gpio0-0-default-pins        3  X/bus@f0000/pinctrl@f4000/main-gpio0-3-default-pins        3  o/bus@f0000/pinctrl@f4000/main-gpio0-4-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-5-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-6-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-7-default-pins        4  /bus@f0000/pinctrl@f4000/main-gpio0-11-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-12-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-15-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-16-default-pins       4  &/bus@f0000/pinctrl@f4000/main-gpio0-17-default-pins       4  8/bus@f0000/pinctrl@f4000/main-gpio0-20-default-pins       4  M/bus@f0000/pinctrl@f4000/main-gpio0-21-default-pins       4  ]/bus@f0000/pinctrl@f4000/main-gpio0-22-default-pins       4  m/bus@f0000/pinctrl@f4000/main-gpio0-25-default-pins       4  }/bus@f0000/pinctrl@f4000/main-gpio0-26-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-27-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-29-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-30-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-31-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-32-default-pins       4   /bus@f0000/pinctrl@f4000/main-gpio0-34-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-35-default-pins       4  1/bus@f0000/pinctrl@f4000/main-gpio0-36-default-pins       4  @/bus@f0000/pinctrl@f4000/main-gpio0-38-default-pins       4  W/bus@f0000/pinctrl@f4000/main-gpio0-40-default-pins       4  f/bus@f0000/pinctrl@f4000/main-gpio0-41-default-pins       4  u/bus@f0000/pinctrl@f4000/main-gpio0-42-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-71-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-72-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-17-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-18-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-19-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-48-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-49-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-50-default-pins       0  /bus@f0000/pinctrl@f4000/main-i2c0-default-pins       0  #/bus@f0000/pinctrl@f4000/main-i2c1-default-pins       0  0/bus@f0000/pinctrl@f4000/main-i2c2-default-pins       0  =/bus@f0000/pinctrl@f4000/main-i2c3-default-pins       E  J/bus@f0000/pinctrl@f4000/main-system-audio-ext-reflock1-default-pins          2  \/bus@f0000/pinctrl@f4000/main-mcasp0-default-pins         2  k/bus@f0000/pinctrl@f4000/main-mcasp1-default-pins         1  z/bus@f0000/pinctrl@f4000/main-mcan0-default-pins          1  /bus@f0000/pinctrl@f4000/main-mdio1-default-pins          0  /bus@f0000/pinctrl@f4000/main-mmc0-default-pins       0  /bus@f0000/pinctrl@f4000/main-mmc1-default-pins       0  /bus@f0000/pinctrl@f4000/main-mmc2-default-pins       1  /bus@f0000/pinctrl@f4000/main-ospi0-default-pins          2  /bus@f0000/pinctrl@f4000/main-rgmii1-default-pins         2  /bus@f0000/pinctrl@f4000/main-rgmii2-default-pins         0  /bus@f0000/pinctrl@f4000/main-spi1-default-pins       4  /bus@f0000/pinctrl@f4000/main-spi1-cs0-default-pins       :  /bus@f0000/pinctrl@f4000/main-system-clkout0-default-pins         9  /bus@f0000/pinctrl@f4000/main-system-extint-default-pins          1  2/bus@f0000/pinctrl@f4000/main-uart0-default-pins          1  @/bus@f0000/pinctrl@f4000/main-uart1-default-pins          1  N/bus@f0000/pinctrl@f4000/main-uart5-default-pins          0  \/bus@f0000/pinctrl@f4000/main-usb1-default-pins       0  i/bus@f0000/pinctrl@f4000/main-vout-default-pins       /  ~/bus@f0000/pinctrl@f4000/ivy-leds-default-pins          /bus@f0000/esm@420000           /bus@f0000/timer@2400000            /bus@f0000/timer@2410000            /bus@f0000/timer@2420000            /bus@f0000/timer@2430000            /bus@f0000/timer@2440000            /bus@f0000/timer@2450000            /bus@f0000/timer@2460000            /bus@f0000/timer@2470000            /bus@f0000/serial@2800000           /bus@f0000/serial@2810000           /bus@f0000/serial@2820000           /bus@f0000/serial@2830000           $/bus@f0000/serial@2840000           //bus@f0000/serial@2850000           :/bus@f0000/serial@2860000           E/bus@f0000/i2c@20000000         O/bus@f0000/i2c@20000000/dsi@e         $  Z/bus@f0000/i2c@20000000/dsi@e/ports       4  k/bus@f0000/i2c@20000000/dsi@e/ports/port@0/endpoint       1  r/bus@f0000/i2c@20000000/pmic@30/regulators/buck1          1  /bus@f0000/i2c@20000000/pmic@30/regulators/buck2          1  /bus@f0000/i2c@20000000/pmic@30/regulators/buck3          0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo1       0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo2       0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo3       0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo4         /bus@f0000/i2c@20000000/rtc@32          /bus@f0000/i2c@20000000/adc@49          /bus@f0000/i2c@20010000         /bus@f0000/i2c@20020000         /bus@f0000/i2c@20030000         /bus@f0000/i2c@20030000/adc@40          /bus@f0000/i2c@20030000/adc@41          /bus@f0000/spi@20100000         /bus@f0000/spi@20110000          /bus@f0000/spi@20120000       '  */bus@f0000/interrupt-controller@a00000          9/bus@f0000/gpio@600000          D/bus@f0000/gpio@601000          /bus@f0000/mmc@fa10000          /bus@f0000/mmc@fa00000          /bus@f0000/mmc@fa20000          O/bus@f0000/dwc3-usb@f900000       )  /bus@f0000/dwc3-usb@f900000/usb@31000000          7  V/bus@f0000/dwc3-usb@f900000/usb@31000000/port/endpoint          ^/bus@f0000/dwc3-usb@f910000       )  /bus@f0000/dwc3-usb@f910000/usb@31100000            /bus@f0000/bus@fc00000        #  /bus@f0000/bus@fc00000/spi@fc40000          e/bus@f0000/gpu@fd00000          i/bus@f0000/ethernet@8000000       2  p/bus@f0000/ethernet@8000000/ethernet-ports/port@1         2  {/bus@f0000/ethernet@8000000/ethernet-ports/port@2         %  /bus@f0000/ethernet@8000000/mdio@f00          4  /bus@f0000/ethernet@8000000/mdio@f00/ethernet-phy@0       4  /bus@f0000/ethernet@8000000/mdio@f00/ethernet-phy@2         /bus@f0000/dss@30200000         /bus@f0000/dss@30200000/ports         .  /bus@f0000/dss@30200000/ports/port@1/endpoint           /bus@f0000/spinlock@2a000000            /bus@f0000/mailbox@29000000       &  /bus@f0000/mailbox@29000000/mbox-m4-0         &  /bus@f0000/mailbox@29000000/mbox-r5-0           /bus@f0000/pwm@23100000         /bus@f0000/pwm@23110000         /bus@f0000/pwm@23120000         /bus@f0000/counter@23200000         	/bus@f0000/counter@23210000         /bus@f0000/counter@23220000         /bus@f0000/can@20701000          /bus@f0000/watchdog@e000000         */bus@f0000/watchdog@e010000         4/bus@f0000/watchdog@e020000         >/bus@f0000/watchdog@e030000         H/bus@f0000/watchdog@e0f0000         S/bus@f0000/pwm@23000000         Y/bus@f0000/pwm@23010000         _/bus@f0000/pwm@23020000       $  d/bus@f0000/audio-controller@2b00000       $  s/bus@f0000/audio-controller@2b10000       $  e/bus@f0000/audio-controller@2b20000         l/bus@f0000/ticsi2rx@30102000          1  w/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000          >  /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@0         >  /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@1         >  /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@2         >  /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@3         >  /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@4           /bus@f0000/phy@30110000         /bus@f0000/pruss@30040000         %  /bus@f0000/pruss@30040000/memories@0          $  /bus@f0000/pruss@30040000/cfg@26000       :  /bus@f0000/pruss@30040000/cfg@26000/clocks/coreclk-mux@3c         9  /bus@f0000/pruss@30040000/cfg@26000/clocks/iepclk-mux@30          5  /bus@f0000/pruss@30040000/interrupt-controller@20000          $  	/bus@f0000/pruss@30040000/pru@34000       $  /bus@f0000/pruss@30040000/pru@38000       &  /bus@f0000/memory-controller@3b000000           /bus@f0000/ecc@25010000         /clock-divider-oldi         */thermal-zones          8/thermal-zones/main0-thermal          /  F/thermal-zones/main0-thermal/trips/main0-alert        .  R/thermal-zones/main0-thermal/trips/main0-crit           ]/thermal-zones/main1-thermal          /  k/thermal-zones/main1-thermal/trips/main1-alert        .  w/thermal-zones/main1-thermal/trips/main1-crit           /cpus/cpu-map/cluster0          /cpus/cpu@0         /cpus/cpu@1         /cpus/cpu@2         /cpus/cpu@3         /opp-table          /l2-cache0          /connector/port/endpoint            /gpio-keys          /gpio-keys/key-wakeup           /regulator-vsodimm          /regulator-3v3          /regulator-1v2-dsi          /regulator-1v8-dsi          	/regulator-1v0-eth          /regulator-1v8-eth          !/regulator-force-sleep-moci         6/regulator-sdhci1           E/regulator-sdhci1-vqmmc         U/regulator-usb0-vbus            c/reserved-memory            s/reserved-memory/tfa@9e780000            /reserved-memory/optee@9e800000       !  /reserved-memory/memory@9da00000          !  /reserved-memory/memory@9db00000          !  /reserved-memory/memory@9cb00000          !  /reserved-memory/memory@9cc00000            /voltage-divider-ain1           /current-sense-shunt-ain1           3/mux-controller-0           F/voltage-divider-ain2           ]/current-sense-shunt-ain2           t/mux-controller-1           /regulator-3v2-ain1         /regulator-3v2-ain2          	model compatible interrupt-parent #address-cells #size-cells stdout-path method phandle interrupts bootph-all ranges reg #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins bootph-pre-ram ti,esm-pins clocks clock-names power-domains ti,timer-pwm status pinctrl-names pinctrl-0 ti,intr-trigger-type interrupt-controller #interrupt-cells ti,sci ti,sci-dev-id ti,interrupt-ranges gpio-controller #gpio-cells ti,ngpio ti,davinci-gpio-unbanked gpio-line-names gpio-hog gpios line-name output-low assigned-clocks assigned-clock-parents reg-names bosch,mram-cfg resets firmware-name ti,sci-proc-ids mboxes memory-region ti,sysc-mask ti,sysc-sidle ti,syss-mask ti,no-reset-on-init linux,rs485-enabled-at-boot-time rs485-rts-active-low rs485-rx-during-tx wakeup-source ti,atcm-enable ti,btcm-enable ti,loczrama #thermal-sensor-cells socionext,synquacer-pre-its msi-controller #msi-cells #phy-cells #clock-cells assigned-clock-rates dma-ranges #mbox-cells interrupt-names ti,unmapped-event-sources msi-parent #dma-cells ti,sci-rm-range-bchan ti,sci-rm-range-rchan ti,sci-rm-range-tchan ti,sci-rm-range-tflow ti,sci-rm-range-rflow ti,host-id mbox-names #power-domain-cells #reset-cells dmas dma-names clock-frequency reset-gpios vddc-supply vddmipi-supply vddio-supply data-lines remote-endpoint buck1-supply buck2-supply buck3-supply ldo1-supply ldo2-supply ldo3-supply ldo4-supply system-power-controller ti,power-button regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-allow-bypass #io-channel-cells ti,datarate ti,gain pagesize avdd-supply dvdd-supply vref-supply diff-channels ti,pindir-d0-out-d1-in cs-gpios spi-max-frequency address-width gpio-ranges bus-width mmc-hs200-1_8v ti,clkbuf-sel ti,otap-del-sel-legacy ti,otap-del-sel-mmc-hs ti,otap-del-sel-hs200 ti,itap-del-sel-legacy ti,itap-del-sel-mmc-hs non-removable ti,otap-del-sel-sd-hs ti,otap-del-sel-sdr12 ti,otap-del-sel-sdr25 ti,otap-del-sel-sdr50 ti,otap-del-sel-sdr104 ti,otap-del-sel-ddr50 ti,itap-del-sel-sd-hs ti,itap-del-sel-sdr12 ti,itap-del-sel-sdr25 cd-gpios disable-wp vmmc-supply vqmmc-supply ti,fails-without-test-cd ti,syscon-phy-pll-refclk ti,vbus-divider maximum-speed dr_mode snps,usb2-gadget-lpm-disable snps,usb2-lpm-disable adp-disable usb-role-switch cdns,fifo-depth cdns,fifo-width cdns,trigger-address power-domain-names ti,mac-only label phys mac-address ti,syscon-efuse phy-handle phy-mode bus_freq reset-assert-us reset-deassert-us ti,fifo-depth ti,rx-internal-delay interrupts-extended ti,cpts-ext-ts-inputs ti,cpts-periodic-outputs #hwlock-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-rx ti,mbox-tx #pwm-cells op-mode serial-dir tdm-slots #sound-dai-cells phy-names gpmc,num-cs gpmc,num-waitpins clock-div clock-mult polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device cpu device_type enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells opp-shared syscon opp-hz opp-supported-hw clock-latency-ns opp-suspend cache-unified cache-level can0 can1 ethernet0 ethernet1 i2c0 i2c1 i2c2 i2c3 i2c4 mmc0 mmc1 mmc2 rtc0 rtc1 serial0 serial1 serial2 serial3 serial4 usb0 usb1 id-gpios self-powered vbus-supply debounce-interval linux,code vin-supply enable-active-high off-on-delay-us startup-delay-us states alignment no-map io-channels full-ohms output-ohms shunt-resistor-micro-ohms #mux-control-cells mux-gpios io-channel-names mux-controls settle-time-us color default-state function function-enumerator psci a53_timer0 pmu cbass_main cbass_mcu mcu_pmx0 pinctrl_pcie_1_reset pinctrl_gpio_1 pinctrl_gpio_2 pinctrl_gpio_3 pinctrl_gpio_4 pinctrl_mcu_i2c0 pinctrl_mcu_mcan0 pinctrl_mcu_uart0 pinctrl_csi1_mclk pinctrl_wkup_uart0 mcu_esm mcu_timer0 mcu_timer1 mcu_timer2 mcu_timer3 mcu_spi0 mcu_spi1 mcu_gpio_intr mcu_gpio0 verdin_pcie_1_reset_hog mcu_rti0 mcu_mcan1 mcu_m4fss cbass_wakeup wkup_conf chipid opp_efuse_table cpsw_mac_syscon usb0_phy_ctrl usb1_phy_ctrl wkup_i2c0 wkup_rtc0 wkup_rti0 wkup_r5fss0 wkup_r5fss0_core0 wkup_vtm0 oc_sram gic500 gic_its main_conf phy_gmii_sel epwm_tbclk audio_refclk0 audio_refclk1 dmss secure_proxy_main inta_main_dmss main_bcdma main_pktdma dmsc k3_pds k3_clks k3_reset crypto secure_proxy_sa3 main_pmx0 pinctrl_epwm0_a pinctrl_epwm0_b pinctrl_epwm1_a pinctrl_qspi1_clk_gpio pinctrl_qspi1_io0_gpio pinctrl_qspi1_io1_gpio pinctrl_qspi1_io2_gpio pinctrl_qspi1_io3_gpio pinctrl_qspi1_io4_gpio pinctrl_qspi1_cs_gpio pinctrl_qspi1_cs2_gpio pinctrl_wifi_w_wkup_host pinctrl_bt_wkup_host pinctrl_eth_reset pinctrl_bridge_reset pinctrl_vsel_sd pinctrl_wifi_en pinctrl_eth_int pinctrl_wifi_wkup_bt pinctrl_wifi_wkup_wlan pinctrl_sd1_pwr_en pinctrl_dsi1_bkl_en pinctrl_ctrl_sleep_moci pinctrl_ctrl_wake1_mico pinctrl_i2s_2_d_out_gpio pinctrl_i2s_2_bclk_gpio pinctrl_gpio_6 pinctrl_eth2_rgmii_int pinctrl_gpio_5 pinctrl_gpio_7 pinctrl_gpio_8 pinctrl_usb1_oc pinctrl_usb2_oc pinctrl_pwm3_dsi_gpio pinctrl_qspi1_dqs_gpio pinctrl_usb0_id pinctrl_sd1_cd_gpio pinctrl_dsi1_int pinctrl_usb0_en pinctrl_i2c0 pinctrl_i2c1 pinctrl_i2c2 pinctrl_i2c3 pinctrl_i2s1_mclk pinctrl_mcasp0 pinctrl_mcasp1 pinctrl_mcan0 pinctrl_mdio pinctrl_sdhci0 pinctrl_sdhci1 pinctrl_sdhci2 pinctrl_ospi0 pinctrl_rgmii1 pinctrl_rgmii2 pinctrl_spi1 pinctrl_spi1_cs0 pinctrl_eth_clock pinctrl_pmic_extint pinctrl_uart0 pinctrl_uart1 pinctrl_uart5 pinctrl_usb1 pinctrl_parallel_rgb pinctrl_ivy_leds main_esm main_timer0 main_timer1 main_timer2 main_timer3 main_timer4 main_timer5 main_timer6 main_timer7 main_uart0 main_uart1 main_uart2 main_uart3 main_uart4 main_uart5 main_uart6 main_i2c0 dsi_bridge dsi_bridge_ports rgb_in reg_vdd_core reg_1v8 reg_vdd_ddr reg_sd_3v3_1v8 reg_vddr_core reg_1v8a reg_eth_2v5 rtc_i2c verdin_som_adc main_i2c1 main_i2c2 main_i2c3 ivy_adc1 ivy_adc2 main_spi0 main_spi1 main_spi2 main_gpio_intr main_gpio0 main_gpio1 usbss0 usb0_ep usbss1 gpu cpsw3g cpsw_port1 cpsw_port2 cpsw3g_mdio cpsw3g_phy0 cpsw3g_phy1 dss dss_ports dpi_out hwspinlock mailbox0_cluster0 mbox_m4_0 mbox_r5_0 ecap0 ecap1 ecap2 eqep0 eqep1 eqep2 main_mcan0 main_rti0 main_rti1 main_rti2 main_rti3 main_rti15 epwm0 epwm1 epwm2 mcasp2 ti_csi2rx0 cdns_csi2rx0 csi0_port0 csi0_port1 csi0_port2 csi0_port3 csi0_port4 dphy0 pruss pruss_mem pruss_cfg pruss_coreclk_mux pruss_iepclk_mux pruss_intc pru0 pru1 gpmc0 elm0 dss_vp1_clk thermal_zones main0_thermal main0_alert main0_crit main1_thermal main1_alert main1_crit cpu0 cpu1 cpu2 cpu3 a53_opp_table L2_0 usb_dr_connector verdin_gpio_keys verdin_key_wakeup reg_vsodimm reg_3v3 reg_1v2_dsi reg_1v8_dsi reg_1v0_eth reg_1v8_eth reg_force_sleep_moci reg_sdhc1_vmmc reg_sdhc1_vqmmc reg_usb0_vbus reserved_memory secure_tfa_ddr secure_ddr wkup_r5fss0_core0_dma_memory_region wkup_r5fss0_core0_memory_region mcu_m4fss_dma_memory_region mcu_m4fss_memory_region ain1_voltage_unmanaged ain1_current_unmanaged ain1_mode_mux_ctrl ain2_voltage_unmanaged ain2_current_unmanaged ain2_mode_mux_ctrl reg_3v2_ain1 reg_3v2_ain2 