  L   8  ̸   (              ̀                                                                   &   ,hardkernel,odroid-m1s rockchip,rk3566            7Hardkernel ODROID-M1S      aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe010000           /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                     psci            %           2   @        D           Q           ^   @        p           }                                    
      cpu@100          cpu          ,arm,cortex-a55                                     psci            %           2   @        D           Q           ^   @        p           }                                          cpu@200          cpu          ,arm,cortex-a55                                     psci            %           2   @        D           Q           ^   @        p           }                                          cpu@300          cpu          ,arm,cortex-a55                                     psci            %           2   @        D           Q           ^   @        p           }                                             l3-cache             ,cache                               '           4   @        F                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            Ղ                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI            
i2s         #           =okay       simple-audio-card,codec         D         simple-audio-card,cpu           D   	         pmu          ,arm,cortex-a55-pmu        0  N                                                Y   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   l   shmem@10f000             ,arm,scmi-shmem                                 s                    timer            ,arm,armv8-timer       0  N                                 
            z      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                           sata pmalive rxoob          N       _                       	  sata-phy                                   	  =disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob          N       `                       	  sata-phy                                   	  =disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          N                                            ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                                =okay                     	  usb2-phy            8           ?high-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          N                                            ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                                =okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 N      	            M        b           s    A          }  (                     l                                                msi-controller@fd440000          ,arm,gic-v3-its               D                                                 ^         usb@fd800000             ,generic-ehci                                  N                                                       usb         =okay          usb@fd840000             ,generic-ohci                                  N                                                       usb         =okay          usb@fd880000             ,generic-ehci                                  N                                                       usb         =okay          usb@fd8c0000             ,generic-ohci                                  N                                                       usb         =okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     \   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           =okay                                                                                                    "            syscon@fdc50000                                 ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                           0                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                          xin24m                     0           =                          M   G          b              y                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               N       .                       -      	  i2c pclk                        default                                   =okay       regulator@1c             ,tcs,tcs4525                                vdd_cpu                            
4         5                     !              regulator-state-mem          (         pmic@20          ,rockchip,rk809                       =      H        b                              H        mclk            rk809-clkout1 rk809-clkout2              "        N              default            #   $        A             R         j        x   !           !           !           !           !           !           !           !           !              regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem          (         DCDC_REG2           vdd_gpu                                                 p          q           C   regulator-state-mem          (         DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem          (         DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem          (         LDO_REG1            vdda0v9_image                                X   regulator-state-mem          (         LDO_REG2          	  vdda_0v9                                           regulator-state-mem          (         LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec                               2Z         2Z              regulator-state-mem          (         LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem          (         LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem          (         LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            w@         w@           Y   regulator-state-mem          (         SWITCH_REG1         vcc_3v3                                 regulator-state-mem          (         SWITCH_REG2       
  vcc3v3_sd              f   regulator-state-mem          (                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 N       t                       ,        baudclk apb_pclk            /   %       %              &        default         4           A         	  =disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               '        default         K         	  =disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               (        default         K         	  =disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default         K         	  =disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                           0      	  pwm pclk               *        default         K         	  =disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            V                                           power-domain@7                                          j   +        V          power-domain@8                                          j   ,   -   .        V          power-domain@9              	                                  j   /   0   1        V          power-domain@10             
                            j   2   3   4   5   6   7        V          power-domain@11                                   j   8        V          power-domain@13                                  j   9        V          power-domain@14                                  j   :   ;   <        V          power-domain@15                                   j   =   >   ?   @   A        V                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  N       (          )          '           qjob mmu gpu                             gpu bus                                  =okay               B           C                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               N                  qvdpu                              
  aclk hclk              D                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        N                  aclk iface                                                           D      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              N       Z                                     aclk hclk sclk               &     $     %        core axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  N       @                             
  aclk hclk              E              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        N       ?                               aclk iface                
                       E      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         N       d                                          biu ciu ciu-drive ciu-sample                       р                      reset         	  =disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 N                             qmacirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           y              F                    G           H                 =okay            =                  b                   input           #   I      	  .rgmii-id            7           default            J   K   L   M   N   O   mdio             ,snps,dwmac-mdio                              ethernet-phy@1           ,ethernet-phy-ieee802.3-c22                      B  N         R         d   P                 I         stmmac-axi-config           p                                 z                         F      rx-queues-config                          G   queue0           tx-queues-config                          H   queue0              vop@fe040000                          0     @                vop gamma-lut           N                (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               Q              	        y           =okay             ,rockchip,rk3566-vop         =                    b               ports                                           port@0                                            endpoint@2                         R           Z         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                N                                      aclk iface                            	        =okay               Q      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 N       D           pclk                          dphy               S              	        apb                      y         	  =disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 N       E           pclk                          dphy               T              	        apb                      y         	  =disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 N       -         (                         (              iahb isfr cec ref           default            U   V   W              	        4           y           A            =okay               X           Y              ports                                port@0                  endpoint               Z           R         port@1                 endpoint               [                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   +      qos@fe138080             ,rockchip,rk3568-qos syscon                                  :      qos@fe138100             ,rockchip,rk3568-qos syscon                                   ;      qos@fe138180             ,rockchip,rk3568-qos syscon                                  <      qos@fe148000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe148080             ,rockchip,rk3568-qos syscon                                  -      qos@fe148100             ,rockchip,rk3568-qos syscon                                   .      qos@fe150000             ,rockchip,rk3568-qos syscon                                    8      qos@fe158000             ,rockchip,rk3568-qos syscon                                   2      qos@fe158100             ,rockchip,rk3568-qos syscon                                   3      qos@fe158180             ,rockchip,rk3568-qos syscon                                  4      qos@fe158200             ,rockchip,rk3568-qos syscon                                   5      qos@fe158280             ,rockchip,rk3568-qos syscon                                  6      qos@fe158300             ,rockchip,rk3568-qos syscon                                   7      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    =      qos@fe190280             ,rockchip,rk3568-qos syscon                                  >      qos@fe190300             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190380             ,rockchip,rk3568-qos syscon                                  @      qos@fe190400             ,rockchip,rk3568-qos syscon                                   A      qos@fe198000             ,rockchip,rk3568-qos syscon                                   9      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   /      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  0      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   1      dfi@fe230000             ,rockchip,rk3568-dfi              #                 N                      \      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               dbi apb config        <  N       K          J          I          H          G           qsys pmc msg legacy err                       (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         b                                `  *                  ]                      ]                     ]                     ]           8            I           X           g           v       ^               ~                       	  pcie-phy                        T  l                                                    @              @                         pipe                                     =okay            default            _        d   `   
               a   legacy-interrupt-controller                      b            M                     N       H              ]         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         N       b                                          biu ciu ciu-drive ciu-sample                       р                      reset           =okay                                         default            b   c   d   e                    f                 mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         N       c                                          biu ciu ciu-drive ciu-sample                       р                      reset         	  =disabled          spi@fe300000             ,rockchip,sfc                 0        @         N       e                 x      v        clk_sfc hclk_sfc               g        default       	  =disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 N                  =      {      }        M n6       (        |      z      y      {      }        core bus axi block timer            =okay                                                   	         	         	        default            h   i   j   k   l                            rng@fe388000             ,rockchip,rk3568-rng              8       @               p      o      	  core ahb                  m      	  =disabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 N       4           =      =      A        MFq Fq               ?      C      9        mclk_tx mclk_rx hclk            /   m            	!tx                P      Q      
  tx-m rx-m           y           A            =okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 N       5           =      E      I        MFq Fq               G      K      :        mclk_tx mclk_rx hclk            /   m      m           	!rx tx                 R      S      
  tx-m rx-m           y           default            n   o   p   q        A            =okay             	+                 i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 N       6           =      M        MFq               O      O      ;        mclk_tx mclk_rx hclk            /   m      m           	!tx rx                 T        tx-m            y           default            r   s   t   u        A          	  =disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 N       7                 S      W      <        mclk_tx mclk_rx hclk            /   m      m           	!tx rx                 U      V      
  tx-m rx-m           y           A          	  =disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 N       L                 Z      Y        pdm_clk pdm_hclk            /   m   	        	!rx             v   w   x   y   z   {        default               X        pdm-m           A          	  =disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 N       f         
  mclk hclk                 _      \        /   m           	!tx          default            |        A          	  =disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         N                             	F                   	  apb_pclk            	]              %      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         N                             	F                   	  apb_pclk            	]              m      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 N       /                H     G      	  i2c pclk               }        default                                 	  =disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 N       0                J     I      	  i2c pclk               ~        default                                 	  =disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 N       1                L     K      	  i2c pclk                       default                                 	  =disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 N       2                N     M      	  i2c pclk                       default                                 	  =disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 N       3                P     O      	  i2c pclk                       default                                 	  =disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 N                                  
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 N       g                R     Q        spiclk apb_pclk         /   %      %           	!tx rx           default                                                  	  =disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 N       h                T     S        spiclk apb_pclk         /   %      %           	!tx rx           default                                                  	  =disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 N       i                V     U        spiclk apb_pclk         /   %      %           	!tx rx           default                                                  	  =disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 N       j                X     W        spiclk apb_pclk         /   %      %           	!tx rx           default                                                  	  =disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 N       u                             baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 N       v                #              baudclk apb_pclk            /   %      %                      default         4           A           =okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 N       w                '     $        baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 N       x                +     (        baudclk apb_pclk            /   %      %   	                   default         4           A         	  =disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 N       y                /     ,        baudclk apb_pclk            /   %   
   %                      default         4           A         	  =disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 N       z                3     0        baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 N       {                7     4        baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 N       |                ;     8        baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 N       }                ?     <        baudclk apb_pclk            /   %      %                      default         4           A         	  =disabled          thermal-zones      cpu-thermal         	h   d        	~          	          trips      cpu_alert0          	 p        	           passive                  cpu_alert1          	 $        	           passive       cpu_crit            	 s        	        	   critical             cooling-maps       map0            	         0  	   
                     gpu-thermal         	h           	~          	         trips      gpu-threshold           	 p        	           passive       gpu-target          	 $        	           passive                  gpu-crit            	 s        	        	   critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 N       s           =                  Mf@ 
`                          tsadc apb_pclk                                 y           	 s        default sleep                      	           	           =okay            	           
                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 N       ]                             saradc apb_pclk                      saradc-apb          
0           =okay            
B         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         K         	  =disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                     Z     Y      	  pwm pclk                       default         K         	  =disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         K         	  =disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                    Z     Y      	  pwm pclk                       default         K         	  =disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         K         	  =disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                     ]     \      	  pwm pclk                       default         K         	  =disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         K         	  =disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                    ]     \      	  pwm pclk                       default         K         	  =disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         K         	  =disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                     `     _      	  pwm pclk                       default         K         	  =disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         K         	  =disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                    `     _      	  pwm pclk                       default         K         	  =disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                      "     }              ref apb pipe            =      "        M                      phy         
N           
`           
v           =okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                      %     ~              ref apb pipe            =      %        M                      phy         
N           
`           
v           =okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                       y        pclk            
v                         apb         y         	  =disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                       z        
v                  	        apb                    	  =disabled               S      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                       {        
v                  	        apb                    	  =disabled               T      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                             phyclk          clk_usbphy0_480m            N                  
                       =okay                  host-port           
v            =okay            7                    otg-port            
v            =okay            7                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                             phyclk          clk_usbphy1_480m            N                  
                       =okay       host-port           
v            =okay            7                    otg-port            
v            =okay            7                       pinctrl          ,rockchip,rk3568-pinctrl         y               \                                  l              gpio@fdd60000            ,rockchip,gpio-bank                                N       !                 .               
        
                       
            M        b              "      gpio@fe740000            ,rockchip,gpio-bank               t                 N       "                c     d         
        
                       
            M        b              `      gpio@fe750000            ,rockchip,gpio-bank               u                 N       #                e     f         
        
          @            
            M        b                    gpio@fe760000            ,rockchip,gpio-bank               v                 N       $                g     h         
        
          `            
            M        b              P      gpio@fe770000            ,rockchip,gpio-bank               w                 N       %                i     j         
        
                      
            M        b         pcfg-pull-up             
                 pcfg-pull-none           
                 pcfg-pull-none-drv-level-1           
        
                    pcfg-pull-none-drv-level-2           
        
                    pcfg-pull-none-drv-level-3           
        
                    pcfg-pull-up-drv-level-1             
        
                    pcfg-pull-up-drv-level-2             
        
                    pcfg-pull-none-smt           
         
                 acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0         
                                 cpu       ebc       edpdp         emmc       emmc-rstnout            
                       l      emmc-bus8           
                                                                                                           h      emmc-clk            
                       i      emmc-cmd            
                       j      emmc-datastrobe         
                       k         eth0          eth1          flash         fspi       fspi-pins         `  
                                                                                   g         gmac0         gmac1      gmac1m1-miim             
                                   J      gmac1m1-clkinout            
                       O      gmac1m1-rx-bus2       0  
                              	                 L      gmac1m1-tx-bus2       0  
                                               K      gmac1m1-rgmii-clk            
                                    M      gmac1m1-rgmii-bus         @  
                                                           N         gpu       hdmitx     hdmitxm0-cec            
                       W      hdmitx-scl          
                       U      hdmitx-sda          
                       V         i2c0       i2c0-xfer            
       	             
                           i2c1       i2c1-xfer            
                                     }         i2c2       i2c2m0-xfer          
                                     ~         i2c3       i2c3m0-xfer          
                                             i2c4       i2c4m0-xfer          
                  
                          i2c5       i2c5m0-xfer          
                                            i2s1       i2s1m0-lrcktx           
                       o      i2s1m0-mclk         
                       $      i2s1m0-sclktx           
                       n      i2s1m0-sdi0         
                       p      i2s1m0-sdo0         
                       q         i2s2       i2s2m0-lrcktx           
                       s      i2s2m0-sclktx           
                       r      i2s2m0-sdi          
                       t      i2s2m0-sdo          
                       u         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
                       v      pdmm0-clk1          
                       w      pdmm0-sdi0          
                       x      pdmm0-sdi1          
      
                 y      pdmm0-sdi2          
      	                 z      pdmm0-sdi3          
                       {         pmic       pmic-int            
                         #         pmu       pwm0       pwm0m0-pins         
                        '         pwm1       pwm1m0-pins         
                        (         pwm2       pwm2m0-pins         
                        )         pwm3       pwm3-pins           
                        *         pwm4       pwm4-pins           
                                 pwm5       pwm5-pins           
                                 pwm6       pwm6-pins           
                                 pwm7       pwm7-pins           
                                 pwm8       pwm8m0-pins         
      	                          pwm9       pwm9m0-pins         
      
                          pwm10      pwm10m0-pins            
                                pwm11      pwm11m0-pins            
                                pwm12      pwm12m0-pins            
                                pwm13      pwm13m0-pins            
                                pwm14      pwm14m0-pins            
                                pwm15      pwm15m0-pins            
                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
                                                            b      sdmmc0-clk          
                       c      sdmmc0-cmd          
                       d      sdmmc0-det          
                        e         sdmmc1        sdmmc2        spdif      spdifm0-tx          
                       |         spi0       spi0m0-pins       0  
                                                        spi0m0-cs0          
                              spi0m0-cs1          
                                 spi1       spi1m0-pins       0  
                                                     spi1m0-cs0          
                             spi1m0-cs1          
                                spi2       spi2m0-pins       0  
                                                     spi2m0-cs0          
                             spi2m0-cs1          
                                spi3       spi3m0-pins       0  
                              
                       spi3m0-cs0          
                             spi3m0-cs1          
                                tsadc      tsadc-shutorg           
                              tsadc-pin           
                                  uart0      uart0-xfer           
                                     &         uart1      uart1m0-xfer             
                                            uart2      uart2m0-xfer             
                                              uart3      uart3m0-xfer             
                                             uart4      uart4m0-xfer             
                                            uart5      uart5m0-xfer             
                                            uart6      uart6m0-xfer             
                                            uart7      uart7m0-xfer             
                                            uart8      uart8m0-xfer             
                                            uart9      uart9m0-xfer             
                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       lcd    lcd-pwren           
                                  leds       pwr-led         
                               sys-led         
                                  pcie       pcie20-pins       0  
                  
             	                 _      pcie-pwren          
                                 usb    usb2-host-pwren         
                              usb2-otg-pwren          
                               usb3-host-pwren         
                                     opp-table-0          ,operating-points-v2                        opp-408000000               Q          P P 0        %  @      opp-600000000               #F          P P 0        %  @      opp-816000000               0,          P P 0        %  @         6      opp-1104000000              Aʹ            0        %  @      opp-1416000000              Tfr            0        %  @      opp-1608000000              _"            0        %  @      opp-1800000000              kI          0 0 0        %  @         opp-table-1          ,operating-points-v2            B   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         chosen          Bserial2:1500000n8         hdmi-con             ,hdmi-connector           a      port       endpoint                          [            leds          
   ,gpio-leds           default                  led-0           N           Ton          bpower           j   "              kdefault-on        led-1           N           Ton        
  bheartbeat           j   "             
  kheartbeat            regulator-3v3-vcc-lcd            ,regulator-fixed                  j   "               default                    vcc3v3_lcd           2Z         2Z           !      regulator-3v3-vcc-pcie           ,regulator-fixed                  j                  default                    vcc3v3_pcie          2Z         2Z           !           a      regulator-3v3-vcc-sys            ,regulator-fixed         vcc3v3_sys                             2Z         2Z                      !      regulator-5v0-vcc-sys            ,regulator-fixed         vcc5v0_sys                             LK@         LK@                 regulator-5v0-vcc-usb2-host          ,regulator-fixed                  j   P               default                    vcc5v0_usb2_host             LK@         LK@                            regulator-5v0-vcc-usb2-otg           ,regulator-fixed                  j   "               default                    vcc5v0_usb2_otg          LK@         LK@                            regulator-5v0-vcc-usb3-host          ,regulator-fixed                  j   "               default                    vcc5v0_usb3_host             LK@         LK@                            sound            ,simple-audio-card           
i2s         Analog RK809            #      simple-audio-card,cpu           D         simple-audio-card,codec         D               	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend #sound-dai-cells system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode phy-supply reset-assert-us reset-deassert-us reset-gpios snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes vpcie3v3-supply bus-width cap-sd-highspeed disable-wp sd-uhs-sdr50 vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path color default-state function linux,default-trigger enable-active-high 