  ˫   8  x   (            3  @                                                                   &   ,Toradex Colibri iMX8DX on Aster Board         =   2toradex,colibri-imx8x-aster toradex,colibri-imx8x fsl,imx8dx       aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000             /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       cpus                                 cpu@0            cpu          2arm,cortex-a35                            psci            
              @        )           6           C   @        U           b           s                z                         	      cpu@1            cpu          2arm,cortex-a35                           psci            
              @        )           6           C   @        U           b           s                z                         
      l2-cache0            2cache                                             @        +                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3                Q             Q                                     "      	                    reserved-memory                                   -   decoder-boot@84000000                                   4      encoder-boot@86000000                                    4      decoder-rpc@92000000                                    4      dsp@92400000                 @                  4      	  ;disabled          encoder-rpc@94400000                 @       p           4         pmu          2arm,cortex-a35-pmu          "               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         Btx0 rx0 gip3          $  M                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           T                    clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         h                    pinctrl          2fsl,imx8qxp-iomuxc          udefault                       x   ad7879intgrp                     !           O      adc0grp       0     d       `   c       `   h       `   g       `      atmeladaptergrp            N      !   M     !      atmelconnectorgrp                   !         !      canintgrp                    @      csictlgrp                                     csimclkgrp                   A      extio0grp              1     @      fec1grp       x     5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a           h      fec1slpgrp        x     5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A           i      flexcan0grp            j       !   i       !      flexcan1grp            l       !   k       !      flexcan2grp            n       !   m       !      gpioblongrp                  `      gpiohpdgrp             z             gpiokeysgrp               p A           z      hog0grp                  a             S                 a   ,                a             T                 a             U                 a   R                 a                                                               X                                            hog1grp                         hog2grp                         hogscfwgrp                          i2c0grp                 !        !           M      i2c0mipilvds0grp               t          u             i2c0mipilvds1grp               x          y             i2c1grp            v     !   w     !           R      lcdifgrp         ,     L      `   H      `   K      `   J      @         @   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0     Y      !   Z      @   [      @   \      @           =      lpspi2cs2grp               *      !      lpuart0grp        0     o          p          i         j                 C      lpuart2grp             r          q                  F      lpuart3grp             m         n                 H      lpuart3ctrlgrp        H     {          V          W                                                I      pciebgrp          $          a        a          `      pwmagrp                   a   `      `      pwmbgrp            M      `           r      pwmcgrp            N      `           t      pwmdgrp                   a   O      `           v      sai0grp       0     ^     @   a     @   ]     @   _     @      sgtl5000grp                  A      sgtl5000usbclkgrp              e      !           N      usb3503agrp                  a      usbcdetgrp             3     @      usbh1reggrp                 @      usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A          !           [      usdhc1-100mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           \      usdhc1-200mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           ]      usdhc2gpiogrp                   !           a      usdhc2gpioslpgrp                     `           e      usdhc2grp         T           A          !           !   !       !   "       !   #       !          !           `      usdhc2-100mhzgrp          T           A          !           !   !       !   "       !   #       !          !           b      usdhc2-200mhzgrp          T           A          !           !   !       !   "       !   #       !          !           c      usdhc2slpgrp          T           `         `          `   !      `   "      `   #      `          !           d      wifigrp                            ocotp            2fsl,imx8qxp-scu-ocotp                                  keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t      	  ;disabled          rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                                  timer            2arm,armv8-timer       0  "                                 
         clock-dummy          2fixed-clock         h                      
  clk_dummy                    clock-xtal32k            2fixed-clock         h                       xtal_32KHz        clock-xtal24m            2fixed-clock         h            n6         xtal_24MHz        thermal-zones      cpu0-thermal                                       c   trips      trip0            _        *           passive                  trip1            (        *        	   critical             cooling-maps       map0            5           :   	   
               clock-img-ipg            2fixed-clock         h                     img_ipg_clk                  bus@58000000             2simple-bus                                   -X       X         jpegdec@58400000             X@             "      5           s                     I                     Y          n                  |             2nxp,imx8qxp-jpgdec          ;okay          jpegenc@58450000             XE             "      1           s                     I                     Y          n                  |             2nxp,imx8qxp-jpgenc          ;okay          clock-controller@585d0000            2fsl,imx8qxp-lpcg             X]             h           s                           0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         n                      clock-controller@585f0000            2fsl,imx8qxp-lpcg             X_             h           s                           0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         n                         vpu@2c000000                                     -,       ,                   ,                  n           	  ;disabled       mailbox@2d000000             2fsl,imx6sx-mu            -              "                            n           	  ;disabled                     mailbox@2d020000             2fsl,imx6sx-mu            -             "                            n           	  ;disabled                     vpu-core@2d080000            -              2nxp,imx8q-vpu-decoder           n             Btx0 tx1 rx        $  M                                     	  ;disabled          vpu-core@2d090000            -              2nxp,imx8q-vpu-encoder           n             Btx0 tx1 rx        $  M                                     	  ;disabled             clock-cm40-ipg           2fixed-clock         h            )         cm40_ipg_clk                     bus@34000000             2simple-bus                                   -4       4                      serial@37220000          2fsl,imx8qxp-lpuart           7"             "              s                   	  ipg baud            I                Yn6         n           	  ;disabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          7#             "   	           s                     per ipg         I                 Yn6         n            	  ;disabled          intmux@37400000          2fsl,imx-intmux           7@                        `  "                                                                                                            s           ipg         n     !      	  ;disabled                     clock-controller@37620000            2fsl,imx8qxp-lpcg             7b             h           s                                *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           n                      clock-controller@37630000            2fsl,imx8qxp-lpcg             7c             h           s                                 (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         n                          bus@53000000             2simple-bus                                   -S       S         gpu@53100000             2vivante,gc           S             "       @           s                          core shader         I                          Y,E ,E         n               clock-audio-ipg          2fixed-clock         h            '         audio_ipg_clk                    clock-ext-aud-mclk0          2fixed-clock         h                        ext_aud_mclk0              ,      clock-ext-aud-mclk1          2fixed-clock         h                        ext_aud_mclk1              -      clock-esai0-rx           2fixed-clock         h                        esai0_rx_clk               .      clock-esai0-rx-hf            2fixed-clock         h                        esai0_rx_hf_clk            /      clock-esai0-tx           2fixed-clock         h                        esai0_tx_clk               0      clock-esai0-tx-hf            2fixed-clock         h                        esai0_tx_hf_clk            1      clock-spdif0-rx          2fixed-clock         h                      
  spdif0_rx              2      clock-sai0-rx-bclk           2fixed-clock         h                        sai0_rx_bclk               3      clock-sai0-tx-bclk           2fixed-clock         h                        sai0_tx_bclk               4      clock-sai1-rx-bclk           2fixed-clock         h                        sai1_rx_bclk               5      clock-sai1-tx-bclk           2fixed-clock         h                        sai1_tx_bclk               6      clock-sai2-rx-bclk           2fixed-clock         h                        sai2_rx_bclk               7      clock-sai3-rx-bclk           2fixed-clock         h                        sai3_rx_bclk               8      clock-sai4-rx-bclk           2fixed-clock         h                        sai4_rx_bclk               9      bus@59000000             2simple-bus                                   -Y       Y         asrc@59000000            2fsl,imx8qm-asrc          Y              "      t         d  s                                                                                      mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `                                                                                            rxa rxb rxc txa txb txc           @                               n           	  ;disabled          esai@59010000            2fsl,imx8qm-esai          Y             "                 s                              core extal fsys spba                                                rx tx           n           	  ;disabled          spdif@59020000           2fsl,imx8qm-spdif             Y             "                        0  s                                           :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                               	               rx tx           n           	  ;disabled          sai@59040000             2fsl,imx8qm-sai           Y             "      :           s                              bus mclk0 mclk1 mclk2 mclk3         rx tx                                               n     >      	  ;disabled          sai@59050000             2fsl,imx8qm-sai           Y             "      <           s                              bus mclk0 mclk1 mclk2 mclk3         rx tx                                               n     ?      	  ;disabled          sai@59060000             2fsl,imx8qm-sai           Y             "      >           s                                bus mclk0 mclk1 mclk2 mclk3         rx                               n     @      	  ;disabled          sai@59070000             2fsl,imx8qm-sai           Y             "      C           s   !         !                  bus mclk0 mclk1 mclk2 mclk3         rx                               n           	  ;disabled          dma-controller@591f0000          2fsl,imx8qm-edma          Y                                    \         "      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                         n      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W                 clock-controller@59400000            2fsl,imx8qxp-lpcg             Y@             h           s                      asrc0_lpcg_ipg_clk          n                      clock-controller@59410000            2fsl,imx8qxp-lpcg             YA             h           s                              (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         n                      clock-controller@59420000            2fsl,imx8qxp-lpcg             YB             h           s                              %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            n                      clock-controller@59440000            2fsl,imx8qxp-lpcg             YD             h           s                              !  sai0_lpcg_mclk sai0_lpcg_ipg_clk            n     >                 clock-controller@59450000            2fsl,imx8qxp-lpcg             YE             h           s                              !  sai1_lpcg_mclk sai1_lpcg_ipg_clk            n     ?                 clock-controller@59460000            2fsl,imx8qxp-lpcg             YF             h           s                              !  sai2_lpcg_mclk sai2_lpcg_ipg_clk            n     @                  clock-controller@59470000            2fsl,imx8qxp-lpcg             YG             h           s                              !  sai3_lpcg_mclk sai3_lpcg_ipg_clk            n                !      clock-controller@59590000            2fsl,imx8qxp-lpcg             YY             h           s                      dsp_ram_lpcg_ipg_clk            n           asrc@59800000            2fsl,imx8qm-asrc          Y             "      |         d  s   "      "                                                                             mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     #               #              #              #             #             #                  rxa rxb rxc txa txb txc           @                              n           	  ;disabled          sai@59820000             2fsl,imx8qm-sai           Y             "      I           s   $         $                  bus mclk0 mclk1 mclk2 mclk3             #             #   	                rx tx           n           	  ;disabled               '      sai@59830000             2fsl,imx8qm-sai           Y             "      K           s   %         %                  bus mclk0 mclk1 mclk2 mclk3            #   
                tx          n           	  ;disabled               (      amix@59840000            2fsl,imx8qm-audmix            Y             s   &            ipg         n                '   (      	  ;disabled          mqs@59850000             2fsl,imx8qm-mqs           Y             s   )      )          
  mclk core           n           	  ;disabled          dma-controller@599f0000          2fsl,imx8qm-edma          Y                                              "      ~                                                                            J         J         L         X  n      l      m      n      o      p      q      r      s      t      u      v           #      clock-controller@59d00000            2fsl,imx8qxp-lpcg             Y             h           s     E                       aud_rec_clk0_lpcg_clk           n     E           *      clock-controller@59d10000            2fsl,imx8qxp-lpcg             Y             h           s                            aud_rec_clk1_lpcg_clk           n                +      clock-controller@59d20000            2fsl,imx8qxp-lpcg             Y             h           s     E                        aud_pll_div_clk0_lpcg_clk           n     E                 clock-controller@59d30000            2fsl,imx8qxp-lpcg             Y             h           s                             aud_pll_div_clk1_lpcg_clk           n                      clock-controller@59d50000            2fsl,imx8qxp-lpcg             Y             h           s                          mclkout0_lpcg_clk           n           clock-controller@59d60000            2fsl,imx8qxp-lpcg             Y             h           s                          mclkout1_lpcg_clk           n           acm@59e00000             2fsl,imx8qxp-acm          Y             h           n                         E                         >     ?     @                               X  s   *       +                     ,   -   .   /   0   1   2   3   4   5   6   7   8   9       aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk                   clock-controller@59c00000            2fsl,imx8qxp-lpcg             Y             h           s                      asrc1_lpcg_ipg_clk          n                "      clock-controller@59c20000            2fsl,imx8qxp-lpcg             Y             h           s                              !  sai4_lpcg_mclk sai4_lpcg_ipg_clk            n                $      clock-controller@59c30000            2fsl,imx8qxp-lpcg             Y             h           s                              !  sai5_lpcg_mclk sai5_lpcg_ipg_clk            n                %      clock-controller@59c40000            2fsl,imx8qxp-lpcg             Y             h           s                       amix_lpcg_ipg_clk           n                &      clock-controller@59c50000            2fsl,imx8qxp-lpcg             Y             h           s                              !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            n                )         clock-dma-ipg            2fixed-clock         h            '         dma_ipg_clk            K      bus@5a000000             2simple-bus                                   -Z       Z         spi@5a000000             2fsl,imx7ulp-spi          Z                                        "      P                        s   :       :           per ipg         I      5           Y         n      5      	  ;disabled          spi@5a010000             2fsl,imx7ulp-spi          Z                                       "      Q                        s   ;       ;           per ipg         I      6           Y         n      6      	  ;disabled          spi@5a020000             2fsl,imx7ulp-spi          Z                                       "      R                        s   <       <           per ipg         I      7           Y         n      7      	  ;disabled            udefault            =           >          ?            spi@5a030000             2fsl,imx7ulp-spi          Z                                       "      S                        s   @       @           per ipg         I      8           Y         n      8      	  ;disabled          serial@5a060000          Z             "      Y           s   A      A          	  ipg baud            I      9           YĴ         n      9        rx tx               B             B   	                ;okay             2fsl,imx8qxp-lpuart          udefault            C      serial@5a070000          Z             "      Z           s   D      D          	  ipg baud            I      :           YĴ         n      :        rx tx               B   
          B                 	  ;disabled             2fsl,imx8qxp-lpuart        serial@5a080000          Z             "      [           s   E      E          	  ipg baud            I      ;           YĴ         n      ;        rx tx               B             B                   ;okay             2fsl,imx8qxp-lpuart          udefault            F      serial@5a090000          Z	             "      \           s   G      G          	  ipg baud            I      <           YĴ         n      <        rx tx               B             B                   ;okay             2fsl,imx8qxp-lpuart          udefault            H   I      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm            Z             "                  s   J      J            ipg per         I                 Yn6                    n            dma-controller@5a1f0000          2fsl,imx8qm-edma          Z                                   "                                                                                                                                                        n                                                                                              B      clock-controller@5a400000            2fsl,imx8qxp-lpcg             Z@             h           s      5      K                        spi0_lpcg_clk spi0_lpcg_ipg_clk         n      5           :      clock-controller@5a410000            2fsl,imx8qxp-lpcg             ZA             h           s      6      K                        spi1_lpcg_clk spi1_lpcg_ipg_clk         n      6           ;      clock-controller@5a420000            2fsl,imx8qxp-lpcg             ZB             h           s      7      K                        spi2_lpcg_clk spi2_lpcg_ipg_clk         n      7           <      clock-controller@5a430000            2fsl,imx8qxp-lpcg             ZC             h           s      8      K                        spi3_lpcg_clk spi3_lpcg_ipg_clk         n      8           @      clock-controller@5a460000            2fsl,imx8qxp-lpcg             ZF             h           s      9      K                     '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          n      9           A      clock-controller@5a470000            2fsl,imx8qxp-lpcg             ZG             h           s      :      K                     '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          n      :           D      clock-controller@5a480000            2fsl,imx8qxp-lpcg             ZH             h           s      ;      K                     '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          n      ;           E      clock-controller@5a490000            2fsl,imx8qxp-lpcg             ZI             h           s      <      K                     '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          n      <           G      clock-controller@5a590000            2fsl,imx8qxp-lpcg             ZY             h           s            K                     (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         n                 J      i2c@5a800000             Z    @         "                  s   L       L           per ipg         I      `           Yn6         n      `        ;okay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                                            udefault            M   N   touchscreen@2c           2adi,ad7879-1            udefault            O            ,             P        "              &           ?   x        V           q                                          	  ;disabled             i2c@5a810000             Z    @         "                  s   Q       Q           per ipg         I      a           Yn6         n      a      	  ;disabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                                            udefault            R      i2c@5a820000             Z    @         "                  s   S       S           per ipg         I      b           Yn6         n      b      	  ;disabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000             Z    @         "                  s   T       T           per ipg         I      c           Yn6         n      c      	  ;disabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc                     Z             "                               s   U       U           per ipg         I      e           Yn6         n      e      	  ;disabled          can@5a8d0000             2fsl,imx8qm-flexcan           Z             "                               s   V      V            ipg per         I      i           YbZ         n      i                              	  ;disabled          can@5a8e0000             2fsl,imx8qm-flexcan           Z             "                               s   V      V            ipg per         I      i           YbZ         n      j                             	  ;disabled          can@5a8f0000             2fsl,imx8qm-flexcan           Z             "                               s   V      V            ipg per         I      i           YbZ         n      k                             	  ;disabled          dma-controller@5a9f0000          2fsl,imx8qm-edma          Z   	                              `  "                                                                              @  n                                              clock-controller@5ac00000            2fsl,imx8qxp-lpcg             Z             h           s      `      K                        i2c0_lpcg_clk i2c0_lpcg_ipg_clk         n      `           L      clock-controller@5ac10000            2fsl,imx8qxp-lpcg             Z             h           s      a      K                        i2c1_lpcg_clk i2c1_lpcg_ipg_clk         n      a           Q      clock-controller@5ac20000            2fsl,imx8qxp-lpcg             Z             h           s      b      K                        i2c2_lpcg_clk i2c2_lpcg_ipg_clk         n      b           S      clock-controller@5ac30000            2fsl,imx8qxp-lpcg             Z             h           s      c      K                        i2c3_lpcg_clk i2c3_lpcg_ipg_clk         n      c           T      clock-controller@5ac80000            2fsl,imx8qxp-lpcg             Z             h           s      e      K                        adc0_lpcg_clk adc0_lpcg_ipg_clk         n      e           U      clock-controller@5acd0000            2fsl,imx8qxp-lpcg             Z             h           s      i      K   K                        5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            n      i           V         clock-conn-axi           2fixed-clock         h            CU        conn_axi_clk               o      clock-conn-ahb           2fixed-clock         h            	!        conn_ahb_clk               p      clock-conn-ipg           2fixed-clock         h                    conn_ipg_clk               n      bus@5b000000             2simple-bus                                   -[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb             [                          "                    W           X            s   Y           	                       .           n           	  ;disabled          usbmisc@5b0d0200            B         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          [               X      usbphy@5b100000          2fsl,imx7ulp-usbphy           [             s   Y           n           	  ;disabled               W      mmc@5b010000            "                   [             s   Z      Z      Z            ipg ahb per         n              ;okay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           O            Y         g         m      "  udefault state_100mhz state_200mhz              [        u   \           ]      mmc@5b020000            "                   [             s   ^      ^      ^            ipg ahb per         n                                    ;okay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           O              P   	              _      (  udefault state_100mhz state_200mhz sleep            `   a        u   b   a           c   a           d   e                        mmc@5b030000            "                   [             s   f      f      f            ipg ahb per         n            	  ;disabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000            [           0  "                                              s   g      g      g      g            ipg ahb enet_clk_ref ptp            I                          Y沀sY@                              n              ;okay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           udefault sleep              h        u   i        rmii               j            mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22          *   d                       j            ethernet@5b050000            [           0  "                                             s   k      k      k      k            ipg ahb enet_clk_ref ptp            I                          Y沀sY@                              n            	  ;disabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3          [                                       -      (  s   l      l       l      l      l           lpm bus aclk ipg core           I                Y沀        n           	  ;disabled       usb@5b120000          
   2cdns,usb3            [     [     [             4otg xhci dev                       0  "                                            >host peripheral otg wakeup          N   m        Scdns3,usb3-phy          ]         	  ;disabled             usb-phy@5b160000             2nxp,salvo-phy            [             s   l           salvo_phy_clk           n             t          	  ;disabled               m      clock-controller@5b200000            2fsl,imx8qxp-lpcg             [              h           s            n   o                        9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            n                 Z      clock-controller@5b210000            2fsl,imx8qxp-lpcg             [!             h           s            n   o                        9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            n                 ^      clock-controller@5b220000            2fsl,imx8qxp-lpcg             ["             h           s            n   o                        9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            n                 f      clock-controller@5b230000            2fsl,imx8qxp-lpcg             [#             h         0  s                     o            n   n                                   enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            n                 g      clock-controller@5b240000            2fsl,imx8qxp-lpcg             [$             h         0  s                     o            n   n                                   enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            n                 k      clock-controller@5b270000            2fsl,imx8qxp-lpcg             ['             h           s   p   n                    "  usboh3_ahb_clk usboh3_phy_ipg_clk           n                Y      clock-controller@5b280000            2fsl,imx8qxp-lpcg             [(             h                                    0  s                   n   n   n              M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            n                l         bus@5c000000             2simple-bus                                   -\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu             \             "                   clock-lsio-bus           2fixed-clock         h                     lsio_bus_clk               y      bus@5d000000             2simple-bus                                    -]       ]                      pwm@5d000000             2fsl,imx27-pwm            ]              ipg per         s   q      q           I                 Yn6                    "       ^         	  ;disabled               r        udefault       pwm@5d010000             2fsl,imx27-pwm            ]             ipg per         s   s      s           I                 Yn6                    "       _         	  ;disabled               t        udefault       pwm@5d020000             2fsl,imx27-pwm            ]             ipg per         s   u      u           I                 Yn6                    "       `         	  ;disabled               v        udefault       pwm@5d030000             2fsl,imx27-pwm            ]             ipg per         s   w      w           I                 Yn6                    "       a         	  ;disabled          gpio@5d080000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       P     x      8      x      E      x      K      x      P      x      R           SODIMM_70 SODIMM_60 SODIMM_58 SODIMM_78 SODIMM_72 SODIMM_80 SODIMM_46 SODIMM_62 SODIMM_48 SODIMM_74 SODIMM_50 SODIMM_52 SODIMM_54 SODIMM_66 SODIMM_64 SODIMM_68   SODIMM_82 SODIMM_56 SODIMM_28 SODIMM_30  SODIMM_61 SODIMM_103    SODIMM_25 SODIMM_27 SODIMM_100        gpio@5d090000            ]	             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       0     x       Y   	   x   	   c      x      t          SODIMM_86 SODIMM_92 SODIMM_90 SODIMM_88    SODIMM_59  SODIMM_6 SODIMM_8   SODIMM_2 SODIMM_4 SODIMM_34 SODIMM_32 SODIMM_63 SODIMM_55 SODIMM_33 SODIMM_35 SODIMM_36 SODIMM_38 SODIMM_21 SODIMM_19 SODIMM_140 SODIMM_142 SODIMM_196 SODIMM_194 SODIMM_186 SODIMM_188 SODIMM_138               >      gpio@5d0a0000            ]
             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       0     x       {      x      ~      x                 SODIMM_23   SODIMM_144        gpio@5d0b0000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       0     x             x            x                 SODIMM_96 SODIMM_75 SODIMM_37 SODIMM_29      SODIMM_43 SODIMM_45 SODIMM_69 SODIMM_71 SODIMM_73 SODIMM_77 SODIMM_89 SODIMM_93 SODIMM_95 SODIMM_99 SODIMM_105 SODIMM_107 SODIMM_98 SODIMM_102 SODIMM_104 SODIMM_106              P      gpio@5d0c0000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio            x              x            x      	      x            x            x            x            x      %              SODIMM_129 SODIMM_133 SODIMM_127 SODIMM_131             SODIMM_44  SODIMM_76 SODIMM_31 SODIMM_47 SODIMM_190 SODIMM_192 SODIMM_49 SODIMM_51 SODIMM_53       gpio@5d0d0000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       0     x       (      x      ,      x   	   3         a   SODIMM_57 SODIMM_65 SODIMM_85     SODIMM_135 SODIMM_137 UNUSABLE_SODIMM_180 UNUSABLE_SODIMM_184               ?      gpio@5d0e0000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000            ]             "                                                          n                2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi             ]                   4fspi_base fspi_mmap         "       \           s                          fspi_en fspi            n            	  ;disabled          mailbox@5d1b0000             ]             "                           	  ;disabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000             ]             "                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000             ]             "                           	  ;disabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000             ]             "                           	  ;disabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000             ]             "                           	  ;disabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000             ]              "                             n            	  ;disabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000             ]!             "                             n            	  ;disabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000             ](             "                             n               2fsl,imx8qxp-mu fsl,imx6sx-mu          clock-controller@5d400000            2fsl,imx8qxp-lpcg             ]@             h         4  s                              y                                       h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         n                 q      clock-controller@5d410000            2fsl,imx8qxp-lpcg             ]A             h         4  s                              y                                       h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         n                 s      clock-controller@5d420000            2fsl,imx8qxp-lpcg             ]B             h         4  s                              y                                       h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         n                 u      clock-controller@5d430000            2fsl,imx8qxp-lpcg             ]C             h         4  s                              y                                       h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         n                 w      clock-controller@5d440000            2fsl,imx8qxp-lpcg             ]D             h         4  s                              y                                       h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         n            clock-controller@5d450000            2fsl,imx8qxp-lpcg             ]E             h         4  s                              y                                       h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         n            clock-controller@5d460000            2fsl,imx8qxp-lpcg             ]F             h         4  s                              y                                       h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         n            clock-controller@5d470000            2fsl,imx8qxp-lpcg             ]G             h         4  s                              y                                       h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         n               chosen          /bus@5a000000/serial@5a090000         gpio-keys         
   2gpio-keys           udefault            z        ;okay       key-wakeup             
           P   
            Wake-Up                              regulator-module-3v3             2regulator-fixed         +V3.3            2Z         2Z           _         	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 vpu-core0 vpu-core1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins linux,keycodes timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains slot clock-indices #mbox-cells clock-names dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #dma-cells dma-channels dma-channel-mask dais cs-gpios #pwm-cells touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval #io-channel-cells fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword #index-cells bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 fsl,tuning-start-tap fsl,tuning-step cd-gpios vmmc-supply pinctrl-3 disable-wp no-1-8-v fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed reg-names interrupt-names phys phy-names cdns,on-chip-buff-size #phy-cells gpio-controller #gpio-cells gpio-ranges gpio-line-names stdout-path debounce-interval label linux,code wakeup-source regulator-name regulator-min-microvolt regulator-max-microvolt 