    8 |   (             D                                                                   (   ,Qualcomm Technologies, Inc. QCM6490 IDP          2qcom,qcm6490-idp qcom,qcm6490         	   =embedded       chosen           Jserial0:115200n8          aliases       !   V/soc@0/geniqup@9c0000/i2c@980000          !   [/soc@0/geniqup@9c0000/i2c@984000          !   `/soc@0/geniqup@9c0000/i2c@988000          !   e/soc@0/geniqup@9c0000/i2c@98c000          !   j/soc@0/geniqup@9c0000/i2c@990000          !   o/soc@0/geniqup@9c0000/i2c@994000          !   t/soc@0/geniqup@9c0000/i2c@998000          !   y/soc@0/geniqup@9c0000/i2c@99c000          !   ~/soc@0/geniqup@ac0000/i2c@a80000          !   /soc@0/geniqup@ac0000/i2c@a84000          !   /soc@0/geniqup@ac0000/i2c@a88000          !   /soc@0/geniqup@ac0000/i2c@a8c000          !   /soc@0/geniqup@ac0000/i2c@a90000          !   /soc@0/geniqup@ac0000/i2c@a94000          !   /soc@0/geniqup@ac0000/i2c@a98000          !   /soc@0/geniqup@ac0000/i2c@a9c000             /soc@0/mmc@7c4000            /soc@0/mmc@8804000        !   /soc@0/geniqup@9c0000/spi@980000          !   /soc@0/geniqup@9c0000/spi@984000          !   /soc@0/geniqup@9c0000/spi@988000          !   /soc@0/geniqup@9c0000/spi@98c000          !   /soc@0/geniqup@9c0000/spi@990000          !   /soc@0/geniqup@9c0000/spi@994000          !   /soc@0/geniqup@9c0000/spi@998000          !   /soc@0/geniqup@9c0000/spi@99c000          !   /soc@0/geniqup@ac0000/spi@a80000          !   /soc@0/geniqup@ac0000/spi@a84000          !   /soc@0/geniqup@ac0000/spi@a88000          !   /soc@0/geniqup@ac0000/spi@a8c000          !   /soc@0/geniqup@ac0000/spi@a90000          !   /soc@0/geniqup@ac0000/spi@a94000          !   /soc@0/geniqup@ac0000/spi@a98000          !  /soc@0/geniqup@ac0000/spi@a9c000          $  /soc@0/geniqup@9c0000/serial@994000       clocks     xo-board             2fixed-clock                  $            1  I      sleep-clk            2fixed-clock           }         $            1   3         reserved-memory                                   9   hyp@80000000            @            `           D      aop@80800000            @                      D      aop-cmd-db@80860000         @                      2qcom,cmd-db          D      xbl-uefi-res@80880000           @    @                 D      sec-apps@808ff000           @                     D      smem@80900000           @                       D        1   #      cpucp@80b00000           D        @                   wlan-fw@80c00000            @                      D        1         zap@8b71a000            @    q                  D        1         mpss@8b800000           @          `           D        1         xbl@80700000            @    p                  D      cdsp-secure-heap@81800000           @                     D      camera@84300000         @    0       P           D      wpss@84800000           @                     D        1        adsp@86100000           @                     D        1        cdsp@88900000           @                     D        1        video@8a700000          @    p       p           D        1  "      cvp@8ae00000            @           P           D      ipa-fw@8b300000         @    0                  D      ipa-gsi@8b310000            @    1                  D      gpu-microcode@8b31a000          @    1                  D      tz-stat@c0000000            @                       D      tags@c0100000           @                      D      qtee@c1300000           @    0       P           D      trusted-apps@c1800000           @                     D      debug-vm@d0600000           @    `                  D         cpus                                 cpu@0           Kcpu       
   2qcom,kryo           @                W               ^psci            l           zpsci                                                d      (                                                                   1      l2-cache             2cache                                  	        1      l3-cache             2cache                               1   	            cpu@100         Kcpu       
   2qcom,kryo           @               W               ^psci            l   
        zpsci                                                d      (                                                                   1      l2-cache             2cache                                  	        1            cpu@200         Kcpu       
   2qcom,kryo           @               W               ^psci            l           zpsci                                                d      (                                                                   1      l2-cache             2cache                                  	        1            cpu@300         Kcpu       
   2qcom,kryo           @               W               ^psci            l           zpsci                                                d      (                                                                   1      l2-cache             2cache                                  	        1            cpu@400         Kcpu       
   2qcom,kryo           @               W              ^psci            l           zpsci                                                    (                                                                  1      l2-cache             2cache                                  	        1            cpu@500         Kcpu       
   2qcom,kryo           @               W              ^psci            l           zpsci                                                    (                                                                  1      l2-cache             2cache                                  	        1            cpu@600         Kcpu       
   2qcom,kryo           @               W              ^psci            l           zpsci                                                    (                                                                  1       l2-cache             2cache                                  	        1            cpu@700         Kcpu       
   2qcom,kryo           @               W              ^psci            l           zpsci                                              (      (                                                                  1   !   l2-cache             2cache                                  	        1            cpu-map    cluster0       core0           '         core1           '         core2           '         core3           '         core4           '         core5           '         core6           '          core7           '   !            idle-states         +psci       cpu-sleep-0-0            2arm,idle-state          8little-power-down           H@          _  %        p                             1   '      cpu-sleep-0-1            2arm,idle-state          8little-rail-power-down          H@          _          p                             1   (      cpu-sleep-1-0            2arm,idle-state          8big-power-down          H@          _          p                             1   )      cpu-sleep-1-1            2arm,idle-state          8big-rail-power-down         H@          _          p  >                           1   *         domain-idle-states     cluster-sleep-0          2domain-idle-state           HA  D        _  
        p                    1   +      cluster-sleep-1          2domain-idle-state           HA D        _          p            !        1   ,      cluster-sleep-2          2domain-idle-state           HA D        _  6        p            &b        1   -            opp-table-cpu0           2operating-points-v2                  1      opp-300000000                         5  |       opp-691200000               )2          5        opp-806400000               0          5 >       opp-940800000               8x          w        opp-1152000000              D           !b       opp-1324800000              N          !b       opp-1516800000              Zh          . E@       opp-1651200000              bkP          . }       opp-1804800000              k          >       opp-1958400000              t          >       opp-2016000000              x)          ^          opp-table-cpu4           2operating-points-v2                  1      opp-691200000               )2           |       opp-940800000               8x          !b       opp-1228800000              I>           >w        opp-1344000000              P          >w        opp-1516800000              Zh          >w        opp-1651200000              bkP          ^E@       opp-1900800000              qK          ^`       opp-2054400000              zs          ^`       opp-2112000000              }          ^`       opp-2131200000                        ^`       opp-2208000000              h          ^`       opp-2400000000                        0        opp-2611200000                        0           opp-table-cpu7           2operating-points-v2                  1      opp-806400000               0           |       opp-1056000000              >H          !b       opp-1324800000              N          >w        opp-1516800000              Zh          >w        opp-1766400000              iI           ^E@       opp-1862400000              o          ^E@       opp-2035200000              yN          ^E@       opp-2112000000              }          ^`       opp-2208000000              h          ^`       opp-2380800000                         h?`       opp-2400000000                        0        opp-2515200000                        0        opp-2707200000              \          0        opp-3014400000                        0           memory@80000000         Kmemory          @                     firmware       scm          2qcom,scm-sc7280 qcom,scm             interconnect             2qcom,sc7280-clk-virt                          "        1   H      smem          
   2qcom,smem              #           $         smp2p-adsp           2qcom,smp2p                         %                    %              !            0      master-kernel           @master-kernel           P           1        slave-kernel            @slave-kernel             g        |           1           smp2p-cdsp           2qcom,smp2p             ^             %                    %              !            0      master-kernel           @master-kernel           P           1        slave-kernel            @slave-kernel             g        |           1           smp2p-mpss           2qcom,smp2p                         %                    %              !            0      master-kernel           @master-kernel           P           1         slave-kernel            @slave-kernel             g        |           1         ipa-ap-to-modem         @ipa         P           1         ipa-modem-to-ap         @ipa          g        |           1            smp2p-wpss           2qcom,smp2p            i  h           %                    %              !            0      master-kernel           @master-kernel           P           1        slave-kernel            @slave-kernel             g        |           1        wlan-ap-to-wpss         @wlan            P           1         wlan-wpss-to-ap         @wlan             g        |            pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0            esmc    power-domain-cpu0                       l   &           '   (        1         power-domain-cpu1                       l   &           '   (        1   
      power-domain-cpu2                       l   &           '   (        1         power-domain-cpu3                       l   &           '   (        1         power-domain-cpu4                       l   &           )   *        1         power-domain-cpu5                       l   &           )   *        1         power-domain-cpu6                       l   &           )   *        1         power-domain-cpu7                       l   &           )   *        1         power-domain-cluster                           +   ,   -        1   &         opp-table-qspi           2operating-points-v2         1     opp-75000000                xh           .      opp-150000000               р           /      opp-200000000                           0      opp-300000000                           1         opp-table-qup            2operating-points-v2         1   L   opp-75000000                xh           .      opp-100000000                           /      opp-128000000                            1         soc@0                                    9                                                               2simple-bus     clock-controller@100000          2qcom,gcc-sc7280         @                    <  W   2       2      3       4   5       5      5      6            bi_tcxo bi_tcxo_ao sleep_clk pcie_0_pipe_clk pcie_1_pipe_clk ufs_phy_rx_symbol_0_clk ufs_phy_rx_symbol_1_clk ufs_phy_tx_symbol_0_clk usb3_phy_wrapper_gcc_usb30_pipe_clk            $                                 l   7            1   8      mailbox@408000           2qcom,sc7280-ipcc qcom,ipcc          @     @                                   g        |                      1   %      efuse@784000             2qcom,sc7280-qfprom qcom,qfprom        @  @     x@       
      x        
      x              x`               W   8           core            l   7                               gpu-speed-bin@1e9           @                           1            mmc@7c4000        $   2qcom,sc7280-sdhci qcom,sdhci-msm-v5         default sleep              9   :   ;   <           =   >   ?   @        $okay             @     |@             |P              	  +hc cqhci            5   A                                         <hc_irq pwr_irq          W   8   l   8   m   2            iface core xo         0     B                              C               Lsdhc-ddr cpu-sdhc           l   7               D        _            i         v         d,        h                                               8                                         E           F   opp-table            2operating-points-v2         1   D   opp-100000000                           .         w@         $           opp-384000000               `            1         Re j         $ p                dma-controller@900000           1         (   2qcom,sc7280-gpi-dma qcom,sm6350-gpi-dma         @                                                                                                                                                      <           I           5   A  6          	  $disabled            1   I      geniqup@9c0000           2qcom,geni-se-qup            @                       W   8   h   8   i        m-ahb s-ahb                                   9        5   A  #            $okay       i2c@980000           2qcom,geni-i2c           @             @         W   8   F        se          default            G              Y                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I              I                  _tx rx         	  $disabled          spi@980000           2qcom,geni-spi           @             @         W   8   F        se          default            J   K              Y                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I              I                  _tx rx         	  $disabled          serial@980000            2qcom,geni-uart          @             @         W   8   F        se          default            M   N   O   P              Y           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@984000           2qcom,geni-i2c           @     @       @         W   8   H        se          default            Q              Z                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@984000           2qcom,geni-spi           @     @       @         W   8   H        se          default            R   S              Z                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@984000            2qcom,geni-uart          @     @       @         W   8   H        se          default            T   U   V   W              Z           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@988000           2qcom,geni-i2c           @            @         W   8   J        se          default            X              [                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@988000           2qcom,geni-spi           @            @         W   8   J        se          default            Y   Z              [                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@988000            2qcom,geni-uart          @            @         W   8   J        se          default            [   \   ]   ^              [           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@98c000           2qcom,geni-i2c           @            @         W   8   L        se          default            _              \                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@98c000           2qcom,geni-spi           @            @         W   8   L        se          default            `   a              \                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@98c000            2qcom,geni-uart          @            @         W   8   L        se          default            b   c   d   e              \           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@990000           2qcom,geni-i2c           @             @         W   8   N        se          default            f              ]                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@990000           2qcom,geni-spi           @             @         W   8   N        se          default            g   h              ]                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@990000            2qcom,geni-uart          @             @         W   8   N        se          default            i   j   k   l              ]           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@994000           2qcom,geni-i2c           @     @       @         W   8   P        se          default            m              ^                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@994000           2qcom,geni-spi           @     @       @         W   8   P        se          default            n   o              ^                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@994000            2qcom,geni-debug-uart            @     @       @         W   8   P        se          default            p   q              ^           l   7               L      0     H           H                    C               Lqup-core qup-config         $okay          i2c@998000           2qcom,geni-i2c           @            @         W   8   R        se          default            r              _                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@998000           2qcom,geni-spi           @            @         W   8   R        se          default            s   t              _                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@998000            2qcom,geni-uart          @            @         W   8   R        se          default            u   v   w   x              _           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled          i2c@99c000           2qcom,geni-i2c           @            @         W   8   T        se          default            y              `                                   H     H           H                    C          B                         Lqup-core qup-config qup-memory          l   7               .         Z   I             I                 _tx rx         	  $disabled          spi@99c000           2qcom,geni-spi           @            @         W   8   T        se          default            z   {              `                                     l   7               L      0     H           H                    C               Lqup-core qup-config          Z   I             I                 _tx rx         	  $disabled          serial@99c000            2qcom,geni-uart          @            @         W   8   T        se          default            |   }   ~                 `           l   7               L      0     H           H                    C               Lqup-core qup-config       	  $disabled             dma-controller@a00000           1         (   2qcom,sc7280-gpi-dma qcom,sm6350-gpi-dma         @                                                                                  %         &         '         (         )         *           <           I           5   A   V          	  $disabled            1         geniqup@ac0000           2qcom,geni-se-qup            @                       W   8   j   8   k        m-ahb s-ahb                                   9        5   A   C          	  $disabled       i2c@a80000           2qcom,geni-i2c           @             @         W   8   X        se          default                          a                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                   _tx rx         	  $disabled          spi@a80000           2qcom,geni-spi           @             @         W   8   X        se          default                             a                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                   _tx rx         	  $disabled          serial@a80000            2qcom,geni-uart          @             @         W   8   X        se          default                                   a           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a84000           2qcom,geni-i2c           @     @       @         W   8   Z        se          default                          b                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a84000           2qcom,geni-spi           @     @       @         W   8   Z        se          default                             b                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a84000            2qcom,geni-uart          @     @       @         W   8   Z        se          default                                   b           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a88000           2qcom,geni-i2c           @            @         W   8   \        se          default                          c                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a88000           2qcom,geni-spi           @            @         W   8   \        se          default                             c                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a88000            2qcom,geni-uart          @            @         W   8   \        se          default                                   c           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a8c000           2qcom,geni-i2c           @            @         W   8   ^        se          default                          d                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a8c000           2qcom,geni-spi           @            @         W   8   ^        se          default                             d                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a8c000            2qcom,geni-uart          @            @         W   8   ^        se          default                                   d           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a90000           2qcom,geni-i2c           @             @         W   8   `        se          default                          e                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a90000           2qcom,geni-spi           @             @         W   8   `        se          default                             e                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a90000            2qcom,geni-uart          @             @         W   8   `        se          default                                   e           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a94000           2qcom,geni-i2c           @     @       @         W   8   b        se          default                          f                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a94000           2qcom,geni-spi           @     @       @         W   8   b        se          default                             f                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a94000            2qcom,geni-uart          @     @       @         W   8   b        se          default                                   f           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a98000           2qcom,geni-i2c           @            @         W   8   d        se          default                          p                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a98000           2qcom,geni-spi           @            @         W   8   d        se          default                             p                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a98000            2qcom,geni-uart          @            @         W   8   d        se          default                                   p           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled          i2c@a9c000           2qcom,geni-i2c           @            @         W   8   f        se          default                          q                                   H     H          H                    C                                   Lqup-core qup-config qup-memory          l   7               .         Z                                 _tx rx         	  $disabled          spi@a9c000           2qcom,geni-spi           @            @         W   8   f        se          default                             q                                     l   7               L      0     H          H                    C               Lqup-core qup-config          Z                                 _tx rx         	  $disabled          serial@a9c000            2qcom,geni-uart          @            @         W   8   f        se          default                                   q           l   7               L      0     H          H                    C               Lqup-core qup-config       	  $disabled             rng@10d3000          2qcom,sc7280-trng qcom,trng          @    0              interconnect@1500000            @    P                  2qcom,sc7280-cnoc2                         "        1   C      interconnect@1502000            @    P                  2qcom,sc7280-cnoc3                         "      interconnect@1580000            @    X                  2qcom,sc7280-mc-virt                       "        1         interconnect@1680000            @    h       T         2qcom,sc7280-system-noc                        "      interconnect@16e0000             2qcom,sc7280-aggre1-noc          @    n                             "        1   B      interconnect@1700000            @    p                2qcom,sc7280-aggre2-noc                        "        1         interconnect@1740000            @    t                2qcom,sc7280-mmss-noc                          "        1  !      wifi@17a10040            2qcom,wcn6750-wifi           @     @                5   A                                                                                                     	         
                                                                                                                                                                                                        i                    	  $disabled            t               wlan-smp2p-out        pcie@1c08000             2qcom,pcie-sc7280          P  @           0     @             @             @             @                 +parf dbi elbi atu config            Kpci                                                                     8  9               @                 @0      @0              `        3         4         5         8         9         :         v         w         (  <msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         |                                                                                                                                                                                    d  W   8   7   8   8   4   2       8   2   8   4   8   5   8   9   8   :   8      8      8      8         a  pipe pipe_mux phy_pipe ref aux cfg bus_master bus_slave slave_q2a tbu ddrss_sf_tbu aggre0 aggre1               8   2        $            8           pci         l   8              4        pciephy         default                     v         !       A           A           	  $disabled       pcie@0          Kpci         @                                                                    9         phy@1c0e000           2qcom,sm8250-qmp-gen3x2-pcie-phy         @                  (  W   8   2   8   4   8      8   (   8   7        aux cfg_ahb ref refgen pipe         +pcie_1_pipe_clk         $            >               8           phy            8   (               	  $disabled            1   4      ufs@1d84000       +   2qcom,sc7280-ufshc qcom,ufshc jedec,ufs-2.0          @    @       0               	              5        ufsphy          I                         8   	        rst         l   8              1        5   A                v      0     B   	                        C   %           Lufs-ddr cpu-ufs       @  W   8   }   8   	   8   |   8      2       8      8      8         n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @  ]xh                 xh                                         k         	  $disabled            1         phy@1d87000          2qcom,sc7280-qmp-ufs-phy         @    p                W   2       8      8   {        ref ref_aux qref            l   7                          ufsphy          $           >          	  $disabled            1   5      crypto@1d88000        ;   2qcom,sc7280-inline-crypto-engine qcom,inline-crypto-engine          @    ؀                W   8           1         dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0         @    @                                1           5   A        A             t             |                              1         crypto@1dfa000        )   2qcom,sc7280-qce qcom,sm8150-qce qcom,qce            @    ߠ       `         Z                    _rx tx           5   A        A                                         Lmemory        ipa@1e40000          2qcom,sc7280-ipa         5   A         A            0  @                         J    @      0         +ipa-reg ipa-shared gsi        8                                                   (  <ipa gsi ipa-clock-query ipa-setup-ready         W   2           core          0                                   C               Lmemory config                      t                   *  ipa-clock-enabled-valid ipa-clock-enabled         	  $disabled          hwlock@1f40000           2qcom,tcsr-mutex         @                                1   $      syscon@1f60000           2qcom,sc7280-tcsr syscon         @                   syscon@1fc0000           2qcom,sc7280-tcsr syscon         @                   lpasscc@3000000          2qcom,sc7280-lpasscc          @              @    @                +qdsp6ss top_cc          W   8           iface           $         	  $reserved          codec@3200000            2qcom,sc7280-lpass-rx-macro          @                      default                       W                       mclk npl fsgen          l                      zmacro dcodec            $                     	  $disabled            1         soundwire@3210000            2qcom,soundwire-v1.6.0           @    !                                    W           iface                                                 swr_audio_cgcr                     ?           &             9               L               d                                                                                 	  $disabled          codec@3220000            2qcom,sc7280-lpass-tx-macro          @    "                 default                       W                       mclk npl fsgen          l                      zmacro dcodec            $                     	  $disabled            1         soundwire@3230000            2qcom,soundwire-v1.6.0           @    #                                               W           iface                                                swr_audio_cgcr                   &          9                                        d                  L                                              	  $disabled          clock-controller@3300000             2qcom,sc7280-lpassaudiocc             @    0             *                W   2                &  bi_tcxo lpass_aon_cc_main_rcg_clk_src           l               $                                 1         codec@3370000            2qcom,sc7280-lpass-va-macro          @    7                 default                       W              mclk            l                      zmacro dcodec            $                     	  $disabled            1         clock-controller@3380000             2qcom,sc7280-lpassaoncc          @    8                 W   2       2                 bi_tcxo bi_tcxo_ao iface            $                    	  $reserved            1         clock-controller@3900000             2qcom,sc7280-lpasscorecc         @                     W   2            bi_tcxo         l               $                    	  $reserved            1         audio@3987000            2qcom,sc7280-lpass-cpu         `  @    p                       &             (            4            6       0       e  +lpass-hdmiif lpass-lpaif lpass-rxtx-cdc-dma-lpm lpass-rxtx-lpaif lpass-va-lpaif lpass-va-cdc-dma-lpm          $  5   A          A  !       A  2            l   7           zlcx            1      P  W                                                            
        aon_cc_audio_hm_h audio_cc_ext_mclk0 core_cc_sysnoc_mport_core core_cc_ext_if0_ibit core_cc_ext_if1_ibit audio_cc_codec_mem audio_cc_codec_mem0 audio_cc_codec_mem1 audio_cc_codec_mem2 aon_cc_va_mem0                                             0                                               ?  <lpass-irq-lpaif lpass-irq-hdmi lpass-irq-vaif lpass-irq-rxtxif        	  $disabled          dma-controller@3a84000           2qcom,bam-v1.7.0         @    @                                  1            |                   t                      5   A  &          	  $disabled            1         slim-ngd@3ac0000             2qcom,slim-ngd-v1.5.0            @                                      Z                    _rx tx           5   A  &                                    	  $disabled          clock-controller@3c00000             2qcom,sc7280-lpasshm         @             (        W   2            bi_tcxo         $                    	  $reserved            1         interconnect@3c40000            @                     2qcom,sc7280-lpass-ag-noc                          "      pinctrl@33c0000          2qcom,sc7280-lpass-lpi-pinctrl            @    <             U                                                           1      dmic01-clk-state            gpio6         
  dmic1_clk           1         dmic01-data-state           gpio7           dmic1_data          1         dmic23-clk-state            gpio8         
  dmic2_clk         dmic23-data-state           gpio9           dmic2_data        rx-swr-clk-state            gpio3           swr_rx_clk          1         rx-swr-data-state           gpio4 gpio5         swr_rx_data         1         tx-swr-clk-state            gpio0           swr_tx_clk          1         tx-swr-data-state           gpio1 gpio2 gpio14          swr_tx_data         1            gpu@3d00000          2qcom,adreno-635.0 qcom,adreno         0  @                                           #  +kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           5                                                                             Lgfx-mem                             
  
speed_bin           1  k   zap-shader                   opp-table            2operating-points-v2         1      opp-315000000               Ƅ           @                 %         opp-450000000               t                    >        %         opp-550000000-0              U                            %         opp-550000000-1              U                    h?        %         opp-608000000               $=X                             %         opp-700000000               )'                     0         %         opp-812000000               0f#           @         0         %         opp-840000000               2b                    0         %         opp-900000000               5                    0         %               gmu@3d6a000       &   2qcom,adreno-gmu-635.0 qcom,adreno-gmu         0  @    ֠      @                  )                 +gmu rscc gmu_pdc                  0         1           <hfi gmu       8  W               8      8   %                        %  gmu cxo axi memnoc ahb hub smmu_vote            l                     zcx gx           5                            1      opp-table            2operating-points-v2         1      opp-200000000                           0            clock-controller@3d90000             2qcom,sc7280-gpucc           @                     W   2       8   "   8   #      8  bi_tcxo gcc_gpu_gpll0_clk_src gcc_gpu_gpll0_div_clk_src         $                                 1         dma@117f000          2qcom,sc7280-dcc qcom,dcc             @                        `       iommu@3da0000         @   2qcom,sc7280-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500         @                     6           C                                                                                                                             8  W   8   %   8   &                                      gcc_gpu_memnoc_gfx_clk gcc_gpu_snoc_dvm_gfx_clk gpu_cc_ahb_clk gpu_cc_hlos1_vote_gpu_smmu_clk gpu_cc_cx_gmu_clk gpu_cc_hub_cx_int_clk gpu_cc_hub_aon_clk            l                v        1         remoteproc@4080000           2qcom,sc7280-mpss-pas            @                   L                                                                  0  <wdog fatal ready handover stop-ack shutdown-ack         W   2            xo          l   7       7           zcx mss                                t               stop            $okay            Vqcom/qcm6490/modem.mbn     glink-edge             %                     %               dmodem           0            stm@6002000           2arm,coresight-stm arm,primecell          @                  (                 +stm-base stm-stimulus-base          W         	  apb_pclk       out-ports      port       endpoint            j           1                  funnel@6041000        +   2arm,coresight-dynamic-funnel arm,primecell          @                    W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports                                 port@7          @      endpoint            j           1                  funnel@6042000        +   2arm,coresight-dynamic-funnel arm,primecell          @                     W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports                                 port@4          @      endpoint            j           1                  funnel@6045000        +   2arm,coresight-dynamic-funnel arm,primecell          @    P                W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports                                 port@0          @       endpoint            j           1            port@1          @      endpoint            j           1                  replicator@6046000        /   2arm,coresight-dynamic-replicator arm,primecell          @    `                W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports       port       endpoint            j           1                  etr@6048000           2arm,coresight-tmc arm,primecell         @                    5   A              W         	  apb_pclk             z   in-ports       port       endpoint            j           1                  funnel@6b04000        +   2arm,coresight-dynamic-funnel arm,primecell          @    @                W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports                                 port@7          @      endpoint            j           1                  etf@6b05000           2arm,coresight-tmc arm,primecell         @    P                W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports       port       endpoint            j           1                  replicator@6b06000        /   2arm,coresight-dynamic-replicator arm,primecell          @    `                W         	  apb_pclk                out-ports      port       endpoint            j           1               in-ports       port       endpoint            j           1                  etm@7040000       "   2arm,coresight-etm4x arm,primecell           @                     '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7140000       "   2arm,coresight-etm4x arm,primecell           @                     '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7240000       "   2arm,coresight-etm4x arm,primecell           @    $                 '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7340000       "   2arm,coresight-etm4x arm,primecell           @    4                 '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7440000       "   2arm,coresight-etm4x arm,primecell           @    D                 '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7540000       "   2arm,coresight-etm4x arm,primecell           @    T                 '           W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7640000       "   2arm,coresight-etm4x arm,primecell           @    d                 '            W         	  apb_pclk                         out-ports      port       endpoint            j           1                  etm@7740000       "   2arm,coresight-etm4x arm,primecell           @    t                 '   !        W         	  apb_pclk                         out-ports      port       endpoint            j           1                  funnel@7800000        +   2arm,coresight-dynamic-funnel arm,primecell          @                     W         	  apb_pclk       out-ports      port       endpoint            j           1              in-ports                                 port@0          @       endpoint            j           1            port@1          @      endpoint            j           1            port@2          @      endpoint            j           1            port@3          @      endpoint            j           1            port@4          @      endpoint            j           1            port@5          @      endpoint            j           1            port@6          @      endpoint            j           1            port@7          @      endpoint            j           1                  funnel@7810000        +   2arm,coresight-dynamic-funnel arm,primecell          @                     W         	  apb_pclk       out-ports      port       endpoint            j           1               in-ports       port       endpoint            j          1                  mmc@8804000       $   2qcom,sc7280-sdhci qcom,sdhci-msm-v5         default sleep                                     	  $disabled            @    @                5   A                                           <hc_irq pwr_irq          W   8   q   8   r   2            iface core xo         0     B                              C                Lsdhc-ddr cpu-sdhc           l   7                      _            v         d,           8      opp-table            2operating-points-v2         1     opp-100000000                           .         w@         $           opp-202000000               
F           1         Re j         $ @                phy@88e3000       0   2qcom,sc7280-usb-hs-phy qcom,usb-snps-hs-7nm-phy         @    0                $okay            >            W   2            ref            8             	          
        	          1        phy@88e4000       0   2qcom,sc7280-usb-hs-phy qcom,usb-snps-hs-7nm-phy         @    @              	  $disabled            >            W   2            ref            8           1        phy@88e8000          2qcom,sc7280-qmp-usb3-dp-phy         @           0         $okay             W   8      2       8      8           aux ref com_aux usb3_pipe              8      8           phy common          $           >           	                    1   6   ports                                port@0          @       endpoint             port@1          @      endpoint             port@2          @      endpoint                   usb@8cf8800          2qcom,sc7280-dwc3 qcom,dwc3          @    ψ              	  $disabled                                      9               (  W   8      8      8      8      8         #  cfg_noc core iface sleep mock_utmi             8      8           $        8                                                    1  <pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq            l   8              1           8         0     B   
                           C   &            Lusb-ddr apps-usb       usb@8c00000       
   2snps,dwc3           @                                       5   A                	         	8                	  usb2-phy            	Phigh-speed           	^   port       endpoint            j          1                 spi@88dc000          2qcom,sc7280-qspi qcom,qspi-v1           @                    5   A                                                 R           W   8      8           iface core                       C               Lqspi-config         l   7                    	  $disabled          remoteproc@3700000           2qcom,sc7280-adsp-pas            @    p               H                                                          0  <wdog fatal ready handover stop-ack shutdown-ack         W   2            xo          l   7      7           zlcx lmx                              t              stop            $okay            Vqcom/qcm6490/adsp.mbn      glink-edge             %                     %               dlpass           0      fastrpc          2qcom,fastrpc            	nfastrpcglink-apps-dsp           dadsp             	                             compute-cb@3             2qcom,fastrpc-compute-cb         @           5   A            compute-cb@4             2qcom,fastrpc-compute-cb         @           5   A            compute-cb@5             2qcom,fastrpc-compute-cb         @           5   A                     remoteproc@8a00000           2qcom,sc7280-wpss-pas            @                   L           K                                                  0  <wdog fatal ready handover stop-ack shutdown-ack         W   2            xo          l   7       7           zcx mx                                t              stop            $okay            Vqcom/qcm6490/wpss.mbn           1      glink-edge             %                     %               dwpss            0            pmu@9091000          2qcom,sc7280-llcc-bwmon          @    		                       Q                                           opp-table            2operating-points-v2         1     opp-0            5       opp-1                  opp-2            !b      opp-3            .       opp-4            >      opp-5            ^      opp-6            h?      opp-7            0             pmu@90b6400       (   2qcom,sc7280-cpu-bwmon qcom,sdm845-bwmon         @    	d                      E                                          opp-table            2operating-points-v2         1     opp-0            $       opp-1            I>       opp-2            q       opp-3            |       opp-4                   opp-5            Ȁ      opp-6           A             interconnect@90e0000            @    	        P         2qcom,sc7280-dc-noc                        "      interconnect@9100000            @    	       "          2qcom,sc7280-gem-noc                       "        1         system-cache-controller@9200000          2qcom,sc7280-llcc          0  @    	             	(            	`              *  +llcc0_base llcc1_base llcc_broadcast_base                 F         eud@88e0000          2qcom,sc7280-eud qcom,eud             @                                                  	  $disabled       ports                                port@0          @       endpoint            j          1                 interconnect@a0c0000            @    
                  2qcom,sc7280-nsp-noc                       "        1        remoteproc@a300000           2qcom,sc7280-cdsp-pas            @    
0               L           B                                                  0  <wdog fatal ready handover stop-ack shutdown-ack         W   2            xo          l   7       7           zcx mx                                                           t              stop            $okay            Vqcom/qcm6490/cdsp.mbn      glink-edge             %                     %               dcdsp            0      fastrpc          2qcom,fastrpc            	nfastrpcglink-apps-dsp           dcdsp             	                             compute-cb@1             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@2             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@3             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@4             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@5             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@6             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@7             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@8             2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@11            2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@12            2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@13            2qcom,fastrpc-compute-cb         @           5   A        A           compute-cb@14            2qcom,fastrpc-compute-cb         @           5   A        A                    usb@a6f8800          2qcom,sc7280-dwc3 qcom,dwc3          @    
o                $okay                                      9               (  W   8      8      8   
   8      8         #  cfg_noc core iface sleep mock_utmi             8      8           $        D                                                             <  <pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq         l   8              1           8   
      0     B                              C   '            Lusb-ddr apps-usb             	   usb@a600000       
   2snps,dwc3           @    
`                                   5   A                	         	8         	             6            usb2-phy usb3-phy           	Psuper-speed         	peripheral     ports                                port@0          @       endpoint             port@1          @      endpoint                      video-codec@aa00000          2qcom,sc7280-venus           @    
                                (  W               	                &  core bus iface vcodec_core vcodec_bus           l              7            zvenus vcodec0 cx                     0               C   (      !                         Lcpu-cfg video-mem           5   A  !              "      	  $disabled       video-decoder            2venus-decoder         video-encoder            2venus-encoder         opp-table            2operating-points-v2         1      opp-133330000               tP           .      opp-240000000               N            /      opp-335000000                          0      opp-424000000               E            1      opp-460000048               k0          #            clock-controller@aaf0000             2qcom,sc7280-videocc         @    
                 W   2       2           bi_tcxo bi_tcxo_ao          $                                 1        cci@ac4a000       !   2qcom,sc7280-cci qcom,msm8996-cci            @    
Ġ                                 l  $         (  W  $     $   j  $     $     $         -  camnoc_axi slow_ahb_src cpas_ahb cci cci_src              %  &          '  (        default sleep                                   	  $disabled       i2c-bus@0           @             B@                                i2c-bus@1           @            B@                                   cci@ac4b000       !   2qcom,sc7280-cci qcom,msm8996-cci            @    
İ                                 l  $         (  W  $     $   j  $     $     $         -  camnoc_axi slow_ahb_src cpas_ahb cci cci_src              )  *          +  ,        default sleep                                   	  $disabled       i2c-bus@0           @             B@                                i2c-bus@1           @            B@                                   clock-controller@ad00000             2qcom,sc7280-camcc           @    
                 W   2       2      3        bi_tcxo bi_tcxo_ao sleep_clk            $                                 1  $      clock-controller@af00000             2qcom,sc7280-dispcc          @    
               @  W   2       8     -      -      6      6     .      .           bi_tcxo gcc_disp_gpll0_clk dsi0_phy_pll_out_byteclk dsi0_phy_pll_out_dsiclk dp_phy_pll_link_clk dp_phy_pll_vco_div_clk edp_phy_pll_link_clk edp_phy_pll_vco_div_clk         $                                 1  /      display-subsystem@ae00000            2qcom,sc7280-mdss            @    
                 +mdss            l  /            W   8     /     /           iface ahb core                 S            g        |         0    !                           C              Lmdp0-mem cpu-cfg            5   A  	                                     9        $okay            1  1   display-controller@ae01000           2qcom,sc7280-dpu          @    
      0    
               	  +mdp vbif          0  W   8      8     /     /     /     /   %      !  bus nrt_bus iface lut core vsync              /   %  /           $ $           0        l   7                1               ports                                port@0          @       endpoint            j  2        1  6         port@1          @      endpoint            j  3        1  ?         port@2          @      endpoint            j  4        1  A            opp-table            2operating-points-v2         1  0   opp-200000000                           .      opp-300000000                           /      opp-380000000               W            0      opp-506666667               3           1      opp-608000000               $=X           #            dsi@ae94000       (   2qcom,sc7280-dsi-ctrl qcom,mdss-dsi-ctrl         @    
@              	  +dsi_ctrl                1                 0  W  /     /     /     /     /      8         $  byte byte_intf pixel core iface bus           /     /            	  -      -             5        l   7              -                                  $okay            	     ports                                port@0          @       endpoint            j  6        1  2         port@1          @      endpoint            j  7        	                     1  <            opp-table            2operating-points-v2         1  5   opp-187500000               -           .      opp-300000000                           /      opp-358000000               V           0         panel@0          2novatek,nt36672e            @            	  8   ,            
  9        
  :        
   :        
,  ;   port       endpoint            j  <        1  7               phy@ae94400          2qcom,sc7280-dsi-phy-7nm       0  @    
D            
F           
I               +dsi_phy dsi_phy_lane dsi_pll            $           >            W  /      2          
  iface ref           $okay            
6  	        1  -      edp@aea0000          2qcom,sc7280-edp         default           =      @  @    
             
            
            
                    1                 (  W  /     /     /     /     /         ;  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel            /     /           	  .      .             .        dp            >        l   7          	  $disabled       ports                                port@0          @       endpoint            j  ?        1  3         port@1          @      endpoint                opp-table            2operating-points-v2         1  >   opp-160000000               	h            .      opp-270000000               ߀           /      opp-540000000                /            1      opp-810000000               0G           1            phy@aec2a00          2qcom,sc7280-edp-phy       @  @    
*           
"            
&            
                W   2       8           aux cfg_ahb         $           >          	  $disabled            1  .      displayport-controller@ae90000           2qcom,sc7280-dp        P  @    
             
            
            
            
                    1                 (  W  /     /     /     /     /         ;  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel            /     /           	   6      6              6           dp            @        l   7                      	  $disabled       ports                                port@0          @       endpoint            j  A        1  4         port@1          @      endpoint                opp-table            2operating-points-v2         1  @   opp-160000000               	h            .      opp-270000000               ߀           /      opp-540000000                /            0      opp-810000000               0G           1               interrupt-controller@b220000             2qcom,sc7280-pdc qcom,pdc            @    "                 
B         (   (         6        7  2      ;  8      >  v      @        B        E   V      F     6   |  a         ?                   |                         g        1         reset-controller@b5e0000             2qcom,sc7280-pdc-global          @    ^                          	  $reserved          thermal-sensor@c263000            2qcom,sc7280-tsens qcom,tsens-v2          @    &0           "                
R                                     <uplow critical          
`           1  P      thermal-sensor@c265000            2qcom,sc7280-tsens qcom,tsens-v2          @    &P           "0               
R                                     <uplow critical          
`           1  i      reset-controller@c2a0000          (   2qcom,sc7280-aoss-cc qcom,sdm845-aoss-cc         @    *                         power-management@c300000          #   2qcom,sc7280-aoss-qmp qcom,aoss-qmp          @    0                    %                      %                $            1         sram@c3f0000             2qcom,rpmh-stats         @    ?               spmi@c440000             2qcom,spmi-pmic-arb        P  @    D             `             `             p       
      @      `         +core chnls obsrvr intr cnfg         <periph_irq                           t            
v                                       g        |      pmic@8           2qcom,pm7250b qcom,spmi-pmic         @                                    temp-alarm@2400          2qcom,spmi-temp-alarm            @  $               $               
  B           
thermal         
`            1  m      adc@3100             2qcom,spmi-adc5          @  1                                   
                 1               1  B   channel@0           @            
              dref_gnd       channel@1           @           
            
  dvref_1p25         channel@2           @           
            	  ddie_temp          channel@7           @           
              dusb_in_i_uv       channel@8           @           
              dusb_in_v_div_16       channel@9           @   	        
            	  dchg_temp          channel@e           @           
           
              dsmb1390_therm         channel@1e          @           
              dchg_mid       channel@4b          @   K        
           
               
        dbat_id        channel@83          @           
              dvph_pwr       channel@84          @           
            	  dvbat_sns          channel@99          @           
            	  dchg_sbux             adc-tm@3500          2qcom,spmi-adc-tm5           @  5               5               
`                                   	  $disabled          gpio@c000         !   2qcom,pm7250b-gpio qcom,spmi-gpio            @                      C                               g        |           1  C   lcd-disp-bias-en-state          gpio2           func1            
        
            	                 %            1  s            pmic@9           2qcom,pm7250b qcom,spmi-pmic         @   	                                    pmic@1           2qcom,pm7325 qcom,spmi-pmic          @                                    temp-alarm@a00           2qcom,spmi-temp-alarm            @  
               
               
`            1  n      gpio@8800             2qcom,pm7325-gpio qcom,spmi-gpio         @                      D           
                    g        |           1  D   key-vol-up-state            gpio6           normal           2         ?        
           1  t            pmic@2           2qcom,pm8350c qcom,spmi-pmic         @                                    temp-alarm@a00           2qcom,spmi-temp-alarm            @  
               
               
`            1  o      gpio@8800         !   2qcom,pm8350c-gpio qcom,spmi-gpio            @                      E           	                    g        |           1  E   pmic-lcd-bl-en-state            gpio7           normal           
        
            L        %            1  r      pmic-lcd-bl-pwm-state           gpio8           func1            
        
            L        %            1  F         led-controller@ee00       +   2qcom,pm8350c-flash-led qcom,spmi-flash-led          @         	  $disabled          pwm          2qcom,pm8350c-pwm            W           $okay              F        default         1  q   multi-led           b   	        status                               led@1           @           b         led@2           @           b         led@3           @           b                  pmic@0           2qcom,pmk8350 qcom,spmi-pmic         @                                     pon@1300             2qcom,pmk8350-pon            @            	  +hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              h   t        $okay          resin            2qcom,pmk8350-resin                               $okay            h   r         adc@3100             2qcom,spmi-adc7          @  1                                          1               
         adc-tm@3400          2qcom,spmi-adc-tm5-gen2          @  4                4                                         
`         	  $disabled          rtc@6100             2qcom,pmk8350-rtc            @  a   b       
  +rtc alarm                  b            	  $disabled          nvram@7100           2qcom,spmi-sdam          @  q                                  9      q       reboot-reason@48            @   H                         1  p         gpio@b000         !   2qcom,pmk8350-gpio qcom,spmi-gpio            @                      G                               g        |           1  G            pinctrl@f100000          2qcom,sc7280-pinctrl         @           0                                                 g        |             8                   s                     0           1  8   cci0-default-state          gpio69 gpio70           cci_i2c         
            ?        1  %      cci0-sleep-state            gpio69 gpio70           cci_i2c         
                    1  '      cci1-default-state          gpio71 gpio72           cci_i2c         
            ?        1  &      cci1-sleep-state            gpio71 gpio72           cci_i2c         
                    1  (      cci2-default-state          gpio73 gpio74           cci_i2c         
            ?        1  )      cci2-sleep-state            gpio73 gpio74           cci_i2c         
                    1  +      cci3-default-state          gpio75 gpio76           cci_i2c         
            ?        1  *      cci3-sleep-state            gpio75 gpio76           cci_i2c         
                    1  ,      dp-hot-plug-det-state           gpio47          dp_hot        edp-hot-plug-det-state          gpio60          edp_hot         1  =      mi2s0-data0-state           gpio98          mi2s0_data0       mi2s0-data1-state           gpio99          mi2s0_data1       mi2s0-mclk-state            gpio96        	  pri_mi2s          mi2s0-sclk-state            gpio97        
  mi2s0_sck         mi2s0-ws-state          gpio100       	  mi2s0_ws          mi2s1-data0-state           gpio107         mi2s1_data0       mi2s1-sclk-state            gpio106       
  mi2s1_sck         mi2s1-ws-state          gpio108       	  mi2s1_ws          pcie1-clkreq-n-state            gpio79          pcie1_clkreqn           1         qspi-clk-state          gpio14        	  qspi_clk          qspi-cs0-state          gpio15          qspi_cs       qspi-cs1-state          gpio19          qspi_cs       qspi-data0-state            gpio12        
  qspi_data         qspi-data1-state            gpio13        
  qspi_data         qspi-data23-state           gpio16 gpio17         
  qspi_data         qup-i2c0-data-clk-state         gpio0 gpio1         qup00           1   G      qup-i2c1-data-clk-state         gpio4 gpio5         qup01           1   Q      qup-i2c2-data-clk-state         gpio8 gpio9         qup02           1   X      qup-i2c3-data-clk-state         gpio12 gpio13           qup03           1   _      qup-i2c4-data-clk-state         gpio16 gpio17           qup04           1   f      qup-i2c5-data-clk-state         gpio20 gpio21           qup05           1   m      qup-i2c6-data-clk-state         gpio24 gpio25           qup06           1   r      qup-i2c7-data-clk-state         gpio28 gpio29           qup07           1   y      qup-i2c8-data-clk-state         gpio32 gpio33           qup10           1         qup-i2c9-data-clk-state         gpio36 gpio37           qup11           1         qup-i2c10-data-clk-state            gpio40 gpio41           qup12           1         qup-i2c11-data-clk-state            gpio44 gpio45           qup13           1         qup-i2c12-data-clk-state            gpio48 gpio49           qup14           1         qup-i2c13-data-clk-state            gpio52 gpio53           qup15           1         qup-i2c14-data-clk-state            gpio56 gpio57           qup16           1         qup-i2c15-data-clk-state            gpio60 gpio61           qup17           1         qup-spi0-data-clk-state         gpio0 gpio1 gpio2           qup00           1   J      qup-spi0-cs-state           gpio3           qup00           1   K      qup-spi0-cs-gpio-state          gpio3           gpio          qup-spi1-data-clk-state         gpio4 gpio5 gpio6           qup01           1   R      qup-spi1-cs-state           gpio7           qup01           1   S      qup-spi1-cs-gpio-state          gpio7           gpio          qup-spi2-data-clk-state         gpio8 gpio9 gpio10          qup02           1   Y      qup-spi2-cs-state           gpio11          qup02           1   Z      qup-spi2-cs-gpio-state          gpio11          gpio          qup-spi3-data-clk-state         gpio12 gpio13 gpio14            qup03           1   `      qup-spi3-cs-state           gpio15          qup03           1   a      qup-spi3-cs-gpio-state          gpio15          gpio          qup-spi4-data-clk-state         gpio16 gpio17 gpio18            qup04           1   g      qup-spi4-cs-state           gpio19          qup04           1   h      qup-spi4-cs-gpio-state          gpio19          gpio          qup-spi5-data-clk-state         gpio20 gpio21 gpio22            qup05           1   n      qup-spi5-cs-state           gpio23          qup05           1   o      qup-spi5-cs-gpio-state          gpio23          gpio          qup-spi6-data-clk-state         gpio24 gpio25 gpio26            qup06           1   s      qup-spi6-cs-state           gpio27          qup06           1   t      qup-spi6-cs-gpio-state          gpio27          gpio          qup-spi7-data-clk-state         gpio28 gpio29 gpio30            qup07           1   z      qup-spi7-cs-state           gpio31          qup07           1   {      qup-spi7-cs-gpio-state          gpio31          gpio          qup-spi8-data-clk-state         gpio32 gpio33 gpio34            qup10           1         qup-spi8-cs-state           gpio35          qup10           1         qup-spi8-cs-gpio-state          gpio35          gpio          qup-spi9-data-clk-state         gpio36 gpio37 gpio38            qup11           1         qup-spi9-cs-state           gpio39          qup11           1         qup-spi9-cs-gpio-state          gpio39          gpio          qup-spi10-data-clk-state            gpio40 gpio41 gpio42            qup12           1         qup-spi10-cs-state          gpio43          qup12           1         qup-spi10-cs-gpio-state         gpio43          gpio          qup-spi11-data-clk-state            gpio44 gpio45 gpio46            qup13           1         qup-spi11-cs-state          gpio47          qup13           1         qup-spi11-cs-gpio-state         gpio47          gpio          qup-spi12-data-clk-state            gpio48 gpio49 gpio50            qup14           1         qup-spi12-cs-state          gpio51          qup14           1         qup-spi12-cs-gpio-state         gpio51          gpio          qup-spi13-data-clk-state            gpio52 gpio53 gpio54            qup15           1         qup-spi13-cs-state          gpio55          qup15           1         qup-spi13-cs-gpio-state         gpio55          gpio          qup-spi14-data-clk-state            gpio56 gpio57 gpio58            qup16           1         qup-spi14-cs-state          gpio59          qup16           1         qup-spi14-cs-gpio-state         gpio59          gpio          qup-spi15-data-clk-state            gpio60 gpio61 gpio62            qup17           1         qup-spi15-cs-state          gpio63          qup17           1         qup-spi15-cs-gpio-state         gpio63          gpio          qup-uart0-cts-state         gpio0           qup00           1   M      qup-uart0-rts-state         gpio1           qup00           1   N      qup-uart0-tx-state          gpio2           qup00           1   O      qup-uart0-rx-state          gpio3           qup00           1   P      qup-uart1-cts-state         gpio4           qup01           1   T      qup-uart1-rts-state         gpio5           qup01           1   U      qup-uart1-tx-state          gpio6           qup01           1   V      qup-uart1-rx-state          gpio7           qup01           1   W      qup-uart2-cts-state         gpio8           qup02           1   [      qup-uart2-rts-state         gpio9           qup02           1   \      qup-uart2-tx-state          gpio10          qup02           1   ]      qup-uart2-rx-state          gpio11          qup02           1   ^      qup-uart3-cts-state         gpio12          qup03           1   b      qup-uart3-rts-state         gpio13          qup03           1   c      qup-uart3-tx-state          gpio14          qup03           1   d      qup-uart3-rx-state          gpio15          qup03           1   e      qup-uart4-cts-state         gpio16          qup04           1   i      qup-uart4-rts-state         gpio17          qup04           1   j      qup-uart4-tx-state          gpio18          qup04           1   k      qup-uart4-rx-state          gpio19          qup04           1   l      qup-uart5-tx-state          gpio22          qup05           1   p      qup-uart5-rx-state          gpio23          qup05           1   q      qup-uart6-cts-state         gpio24          qup06           1   u      qup-uart6-rts-state         gpio25          qup06           1   v      qup-uart6-tx-state          gpio26          qup06           1   w      qup-uart6-rx-state          gpio27          qup06           1   x      qup-uart7-cts-state         gpio28          qup07           1   |      qup-uart7-rts-state         gpio29          qup07           1   }      qup-uart7-tx-state          gpio30          qup07           1   ~      qup-uart7-rx-state          gpio31          qup07           1         qup-uart8-cts-state         gpio32          qup10           1         qup-uart8-rts-state         gpio33          qup10           1         qup-uart8-tx-state          gpio34          qup10           1         qup-uart8-rx-state          gpio35          qup10           1         qup-uart9-cts-state         gpio36          qup11           1         qup-uart9-rts-state         gpio37          qup11           1         qup-uart9-tx-state          gpio38          qup11           1         qup-uart9-rx-state          gpio39          qup11           1         qup-uart10-cts-state            gpio40          qup12           1         qup-uart10-rts-state            gpio41          qup12           1         qup-uart10-tx-state         gpio42          qup12           1         qup-uart10-rx-state         gpio43          qup12           1         qup-uart11-cts-state            gpio44          qup13           1         qup-uart11-rts-state            gpio45          qup13           1         qup-uart11-tx-state         gpio46          qup13           1         qup-uart11-rx-state         gpio47          qup13           1         qup-uart12-cts-state            gpio48          qup14           1         qup-uart12-rts-state            gpio49          qup14           1         qup-uart12-tx-state         gpio50          qup14           1         qup-uart12-rx-state         gpio51          qup14           1         qup-uart13-cts-state            gpio52          qup15           1         qup-uart13-rts-state            gpio53          qup15           1         qup-uart13-tx-state         gpio54          qup15           1         qup-uart13-rx-state         gpio55          qup15           1         qup-uart14-cts-state            gpio56          qup16           1         qup-uart14-rts-state            gpio57          qup16           1         qup-uart14-tx-state         gpio58          qup16           1         qup-uart14-rx-state         gpio59          qup16           1         qup-uart15-cts-state            gpio60          qup17           1         qup-uart15-rts-state            gpio61          qup17           1         qup-uart15-tx-state         gpio62          qup17           1         qup-uart15-rx-state         gpio63          qup17           1         sdc1-clk-state        	  sdc1_clk            1   9      sdc1-cmd-state        	  sdc1_cmd            1   :      sdc1-data-state       
  sdc1_data           1   ;      sdc1-rclk-state       
  sdc1_rclk           1   <      sdc1-clk-sleep-state          	  sdc1_clk            
                    1   =      sdc1-cmd-sleep-state          	  sdc1_cmd            
                    1   >      sdc1-data-sleep-state         
  sdc1_data           
                    1   ?      sdc1-rclk-sleep-state         
  sdc1_rclk           
                    1   @      sdc2-clk-state        	  sdc2_clk            1        sdc2-cmd-state        	  sdc2_cmd            1        sdc2-data-state       
  sdc2_data           1        sdc2-clk-sleep-state          	  sdc2_clk            
                    1        sdc2-cmd-sleep-state          	  sdc2_cmd            
                    1        sdc2-data-sleep-state         
  sdc2_data           
                    1           sram@146a5000         #   2qcom,sc7280-imem syscon simple-mfd          @    jP       `                                  9        jP   `    pil-reloc@594c           2qcom,pil-reloc-info         @  YL            iommu@15000000        !   2qcom,sc7280-smmu-500 arm,mmu-500            @                      6           C            v              A          `          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                         1   A      interrupt-controller@17a00000            2arm,gic-v3           @                                        	           |            g                                  9        1      msi-controller@17a40000          2arm,gic-v3-its          @                                       	  $disabled             watchdog@17c10000         #   2qcom,apss-wdt-sc7280 qcom,kpss-wdt          @                     W   3                         	  $reserved          timer@17c20000                                   9                         2arm,armv7-timer-mem         @                frame@17c21000                                                  @               frame@17c23000                            	           @0          	  $disabled          frame@17c25000                            
           @P          	  $disabled          frame@17c27000                                       @p          	  $disabled          frame@17c29000                                       @          	  $disabled          frame@17c2b000                                       @°          	  $disabled          frame@17c2d000                                       @          	  $disabled             rsc@18200000             2qcom,rpmh-rsc         0  @                  !             "                 +drv-0 drv-1 drv-2         $                                                                                                l   &   bcm-voter            2qcom,bcm-voter          1   "      power-controller             2qcom,sc7280-rpmhpd                       H        1   7   opp-table            2operating-points-v2         1  H   opp1                     opp2               @        1   .      opp3                       1   /      opp4                       1   0      opp5                     opp6                       1   1      opp7              @      opp8                      1  #      opp9                          clock-controller             2qcom,sc7280-rpmh-clk            W  I        xo          $           1   2      regulators-0             2qcom,pm7325-rpmh-regulators         b             J        !  J        /  J        =  J        K  J        Y  J        g  J        u  J          K          L          M          M          N          K          O          K          N   smps1           )vreg_s1b_1p872          8         P          1  O      smps2           )vreg_s2b_0p876          8         P         1  M      smps7           )vreg_s7b_0p972          8 )        P          1  K      smps8           )vreg_s8b_1p272          8 O        P `        h            1  N      ldo1            )vreg_l1b_0p912          8         P H        h           1        ldo2            )vreg_l2b_3p072          8 )2        P 6        h           1  
      ldo3            )vreg_l3b_0p504          8         P         h         ldo4            )vreg_l4b_0p752          8 y        P          h         ldo5            )reg_l5b_0p752           8 l@        P          h         ldo6            )vreg_l6b_1p2            8 e         P 9        h           1        ldo7            )vreg_l7b_2p952          8 $         P 6        h           1   E      ldo8            )vreg_l8b_0p904          8 Fp        P         h         ldo9            )vreg_l9b_1p2            8 O        P         h         ldo11           )vreg_l11b_1p504         8          P         h         ldo12           )vreg_l12b_0p751         8 u        P         h         ldo13           )vreg_l13b_0p53          8 P        P         h         ldo14           )vreg_l14b_1p08          8 z        P         h         ldo15           )vreg_l15b_0p765         8 H        P `        h         ldo16           )vreg_l16b_1p1           8         P          h         ldo17           )vreg_l17b_1p7           8         P         h         ldo18           )vreg_l18b_1p8           8 w@        P         h         ldo19           )vreg_l19b_1p8           8 w@        P         h                                  1   F         regulators-1             2qcom,pm8350c-rpmh-regulators            c             J        !  J        /  J        =  J        K  J        Y  J        g  J        u  J          J          J          O          O          L          L           K        /  J   smps1           )vreg_s1c_2p19           8 !j        P !      smps2           )vreg_s2c_0p752          8 q        P 5       smps5           )vreg_s5c_0p752          8 h        P       smps7           )vreg_s7c_0p752          8 h        P 5       smps9           )vreg_s9c_1p084          8 iP        P P      ldo1            )vreg_l1c_1p8            8 w@        P 6`        h           1        ldo2            )vreg_l2c_1p62           8          P 6`        h         ldo3            )vreg_l3c_2p8            8 *        P 6         h         ldo4            )vreg_l4c_1p62           8          P 2Z        h         ldo5            )vreg_l5c_1p62           8          P 2Z        h         ldo6            )vreg_l6c_2p96           8 -P        P 6        h         ldo7            )vreg_l7c_3p0            8 -        P 6        h         ldo8            )vreg_l8c_1p62           8          P         h           1  9      ldo9            )vreg_l9c_2p96           8 )2        Pŀ        h         ldo10           )vreg_l10c_0p88          8 
        P         h           1  	      ldo11           )vreg_l11c_2p8           8 *        P 6        h         ldo12           )vreg_l12c_1p65          8 -P        P         h         ldo13           )vreg_l13c_2p7           8 )2        P 6        h         bob         )vreg_bob_3p296          8 -         P <l        1  L            interconnect@18590000         !   2qcom,sc7280-epss-l3 qcom,epss-l3            @    Y                 W   2       8            xo alternate                       1         cpufreq@18591000          +   2qcom,sc7280-cpufreq-epss qcom,cpufreq-epss        0  @    Y            Y             Y0              $                                      $  <dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2         W   2       8            xo alternate            >           $           1            thermal-zones      cpu0-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  Q      trip-point1          s                   Epassive         1  R      cpu-crit                               	   Ecritical             cooling-maps       map0              Q      0                    map1              R      0                          cpu1-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  S      trip-point1          s                   Epassive         1  T      cpu-crit                               	   Ecritical             cooling-maps       map0              S      0                    map1              T      0                          cpu2-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  U      trip-point1          s                   Epassive         1  V      cpu-crit                               	   Ecritical             cooling-maps       map0              U      0                    map1              V      0                          cpu3-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  W      trip-point1          s                   Epassive         1  X      cpu-crit                               	   Ecritical             cooling-maps       map0              W      0                    map1              X      0                          cpu4-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  Y      trip-point1          s                   Epassive         1  Z      cpu-crit                               	   Ecritical             cooling-maps       map0              Y      0               !      map1              Z      0               !            cpu5-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  [      trip-point1          s                   Epassive         1  \      cpu-crit                               	   Ecritical             cooling-maps       map0              [      0               !      map1              \      0               !            cpu6-thermal            Q           g            u  P   	   trips      trip-point0          _                   Epassive         1  ]      trip-point1          s                   Epassive         1  ^      cpu-crit                               	   Ecritical             cooling-maps       map0              ]      0               !      map1              ^      0               !            cpu7-thermal            Q           g            u  P   
   trips      trip-point0          _                   Epassive         1  _      trip-point1          s                   Epassive         1  `      cpu-crit                               	   Ecritical             cooling-maps       map0              _      0               !      map1              `      0               !            cpu8-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  a      trip-point1          s                   Epassive         1  b      cpu-crit                               	   Ecritical             cooling-maps       map0              a      0               !      map1              b      0               !            cpu9-thermal            Q           g            u  P      trips      trip-point0          _                   Epassive         1  c      trip-point1          s                   Epassive         1  d      cpu-crit                               	   Ecritical             cooling-maps       map0              c      0               !      map1              d      0               !            cpu10-thermal           Q           g            u  P      trips      trip-point0          _                   Epassive         1  e      trip-point1          s                   Epassive         1  f      cpu-crit                               	   Ecritical             cooling-maps       map0              e      0               !      map1              f      0               !            cpu11-thermal           Q           g            u  P      trips      trip-point0          _                   Epassive         1  g      trip-point1          s                   Epassive         1  h      cpu-crit                               	   Ecritical             cooling-maps       map0              g      0               !      map1              h      0               !            aoss0-thermal           Q            g            u  P       trips      trip-point0          _                   Ehot       aoss0-crit                             	   Ecritical                aoss1-thermal           Q            g            u  i       trips      trip-point0          _                   Ehot       aoss1-crit                             	   Ecritical                cpuss0-thermal          Q            g            u  P      trips      trip-point0          _                   Ehot       cluster0-crit                              	   Ecritical                cpuss1-thermal          Q            g            u  P      trips      trip-point0          _                   Ehot       cluster0-crit                              	   Ecritical                gpuss0-thermal          Q   d        g            u  i      trips      trip-point0          s                   Epassive         1  j      gpuss0-crit                            	   Ecritical             cooling-maps       map0              j          k            gpuss1-thermal          Q   d        g            u  i      trips      trip-point0          s                   Epassive         1  l      gpuss1-crit                            	   Ecritical             cooling-maps       map0              l          k            nspss0-thermal          Q            g            u  i      trips      trip-point0          _                   Ehot       nspss0-crit                            	   Ecritical                nspss1-thermal          Q            g            u  i      trips      trip-point0          _                   Ehot       nspss1-crit                            	   Ecritical                video-thermal           Q            g            u  i      trips      trip-point0          _                   Ehot       video-crit                             	   Ecritical                ddr-thermal         Q            g            u  i      trips      trip-point0          _                   Ehot       ddr-crit                               	   Ecritical                mdmss0-thermal          Q            g            u  i      trips      trip-point0          _                   Ehot       mdmss0-crit                            	   Ecritical                mdmss1-thermal          Q            g            u  i      trips      trip-point0          _                   Ehot       mdmss1-crit                            	   Ecritical                mdmss2-thermal          Q            g            u  i   	   trips      trip-point0          _                   Ehot       mdmss2-crit                            	   Ecritical                mdmss3-thermal          Q            g            u  i   
   trips      trip-point0          _                   Ehot       mdmss3-crit                            	   Ecritical                camera0-thermal         Q            g            u  i      trips      trip-point0          _                   Ehot       camera0-crit                               	   Ecritical                pm7250b-thermal         Q   d        g            u  m   trips      trip0            s                     Epassive       trip1            8                     Ehot       trip2            6h                  	   Ecritical                pm7325-thermal          Q   d        g            u  n   trips      trip0            s                     Epassive       pm7325-crit          8                  	   Ecritical                pm8350c-thermal         Q   d        g            u  o   trips      trip0            s                     Epassive       pm8350c-crit             8                  	   Ecritical                   timer            2arm,armv8-timer       0                                   
         reboot-mode          2nvmem-reboot-mode             p        
reboot-mode                             backlight            2pwm-backlight             q               E                 r        default         1  ;      regulator-lcd-disp-bias          2regulator-fixed         )lcd_disp_bias           8 S`        P S`          C                          s        default         1  :      gpio-keys         
   2gpio-keys             t        default    key-volume-up         
  dVolume_up           
  D              h   s         	                    
         vph-pwr-regulator            2regulator-fixed         )vph_pwr         8 8u         P 8u         1  J         	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 i2c9 i2c10 i2c11 i2c12 i2c13 i2c14 i2c15 mmc1 mmc2 spi0 spi1 spi2 spi3 spi4 spi5 spi6 spi7 spi8 spi9 spi10 spi11 spi12 spi13 spi14 spi15 serial0 clock-frequency #clock-cells phandle ranges reg no-map device_type clocks enable-method power-domains power-domain-names next-level-cache operating-points-v2 capacity-dmips-mhz dynamic-power-coefficient interconnects qcom,freq-domain #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop opp-shared opp-hz opp-peak-kBps #interconnect-cells qcom,bcm-voters memory-region hwlocks qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells interrupts #power-domain-cells domain-idle-states required-opps dma-ranges clock-names #reset-cells #mbox-cells bits pinctrl-names pinctrl-0 pinctrl-1 status reg-names iommus interrupt-names interconnect-names bus-width supports-cqe dma-coherent qcom,dll-config qcom,ddr-config mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe resets non-removable no-sd no-sdio vmmc-supply vqmmc-supply opp-avg-kBps #dma-cells dma-channels dma-channel-mask dmas dma-names qcom,rproc qcom,smem-states qcom,smem-state-names linux,pci-domain bus-range num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates reset-names phys phy-names iommu-map clock-output-names #phy-cells lanes-per-direction freq-table-hz qcom,ice qcom,ee qcom,controlled-remotely num-channels qcom,num-ees qcom,qmp #hwlock-cells #sound-dai-cells qcom,din-ports qcom,dout-ports qcom,ports-word-length qcom,ports-sinterval-low qcom,ports-offset1 qcom,ports-offset2 qcom,ports-lane-control qcom,ports-block-pack-mode qcom,ports-hstart qcom,ports-hstop qcom,ports-block-group-count gpio-controller #gpio-cells gpio-ranges pins function qcom,gmu nvmem-cells nvmem-cell-names opp-level opp-supported-hw #iommu-cells #global-interrupts firmware-name label remote-endpoint arm,scatter-gather qcom,replicator-loses-context arm,coresight-loses-context-with-cpu qcom,skip-power-up vdda-pll-supply vdda33-supply vdda18-supply vdda-phy-supply snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk maximum-speed usb-role-switch qcom,glink-channels qcom,non-secure-domain wakeup-source snps,parkmode-disable-ss-quirk dr_mode assigned-clock-parents vdda-supply data-lanes reset-gpios vddi-supply avdd-supply avee-supply backlight vdds-supply qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel io-channels io-channel-names #io-channel-cells qcom,pre-scaling qcom,hw-settle-time qcom,ratiometric bias-disable qcom,drive-strength input-disable output-enable power-source input-enable bias-pull-up output-low #pwm-cells color linux,code wakeup-parent gpio-reserved-ranges bias-pull-down bias-bus-hold msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-s7-supply vdd-s8-supply vdd-l1-l4-l12-l15-supply vdd-l2-l7-supply vdd-l3-supply vdd-l5-supply vdd-l6-l9-l10-supply vdd-l8-supply vdd-l11-l17-l18-l19-supply vdd-l13-supply vdd-l14-l16-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes vdd-s9-supply vdd-s10-supply vdd-l1-l12-supply vdd-l2-l8-supply vdd-l3-l4-l5-l7-l13-supply vdd-l6-l9-l11-supply vdd-l10-supply vdd-bob-supply #freq-domain-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device mode-recovery mode-bootloader pwms enable-gpios gpio enable-active-high debounce-interval linux,can-disable 