  "   8     (                                                                                 '   ,Qualcomm Technologies, Inc. SM4450 QRD           2qcom,sm4450-qrd qcom,sm4450    chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I          Y             f          sleep-clk            2fixed-clock          I  }          Y             f            cpus                                 cpu@0            ncpu          2arm,cortex-a55           z                 ~psci                                     psci                         f      l2-cache             2cache                                              f      l3-cache             2cache                                  f               cpu@100          ncpu          2arm,cortex-a55           z                ~psci                                     psci                         f      l2-cache             2cache                                              f            cpu@200          ncpu          2arm,cortex-a55           z                ~psci                                     psci                         f      l2-cache             2cache                                              f            cpu@300          ncpu          2arm,cortex-a55           z                ~psci                                     psci                         f      l2-cache             2cache                                              f            cpu@400          ncpu          2arm,cortex-a55           z                ~psci                                     psci                         f      l2-cache             2cache                                              f            cpu@500          ncpu          2arm,cortex-a55           z                ~psci                	                     psci                         f      l2-cache             2cache                                              f   	         cpu@600          ncpu          2arm,cortex-a78           z                ~psci                
                     psci                         f      l2-cache             2cache                                              f   
         cpu@700          ncpu          2arm,cortex-a78           z                ~psci                                     psci                         f      l2-cache             2cache                                              f            cpu-map    cluster0       core0                     core1                     core2                     core3                     core4                     core5                     core6                     core7                           idle-states          psci       cpu-sleep-0-0            2arm,idle-state           @                                0           A         f         cpu-sleep-1-0            2arm,idle-state           @            X                   0           A         f            domain-idle-states     cluster-sleep-0          2domain-idle-state            A  D                     	        0           f         cluster-sleep-1          2domain-idle-state            A 3D                     
        0  !f         f               memory@a0000000          nmemory           z                     pmu          2arm,armv8-pmuv3         R               psci             2arm,psci-1.0             smc    power-domain-cpu0           ]                        q            f         power-domain-cpu1           ]                        q         power-domain-cpu2           ]                        q         power-domain-cpu3           ]                        q         power-domain-cpu4           ]                        q         power-domain-cpu5           ]                        q         power-domain-cpu6           ]                        q         power-domain-cpu7           ]                        q         power-domain-cpu-cluster0           ]            q               f            reserved-memory                                      cmd-db@80860000          2qcom,cmd-db          z                               soc@0                                                                                                   2simple-bus     clock-controller@100000          2qcom,sm4450-gcc          z            B          Y                      ]                                              f         geniqup@ac0000           2qcom,geni-se-qup             z                                      \      ]        m-ahb s-ahb                                  okay       serial@a88000            2qcom,geni-debug-uart             z            @               V        se          R      c                         default         okay             hwlock@1f40000           2qcom,tcsr-mutex          z                              interrupt-controller@b220000             2qcom,sm4450-pdc qcom,pdc              z    "             @        d      $           ^   ^        }   ?                                             f         pinctrl@f100000          2qcom,sm4450-tlmm             z           0          R                            0                               <                      H           V                f      qup-uart7-rx-state          kgpio23          pqup1_se2_l2         y                     f         qup-uart7-tx-state          kgpio22          pqup1_se2_l2         y                     f            interrupt-controller@17200000            2arm,gic-v3            z                  &                 R      	                                                          f         timer@17420000           2arm,armv7-timer-mem          z    B                                                             frame@17421000           zB    B                         R                          frame@17423000           zB0                       R       	         	  disabled          frame@17425000           zBP                       R       
         	  disabled          frame@17427000           zBp                       R                	  disabled          frame@17429000           zB                       R                	  disabled          frame@1742b000           zB                       R                	  disabled          frame@1742d000           zB                       R                	  disabled             rsc@17a00000             2qcom,rpmh-rsc         0   z                                               drv-0 drv-1 drv-2         $  R                                    	  apps_rsc                                                                            bcm-voter            2qcom,bcm-voter        clock-controller             2qcom,sm4450-rpmh-clk             Y                       xo           f               timer            2arm,armv8-timer       0  R                              
        aliases       $  
/soc@0/geniqup@ac0000/serial@a88000          	interrupt-parent #address-cells #size-cells model compatible stdout-path clock-frequency #clock-cells phandle device_type reg enable-method next-level-cache power-domains power-domain-names #cooling-cells cache-level cache-unified cpu entry-method arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop interrupts #power-domain-cells domain-idle-states ranges no-map dma-ranges #reset-cells clocks clock-names status pinctrl-0 pinctrl-names #hwlock-cells qcom,pdc-ranges #interrupt-cells interrupt-controller gpio-controller #gpio-cells gpio-ranges wakeup-parent gpio-reserved-ranges pins function drive-strength bias-disable #redistributor-regions redistributor-stride frame-number reg-names label qcom,tcs-offset qcom,drv-id qcom,tcs-config serial0 