    8 |   (            8 D                                                                   '   ,Qualcomm Technologies, Inc. SM8550 MTP           2qcom,sm8550-mtp qcom,sm8550          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c  }          s   *      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   )      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s         pcie-1-phy-aux-clk           2fixed-clock          V             c           s   -         cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   "      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   #      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   $         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   %      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   &            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                      interconnect-0           2qcom,sm8550-clk-virt                                    s   3      interconnect-1           2qcom,sm8550-mc-virt                                 s         memory@a0000000          memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                           !        *   "         s         power-domain-cpu1                           !        *   "         s         power-domain-cpu2                           !        *   "         s   
      power-domain-cpu3                           !        *   #         s         power-domain-cpu4                           !        *   #         s         power-domain-cpu5                           !        *   #         s         power-domain-cpu6                           !        *   #         s         power-domain-cpu7                           !        *   $         s         power-domain-cluster                        *   %   &         s   !         reserved-memory                                   =   hyp-region@80000000                                 D      cpusys-vm-region@80a00000                       @           D      hyp-tags-region@80e00000                        =           D      xbl-sc-region@d8100000                                 D      hyp-tags-reserved-region@811d0000                                  D      xbl-dt-log-merged-region@81a00000                       &           D      aop-cmd-db-region@81c60000           2qcom,cmd-db                                D      aop-config-merged-region@81c80000                       @          D      smem@81d00000         
   2qcom,smem                                  K   '            D      adsp-mhi-region@81f00000                                   D      global-sync-region@82600000              `                  D      tz-stat-region@82700000              p                  D      cdsp-secure-heap-region@82800000                       `           D      mpss-region@8a800000                                  D         s         q6-mpss-dtb-region@9b000000                                 D         s         ipa-fw-region@9b080000                                 D      ipa-gsi-region@9b090000              	                  D      gpu-micro-code-region@9b09a000               	                  D         s         spss-region@9b100000                                   D      spu-tz-shared-region@9b280000                (                  D      spu-modem-shared-region@9b2e0000                 .                  D      camera-region@9b300000               0                  D      video-region@9bb00000                       p           D      cvp-region@9c200000                      p           D      cdsp-region@9c900000                                   D         s         q6-cdsp-dtb-region@9e900000                                D         s         q6-adsp-dtb-region@9e980000                                D         s         adspslpi-region@9ea00000                                  D         s         rmtfs-region@d4a80000            2qcom,rmtfs-mem               Ԩ       (           D        S           b         mpss-dsm-region@d4d00000                       0           D         s         tz-reserved-region@d8000000                                 D      cpucp-fw-region@d8140000                                   D      qtee-region@d8300000                 0       P           D      ta-region@d8800000               ؀                 D      tz-tags-region@e1200000                     t           D      hwfence-shbuf-region@e6440000                D       '          D      trust-ui-vm-region@f3600000              `                D      trust-ui-vm-dump-region@f80ee000                                  D      trust-ui-vm-qrt-region@f80ef000                               D      trust-ui-vm-vblk0-ring-region@f80f8000                      @          D      trust-ui-vm-vblk1-ring-region@f80fc000                      @          D      trust-ui-vm-swiotlb-region@f8100000                                D      oem-vm-region@f8400000               @                 D      oem-vm-vblk0-ring-region@fcc00000                        @          D      oem-vm-swiotlb-region@fcc04000               @                 D      hyp-ext-tags-region@fce00000                                  D      hyp-ext-reserved-region@ff700000                 p                  D         smp2p-adsp           2qcom,smp2p          l            v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p          l   ^          v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p          l            v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus          =                                                                                  clock-controller@100000          2qcom,sm8550-gcc                      B          V                               4   {   )   *   +   ,   -   .       .      .      /             s   1      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                                  s   (      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         !                                        L         M         N         O         P         Q         R         S         T         U         V         W           ,           9   >        J   0  6             Q      	  ^disabled             s   6      geniqup@8c0000           2qcom,geni-se-qup                                     =        em-ahb s-ahb          {   1      1           J   0  #             Q                               	  ^disabled       i2c@880000           2qcom,geni-i2c                         @         ese           {   1   o        qdefault            2              u                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6              6                  tx rx         	  ^disabled          spi@880000           2qcom,geni-spi                         @         ese           {   1   o              u           qdefault            7   8      H     3          3          4          5                                   qup-core qup-config qup-memory              6              6                  tx rx                                   	  ^disabled          i2c@884000           2qcom,geni-i2c                 @       @         ese           {   1   q        qdefault            9              G                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@884000           2qcom,geni-spi                 @       @         ese           {   1   q              G           qdefault            :   ;      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled          i2c@888000           2qcom,geni-i2c                        @         ese           {   1   s        qdefault            <              H                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@888000           2qcom,geni-spi                        @         ese           {   1   s              H           qdefault            =   >      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled          i2c@88c000           2qcom,geni-i2c                        @         ese           {   1   u        qdefault            ?              I                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@88c000           2qcom,geni-spi                        @         ese           {   1   u              I           qdefault            @   A      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled          i2c@890000           2qcom,geni-i2c                         @         ese           {   1   w        qdefault            B              J                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@890000           2qcom,geni-spi                         @         ese           {   1   w              J           qdefault            C   D      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled          i2c@894000           2qcom,geni-i2c                 @       @         ese           {   1   y        qdefault            E              K                                   H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@894000           2qcom,geni-spi                 @       @         ese           {   1   y              K           qdefault            F   G      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled          serial@898000            2qcom,geni-uart                       @         ese           {   1   {        qdefault            H   I                       0     3          3          4          5               qup-core qup-config       	  ^disabled          i2c@89c000           2qcom,geni-i2c                        @         ese           {   1   }        qdefault            J                                                 H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx         	  ^disabled          spi@89c000           2qcom,geni-spi                        @         ese           {   1   }                         qdefault            K   L      H     3          3          4          5                                   qup-core qup-config qup-memory              6             6                 tx rx                                   	  ^disabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 es-ahb            {   1   Z                                  =        ^okay       i2c@980000           2qcom,geni-i2c-master-hub                          @         ese core          {   1   F   1   E        qdefault            M                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   1   H   1   E        qdefault            N                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         ese core          {   1   J   1   E        qdefault            O                                                 0     3           3          4          5               qup-core qup-config         ^okay       typec-mux@42             2fcs,fsa4480             B           P                     port       endpoint               Q         s                 i2c@98c000           2qcom,geni-i2c-master-hub                         @         ese core          {   1   L   1   E        qdefault            R                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         ese core          {   1   N   1   E        qdefault            S                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   1   P   1   E        qdefault            T                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         ese core          {   1   R   1   E        qdefault            U                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         ese core          {   1   T   1   E        qdefault            V                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         ese core          {   1   V   1   E        qdefault            W                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   1   X   1   E        qdefault            X                                                 0     3           3          4          5               qup-core qup-config       	  ^disabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         !                                                                                              %         &         '         (         )         *           ,           9           J   0                Q      	  ^disabled             s   [      geniqup@ac0000           2qcom,geni-se-qup                                     =        em-ahb s-ahb          {   1      1           J   0                  3          3             	  qup-core             Q                                 ^okay       i2c@a80000           2qcom,geni-i2c                         @         ese           {   1   ]        qdefault            Y              a                                   H     3          3          4          5          Z                         qup-core qup-config qup-memory              [              [                  tx rx         	  ^disabled          spi@a80000           2qcom,geni-spi                         @         ese           {   1   ]              a           qdefault            \   ]      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [              [                  tx rx                                   	  ^disabled          i2c@a84000           2qcom,geni-i2c                 @       @         ese           {   1   _        qdefault            ^              b                                   H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  ^disabled          spi@a84000           2qcom,geni-spi                 @       @         ese           {   1   _              b           qdefault            _   `      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          i2c@a88000           2qcom,geni-i2c                        @         ese           {   1   a        qdefault            a              c                                   H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  ^disabled          spi@a88000           2qcom,geni-spi                        @         ese           {   1   a              c           qdefault            b   c      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          i2c@a8c000           2qcom,geni-i2c                        @         ese           {   1   c        qdefault            d              d                                   H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  ^disabled          spi@a8c000           2qcom,geni-spi                        @         ese           {   1   c              d           qdefault            e   f      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          i2c@a90000           2qcom,geni-i2c                         @         ese           {   1   e        qdefault            g              e                                   H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  ^disabled          spi@a90000           2qcom,geni-spi                         @         ese           {   1   e              e           qdefault            h   i      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          i2c@a94000           2qcom,geni-i2c                 @       @         ese           {   1   g        qdefault            j              f         H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          spi@a94000           2qcom,geni-spi                 @       @         ese           {   1   g              f           qdefault            k   l      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          i2c@a98000           2qcom,geni-i2c                        @         ese           {   1   i        qdefault            m              k         H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          spi@a98000           2qcom,geni-spi                        @         ese           {   1   i              k           qdefault            n   o      H     3          3          4          5          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  ^disabled          serial@a9c000            2qcom,geni-debug-uart                         @         ese           {   1   k        qdefault            p              C           qup-core qup-config       0     3          3          4          5               ^okay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s   r      interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   5      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   1       1   
                     s   q      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   1      1                        s   Z      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  =               `                 `0      `0                                Q                    
         `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                    $                       7                                                                                                                                                      8   {   1   "   1   $   1   %   1   *   1   +   1      1          =  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     q                    4          r               pcie-mem cpu-pcie            E       s            s              M       0            0             W   1           ^pci             1            j   +        opciephy         ^okay            y   t   `               t   ^           qdefault            u   pcie@0           pci                                                                              =         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   1   "   1   $          1   &   1   (        eaux cfg_ahb ref rchng pipe          W   1           ^phy            1   &                     1            V            pcie0_pipe_clk                      ^okay               v           w         s   +      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  =               @                 @0      @0                                Q                   
         `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                    $                       7                                                                                                                                                  @   {   1   ,   1   .   1   /   1   6   1   7   1      1       1         I  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               1   ,        $       0     q                    4          r   	            pcie-mem cpu-pcie            E       s           s              M       0           0             W   1      1   	        ^pci link_down               1           j   ,        opciephy         ^okay            y   t   c               t   a           qdefault            x   pcie@0           pci                                                                              =         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   1   0   1   .         1   2   1   4        eaux cfg_ahb ref rchng pipe          W   1      1   
        ^phy phy_nocsr              1   2                     1            V            pcie1_pipe_clk                      ^okay               y           w           v         s   ,      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                !                                J   0         0               s   z      crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `            z      z           rx tx           J   0         0                                          memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          1                 eref ref_aux qref                1           W   {            ^ufsphy           V                       ^okay               |           w         s   .      ufs@1d84000       +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	           j   .        oufsphy          %                      W   1           ^rst             1           9   }        J   0   `             Q        G   ~      0     Z                    4          5   #            ufs-ddr cpu-ufs       n  ecore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   1      1      1      1            1      1      1           [           ^okay            d   t                         p                      O                    s   {   opp-table            2operating-points-v2          s   ~   opp-75000000          @      xh                    xh                                        9         opp-150000000         @      р                    р                                        9         opp-300000000         @                                                                    9   }            crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                 {   1            s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   '      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V                       s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           J                             G                      %           ^okay             s      zap-shader                     qcom/sm8550/a740_zap.mbn          opp-table            2operating-points-v2          s      opp-680000000               (                  opp-615000000               $'                 opp-550000000                U                 opp-475000000               O           P      opp-401000000               @           @      opp-348000000                           <      opp-295000000               W           8      opp-220000000                           4            gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           hfi gmu       8   {                      1      1                      !  eahb gmu cxo axi memnoc hub demet                                   cx gx           J                             G            s      opp-table            2operating-points-v2          s      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   )   1      1            V                                  s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                  8                                                                                                                                      >         ?         @         A                                                                                     {         1       1   !               ehlos bus iface ahb                           Q         s         ipa@3f40000          2qcom,sm8550-ipa         J   0         0            0                            P     @               ipa-reg ipa-shared gsi        8  v                                                 (  ipa gsi ipa-clock-query ipa-setup-ready          {              ecore          0                         4          5               memory config                                         *  ,ipa-clock-enabled-valid ipa-clock-enabled         	  ^disabled          remoteproc@4080000           2qcom,sm8550-mpss-pas                         @@      L  v                                                                0  wdog fatal ready handover stop-ack shutdown-ack          {               exo                                 cx mss                                                                                  ,stop            ^okay          0  qcom/sm8550/modem.mbn qcom/sm8550/modem_dtb.mbn    glink-edge          v   (                     (               Bmpss                        codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              emclk macro dcodec fsgen          V          
  wsa2-mclk           H            s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    {           eiface           BWSA2                       qdefault         Y           h   	        x   ?   ?                                                                                                     %                                     H         	  ^disabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              emclk macro dcodec fsgen          V            mclk            H            s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    {           eiface           BRX                     qdefault         Y           h           x  ?                                                                                       %                                       H           ^okay             s     codec@0,4            2sdw20217010d00                          =                        s           codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              emclk macro dcodec fsgen          V            mclk            H            s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              emclk macro dcodec fsgen          V            mclk            H            s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    {           eiface           BWSA                    qdefault         Y           h   	        x   ?   ?                                                                                                     %                                     H           ^okay             s     speaker@0,0          2sdw20217020400                           qdefault                    R                 H          	  bSpkrLeft            t                       s        speaker@0,1          2sdw20217020400                          qdefault                    R                 H          
  bSpkrRight           t                       s           soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           core wakeup          {           eiface           BTX                     qdefault         Y           h                                                                                  %                                    H           ^okay             s     codec@0,3            2sdw20217010d00                                               s           codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           emclk macro dcodec            V            fsgen           H            s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                                                            {      f         g           ecore audio           s      tx-swr-active-state          s      clk-pins            gpio0           swr_tx_clk                                       data-pins           gpio1 gpio2 gpio14          swr_tx_data                                         rx-swr-active-state          s      clk-pins            gpio3           swr_rx_clk                                       data-pins           gpio4 gpio5         swr_rx_data                                         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk                       )      data-pins           gpio7           dmic1_data                      5         dmic23-default-state       clk-pins            gpio8         
  dmic2_clk                       )      data-pins           gpio9           dmic2_data                      5         wsa-swr-active-state             s      clk-pins            gpio10          wsa_swr_clk                                      data-pins           gpio11          wsa_swr_data                                            wsa2-swr-active-state            s      clk-pins            gpio15          wsa2_swr_clk                                         data-pins           gpio16          wsa2_swr_data                                           spkr-1-sd-n-active-state            gpio17          gpio                                 B         s         spkr-2-sd-n-active-state            gpio18          gpio                                 B         s            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq           {   1      1                  eiface core xo           J   0  @            M d,        ]h                        G         0                         4          5               sdhc-ddr cpu-sdhc           m            Q        w               ^okay                             qdefault sleep                                                                          opp-table            2operating-points-v2          s      opp-19200000                $         9         opp-50000000                        9         opp-100000000                        9         opp-202000000               
F        9               clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   )   1                          9            V                               clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   1      )      *                       9            V                               display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                   S                                 {         1      1         =        W                             0               4                                    mdp0-mem mdp1-mem           J   0                                        =        ^okay             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
               	  mdp vbif                                   0   {   1      1               @      =      I      !  ebus nrt_bus iface lut core vsync                                 I        $         G      ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s               opp-table            2operating-points-v2          s      opp-200000000                        9         opp-325000000               _@        9         opp-375000000               Z        9         opp-514000000                       9   }            displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                      (   {                                    ;  ecore_iface core_aux ctrl_link ctrl_link_iface stream_pixel                                 /      /           j   /           odp          H            G                          ^okay       ports                                port@0                  endpoint                        s            port@1                 endpoint                                       s               opp-table            2operating-points-v2          s      opp-162000000               	        9         opp-270000000               ߀        9         opp-540000000                /         9         opp-810000000               0G        9   }            dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                  0   {                  B      8         1         $  ebyte byte_intf pixel core iface bus                                    C                             G           j           odsi                                   ^okay               w   ports                                port@0                  endpoint                        s            port@1                 endpoint                                             s               opp-table            2operating-points-v2          s      opp-187500000               -        9         opp-300000000                        9         opp-358000000               V        9            panel@0          2visionox,vtdr6130                        qdefault sleep                                                             	           d   t         port       endpoint                        s                  phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                       ^okay            	   v         s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                  0   {                  D      :         1         $  ebyte byte_intf pixel core iface bus                              	      E                             G           j           odsi                                 	  ^disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                     	  ^disabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   )      1      *                             /      /                                                  9            V                                  s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T                     {              eref         W   1           ^okay            	   v        	   w        j            s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   1             1      1           eaux ref com_aux usb3_pipe               1           W   1      1           ^phy common           V                      ^okay               w                             s   /   ports                                port@0                  endpoint                        s           port@1                 endpoint                        s            port@2                 endpoint                        s                  usb@a6f8800          2qcom,sm8550-dwc3 qcom,dwc3               
o                                          =      0   {   1      1      1      1      1               &  ecfg_noc core iface sleep mock_utmi xo              1      1           $        D  v                                                           <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             1           9   }        W   1         0     Z                    4          5   $            usb-ddr apps-usb            ^okay       usb@a600000       
   2snps,dwc3                
`                                   J   0   @            j      /            ousb2-phy usb3-phy           	-             	A         	^         	w         	         	         	         	         	         
         
         Q        
'otg          
/   ports                                port@0                  endpoint                        s           port@1                 endpoint                        s                     interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  
?         ^   ^  a      }   ?      ~                                                        s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                 
O                                     uplow critical          
]            s         thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                
O                                     uplow critical          
]            s         thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                
O                                     uplow critical          
]            s         power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      (        v   (                      (                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         periph_irq          v                             
s            
                                                     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
]             s            pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
]             s            pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                                    s      sdc2-card-det-state         gpio12          normal           5         
         
        
            s            led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  ^disabled          pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
         	  ^disabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                                                                                       s         phy@fd00             2qcom,pm8550b-eusb2-repeater                                 
           
            s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                                      s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              
   t      	  ^disabled          resin            2qcom,pmk8350-resin                             	  ^disabled             rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b            nvram@7100           2qcom,spmi-sdam             q                                  =      q       reboot-reason@48                H           
               s           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                                       s            pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                 temp-alarm@a00           2qcom,spmi-temp-alarm               
            
   
               
]             s         gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                                                                                       s            pmic@b           2qcom,pmr735d qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
]             s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                                                                                       s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                                                       t                   
           
                s   t   hub-i2c0-data-clk-state         gpio16 gpio17           i2chub0_se0                     
         s   M      hub-i2c1-data-clk-state         gpio18 gpio19           i2chub0_se1                     
         s   N      hub-i2c2-data-clk-state         gpio20 gpio21           i2chub0_se2                     
         s   O      hub-i2c3-data-clk-state         gpio22 gpio23           i2chub0_se3                     
         s   R      hub-i2c4-data-clk-state         gpio4 gpio5         i2chub0_se4                     
         s   S      hub-i2c5-data-clk-state         gpio6 gpio7         i2chub0_se5                     
         s   T      hub-i2c6-data-clk-state         gpio8 gpio9         i2chub0_se6                     
         s   U      hub-i2c7-data-clk-state         gpio10 gpio11           i2chub0_se7                     
         s   V      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8                     
         s   W      hub-i2c9-data-clk-state         gpio84 gpio85           i2chub0_se9                     
         s   X      pcie0-default-state          s   u   perst-pins          gpio94          gpio                              clkreq-pins         gpio95          pcie0_clk_req_n                     
      wake-pins           gpio96          gpio                        
         pcie1-default-state          s   x   perst-pins          gpio97          gpio                              clkreq-pins         gpio98          pcie1_clk_req_n                     
      wake-pins           gpio99          gpio                        
         qup-i2c0-data-clk-state         gpio28 gpio29         	  qup1_se0                       
           s   Y      qup-i2c1-data-clk-state         gpio32 gpio33         	  qup1_se1                       
           s   ^      qup-i2c2-data-clk-state         gpio36 gpio37         	  qup1_se2                       
           s   a      qup-i2c3-data-clk-state         gpio40 gpio41         	  qup1_se3                       
           s   d      qup-i2c4-data-clk-state         gpio44 gpio45         	  qup1_se4                       
           s   g      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5                       
           s   j      qup-i2c6-data-clk-state         gpio48 gpio49         	  qup1_se6                       
           s   m      qup-i2c8-data-clk-state          s   2   scl-pins            gpio57          qup2_se0_l1_mira                       
        sda-pins            gpio56          qup2_se0_l0_mira                       
           qup-i2c9-data-clk-state         gpio60 gpio61         	  qup2_se1                       
           s   9      qup-i2c10-data-clk-state            gpio64 gpio65         	  qup2_se2                       
           s   <      qup-i2c11-data-clk-state            gpio68 gpio69         	  qup2_se3                       
           s   ?      qup-i2c12-data-clk-state            gpio2 gpio3       	  qup2_se4                       
           s   B      qup-i2c13-data-clk-state            gpio80 gpio81         	  qup2_se5                       
           s   E      qup-i2c15-data-clk-state            gpio72 gpio106        	  qup2_se7                       
           s   J      qup-spi0-cs-state           gpio31        	  qup1_se0                                 s   ]      qup-spi0-data-clk-state         gpio28 gpio29 gpio30          	  qup1_se0                                 s   \      qup-spi1-cs-state           gpio35        	  qup1_se1                                 s   `      qup-spi1-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se1                                 s   _      qup-spi2-cs-state           gpio39        	  qup1_se2                                 s   c      qup-spi2-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se2                                 s   b      qup-spi3-cs-state           gpio43        	  qup1_se3                                 s   f      qup-spi3-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se3                                 s   e      qup-spi4-cs-state           gpio47        	  qup1_se4                                 s   i      qup-spi4-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se4                                 s   h      qup-spi5-cs-state           gpio55        	  qup1_se5                                 s   l      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5                                 s   k      qup-spi6-cs-state           gpio51        	  qup1_se6                                 s   o      qup-spi6-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se6                                 s   n      qup-spi8-cs-state           gpio59          qup2_se0_l3_mira                                 s   8      qup-spi8-data-clk-state         gpio56 gpio57 gpio58            qup2_se0_l2_mira                                 s   7      qup-spi9-cs-state           gpio63        	  qup2_se1                                 s   ;      qup-spi9-data-clk-state         gpio60 gpio61 gpio62          	  qup2_se1                                 s   :      qup-spi10-cs-state          gpio67        	  qup2_se2                                 s   >      qup-spi10-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se2                                 s   =      qup-spi11-cs-state          gpio71        	  qup2_se3                                 s   A      qup-spi11-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se3                                 s   @      qup-spi12-cs-state          gpio119       	  qup2_se4                                 s   D      qup-spi12-data-clk-state            gpio2 gpio3 gpio118       	  qup2_se4                                 s   C      qup-spi13-cs-state          gpio83        	  qup2_se5                                 s   G      qup-spi13-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se5                                 s   F      qup-spi15-cs-state          gpio75        	  qup2_se7                                 s   L      qup-spi15-data-clk-state            gpio72 gpio106 gpio74         	  qup2_se7                                 s   K      qup-uart7-default-state         gpio26 gpio27         	  qup1_se7                                 s   p      qup-uart14-default-state            gpio78 gpio79         	  qup2_se6                        
         s   H      qup-uart14-cts-rts-state            gpio76 gpio77         	  qup2_se6                                 s   I      sdc2-sleep-state             s      clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             
                 data-pins         
  sdc2_data            
                    sdc2-default-state           s      clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             
           
      data-pins         
  sdc2_data            
           
         sde-dsi-active-state            gpio133         gpio                                 s         sde-dsi-suspend-state           gpio133         gpio                                 s         sde-te-active-state         gpio86        
  mdp_vsync                                s         sde-te-suspend-state            gpio86        
  mdp_vsync                                s         wcd-reset-n-active-state            gpio108         gpio                                 B         s           iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                                             A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   Q         s   0      interrupt-controller@17100000            2arm,gic-v3                                                =                                       2                     	                                     s      msi-controller@17140000          2arm,gic-v3-its                                 G        V            s   s         timer@17420000           2arm,armv7-timer-mem              B                 =                                            frame@17421000           B    B             a                                      frame@17423000           B0            a                  	         	  ^disabled          frame@17425000           BP            a                  
         	  ^disabled          frame@17427000           Bp            a                           	  ^disabled          frame@17429000           B            a                           	  ^disabled          frame@1742b000           B            a                           	  ^disabled          frame@1742d000           B            a                           	  ^disabled             rsc@17a00000          	  Bapps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       $                                        n           ~                                                  !   bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           exo           {            s         power-controller             2qcom,sm8550-rpmhpd                     G            s      opp-table            2operating-points-v2          s      opp-16                   opp-48             0         s         opp-52             4      opp-56             8         s         opp-60             <      opp-64             @         s         opp-80             P      opp-128                     s         opp-144                  opp-192                     s         opp-256                     s   }      opp-320           @      opp-336           P      opp-384                 opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         b                                               P                       P           P        #   P        4           C           R           a      bob1          
  pvreg_bob1            2K          <l                    s   P      bob2          
  pvreg_bob2            )          <l                    s         ldo1            pvreg_l1b_1p8             w@         w@                 ldo2            pvreg_l2b_3p0             -          -                  ldo5            pvreg_l5b_3p1             /]          /]                     s         ldo6            pvreg_l6b_1p8             w@         -                  ldo7            pvreg_l7b_1p8             w@         -                  ldo8            pvreg_l8b_1p8             w@         -                     s         ldo9            pvreg_l9b_2p9             -*         -                     s         ldo11           pvreg_l11b_1p2            O                              s         ldo12           pvreg_l12b_1p8            w@         w@                    s         ldo13           pvreg_l13b_3p0            -         -                    s         ldo14           pvreg_l14b_3p2            0          0                  ldo15           pvreg_l15b_1p8            w@         w@                    s         ldo16           pvreg_l16b_2p8            *         *                 ldo17           pvreg_l17b_2p5            &5@         &5@                    s            regulators-1             2qcom,pm8550vs-rpmh-regulators           c                 ldo3            pvreg_l3c_0p9             m                             s   y         regulators-2             2qcom,pm8550vs-rpmh-regulators           d                 ldo1            pvreg_l1d_0p88            m         	                    s   |         regulators-3             2qcom,pm8550vs-rpmh-regulators           e                                                             smps4           pvreg_s4e_0p9             @                             s         smps5           pvreg_s5e_1p1             z                           ldo1            pvreg_l1e_0p88            m         m                    s   v      ldo2            pvreg_l2e_0p9             @                          ldo3            pvreg_l3e_1p2             O         O                    s   w         regulators-4             2qcom,pm8550ve-rpmh-regulators           f                                                  smps4           pvreg_s4f_0p5                       
`                 ldo1            pvreg_l1f_0p9                                       ldo2            pvreg_l2f_0p88            m                          ldo3            pvreg_l3f_0p91            m                             s            regulators-5             2qcom,pm8550vs-rpmh-regulators           g                                                                                                   (      smps1           pvreg_s1g_1p2             O                           smps2           pvreg_s2g_0p8             5          B@                 smps3           pvreg_s3g_0p7                      Q                 smps4           pvreg_s4g_1p3             O         @                    s         smps5           pvreg_s5g_0p8                       Q                 smps6           pvreg_s6g_1p8             w@                             s         ldo1            pvreg_l1g_1p2             O         O                    s         ldo2            pvreg_l2g_1p2             O         O                 ldo3            pvreg_l3g_1p2             O         O                    s            regulators-6             2qcom,pm8010-rpmh-regulators         m           6           G           X           f           t   P   ldo1            pvreg_l1m_1p056                                       ldo2            pvreg_l2m_1p056                                       ldo3            pvreg_l3m_2p8             *         *                 ldo4            pvreg_l4m_2p8             *         *                 ldo5            pvreg_l5m_1p8             w@         w@                 ldo6            pvreg_l6m_1p8             w@         w@                 ldo7            pvreg_l7m_2p9             *         ,O                    regulators-7             2qcom,pm8010-rpmh-regulators         n           6           G           X           f   P        t   P   ldo1            pvreg_l1n_1p1             ؀         O                 ldo2            pvreg_l2n_1p1             ؀         O                 ldo3            pvreg_l3n_2p8             *         -                 ldo4            pvreg_l4n_2p8             *         2Z                 ldo5            pvreg_l5n_1p8             w@         w@                 ldo6            pvreg_l6n_3p3             *         2j@                 ldo7            pvreg_l7n_2p96            *         -*                       cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           {   )   1           exo alternate          $                                      $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                      G      opp-table            2operating-points-v2          s      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                      E              4         4              G      opp-table            2operating-points-v2          s      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   4      system-cache-controller@25000000             2qcom,sm8550-llcc          P       %               %               %@              %`              %                @  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base               
         remoteproc@30000000          2qcom,sm8550-adsp-pas                 0                <  v                                                    #  wdog fatal ready handover stop-ack           {               exo                                lcx lmx                                                                              ,stop            ^okay          .  qcom/sm8550/adsp.mbn qcom/sm8550/adsp_dtb.mbn      glink-edge          v   (                     (               Blpass                 fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           Badsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                     J   0        0  c             Q      compute-cb@4             2qcom,fastrpc-compute-cb                     J   0        0  d             Q      compute-cb@5             2qcom,fastrpc-compute-cb                     J   0        0  e             Q      compute-cb@6             2qcom,fastrpc-compute-cb                     J   0        0  f             Q      compute-cb@7             2qcom,fastrpc-compute-cb                     J   0        0  g             Q         gpr       	   2qcom,gpr          
  adsp_apps                                                         service@1            2qcom,q6apm                      H            avs/audio msm/adsp/audio_pd          s     dais             2qcom,q6apm-dais         J   0        0  a          bedais           2qcom,q6apm-lpass-dais           H            s  	         service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s                     interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20      @        @  v         B                                              #  wdog fatal ready handover stop-ack           {               exo                        
               cx mxc nsp                                                                               ,stop            ^okay          .  qcom/sm8550/cdsp.mbn qcom/sm8550/cdsp_dtb.mbn      glink-edge          v   (                     (               Bcdsp                  fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           Bcdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                   $  J   0  a       0         0              Q      compute-cb@2             2qcom,fastrpc-compute-cb                   $  J   0  b       0         0              Q      compute-cb@3             2qcom,fastrpc-compute-cb                   $  J   0  c       0         0              Q      compute-cb@4             2qcom,fastrpc-compute-cb                   $  J   0  d       0         0              Q      compute-cb@5             2qcom,fastrpc-compute-cb                   $  J   0  e       0         0              Q      compute-cb@6             2qcom,fastrpc-compute-cb                   $  J   0  f       0         0              Q      compute-cb@7             2qcom,fastrpc-compute-cb                   $  J   0  g       0         0              Q      compute-cb@8             2qcom,fastrpc-compute-cb                   $  J   0  h       0         0              Q                  thermal-zones      aoss0-thermal                                   "          trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpuss0-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpuss1-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpuss2-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpuss3-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpu3-top-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu3-bottom-thermal                                 "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu4-top-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu4-bottom-thermal                                 "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu5-top-thermal                                    "      	   trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu5-bottom-thermal                                 "      
   trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu6-top-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu6-bottom-thermal                                 "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu7-top-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu7-middle-thermal                                 "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu7-bottom-thermal                                 "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                aoss1-thermal                                   "          trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             cpu0-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu1-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cpu2-thermal                                    "         trips      trip-point0         2 _        >           Epassive       trip-point1         2 s        >           Epassive       cpu-critical            2         >        	   Ecritical                cdsp0-thermal              
                    "         trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive             cdsp1-thermal              
                    "         trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive             cdsp2-thermal              
                    "         trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive             cdsp3-thermal              
                    "         trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive             video-thermal                                   "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             mem-thermal            
                    "      	   trips      thermal-engine-config           2 H        >           Epassive       ddr0-config         2 _        >           Epassive       reset-mon-config            2 8        >           Epassive             modem0-thermal                                  "      
   trips      thermal-engine-config           2 H        >           Epassive       mdmss0-config0          2 p        >           Epassive       mdmss0-config1          2 (        >           Epassive       reset-mon-config            2 8        >           Epassive             modem1-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       mdmss1-config0          2 p        >           Epassive       mdmss1-config1          2 (        >           Epassive       reset-mon-config            2 8        >           Epassive             modem2-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       mdmss2-config0          2 p        >           Epassive       mdmss2-config1          2 (        >           Epassive       reset-mon-config            2 8        >           Epassive             modem3-thermal                                  "         trips      thermal-engine-config           2 H        >           Epassive       mdmss3-config0          2 p        >           Epassive       mdmss3-config1          2 (        >           Epassive       reset-mon-config            2 8        >           Epassive             camera0-thermal                                 "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             camera1-thermal                                 "         trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             aoss2-thermal                                   "          trips      thermal-engine-config           2 H        >           Epassive       reset-mon-config            2 8        >           Epassive             gpuss-0-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-1-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-2-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-3-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-4-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-5-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-6-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               gpuss-7-thermal            
                    "         cooling-maps       map0            I           N            trips      thermal-engine-config           2 H        >           Epassive       thermal-hal-config          2 H        >           Epassive       reset-mon-config            2 8        >           Epassive       junction-config         2 s        >           Epassive          s               pm8010-m-thermal               d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8010-n-thermal               d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550-thermal             d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550b-thermal            d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550ve-thermal               d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550vs-c-thermal             d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550vs-d-thermal             d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550vs-e-thermal             d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pm8550vs-g-thermal             d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pmr735d-k-thermal              d                    "      trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot             pmr735d-l-thermal              d                    "     trips      trip0           2 s        >             Epassive       trip1           2 8        >             Ehot                timer            2arm,armv8-timer       0                                
        reboot-mode          2nvmem-reboot-mode           ]          ireboot-mode         z                    aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       audio-codec          2qcom,wcd9385-codec          qdefault                    w@         w@         w@         w@           $ I                   '         N  P        w                    d   t   l                                               P        H            s  
      pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink                                       t          connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                       s            port@1                 endpoint                       s            port@2                 endpoint                       s   Q                  sound         (   2qcom,sm8550-sndcard qcom,sm8450-sndcard          ,SM8550-MTP         SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC3 MIC BIAS3 AMIC4 MIC BIAS3 AMIC5 MIC BIAS4 VA DMIC0 MIC BIAS1 VA DMIC1 MIC BIAS1 VA DMIC2 MIC BIAS3 TX DMIC0 MIC BIAS1 TX DMIC1 MIC BIAS2 TX DMIC2 MIC BIAS3 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT0 ADC3_OUTPUT TX SWR_INPUT1 ADC4_OUTPUT       wcd-playback-dai-link           WCD Playback       cpu           	   q      codec             
                       platform                       wcd-capture-dai-link            WCD Capture    cpu           	   x      codec             
                      platform                       wsa-dai-link            WSA Playback       cpu           	   i      codec                                  platform                       va-dai-link         VA Capture     cpu           	   x      codec                        platform                          vph-pwr-regulator            2regulator-fixed         pvph_pwr          8u          8u                   &         s            	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names vcc-supply mode-switch orientation-switch remote-endpoint reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,controlled-remotely lanes-per-direction required-opps operating-points-v2 qcom,ice reset-gpios vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply opp-hz #hwlock-cells qcom,gmu memory-region firmware-name opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label #sound-dai-cells qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width sdhci-caps-mask cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc assigned-clock-parents data-lanes vdda-supply vddio-supply vci-supply vdd-supply vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize dr_mode usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id output-disable bias-pull-up power-source #pwm-cells vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-supply vdd-l2-supply vdd-s4-supply vdd-s5-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells opp-peak-kBps qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents qcom,protection-domain polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply orientation-gpios power-role data-role audio-routing link-name sound-dai regulator-always-on regulator-boot-on 