  2   8  d   (              ,                                                                      ,qnap,ts433 rockchip,rk3568            7Qnap TS-433-4G NAS System 4-Bay    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       %           2   @        D           Q           ^   @        p           }              	      cpu@100          cpu          ,arm,cortex-a55                                      psci                       %           2   @        D           Q           ^   @        p           }              
      cpu@200          cpu          ,arm,cortex-a55                                      psci                       %           2   @        D           Q           ^   @        p           }                    cpu@300          cpu          ,arm,cortex-a55                                      psci                       %           2   @        D           Q           ^   @        p           }                       l3-cache             ,cache                               '           4   @        F                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0      opp-1992000000              v          0 0 0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                                                      protocol@14                                               opp-table-1          ,operating-points-v2            <   opp-200000000                               opp-300000000                               opp-400000000               ׄ                opp-600000000               #F                opp-700000000               )'                opp-800000000               /          B@         hdmi-sound           ,simple-audio-card           HDMI            (i2s         A         	  [disabled       simple-audio-card,codec         b         simple-audio-card,cpu           b            pmu          ,arm,cortex-a55-pmu        0  l                                                w   	   
            psci             ,arm,psci-1.0            
smc       timer            ,arm,armv8-timer       0  l                                 
                  xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sram@10f000       
   ,mmio-sram                                                                          sram@0           ,arm,scmi-shmem                                      sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          l       _                       	  sata-phy                                   	  [disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          l       `                       	  sata-phy                                   	  [disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          l                                             ref_clk suspend_clk bus_clk         otg       
  &utmi_wide                         /               6      	  [disabled                             usb2-phy usb3-phy         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          l                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  &utmi_wide                         /               6      	  [disabled          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 l      	            O        d           u    A            (                             usb@fd800000             ,generic-ehci                                  l                                                        usb       	  [disabled          usb@fd840000             ,generic-ohci                                  l                                                        usb       	  [disabled          usb@fd880000             ,generic-ehci                                  l                                                        usb       	  [disabled          usb@fd8c0000             ,generic-ohci                                  l                                                        usb       	  [disabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     H   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain         	  [disabled             syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                                             G                                            i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               l       .                        -      	  i2c pclk                       default                                 	  [disabled       pmic@20          ,rockchip,rk809                                    l               serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 l       t                        ,        baudclk apb_pclk                                            default                             	  [disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk                       default                  	  [disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk                       default                  	  [disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk                        default                  	  [disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               !        default                  	  [disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller                                                       power-domain@7                                           *   "                  power-domain@8                                           *   #   $   %                  power-domain@9              	                                   *   &   '   (                  power-domain@10             
                             *   )   *   +   ,   -   .                  power-domain@11                                    *   /                  power-domain@13                                   *   0                  power-domain@14                                   *   1   2   3                  power-domain@15                                     *   4   5   6   7   8   9   :   ;                        gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  l       (          )          '           1job mmu gpu                              gpu bus                        <                    	  [disabled                     video-codec@fdea0400             ,rockchip,rk3568-vpu                               l                  1vdpu                               
  aclk hclk           A   =                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        l                  aclk iface                                             H               =      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              l       Z                                      aclk hclk sclk          /     &     $     %        Ucore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  l       @                              
  aclk hclk           A   >              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        l       ?                                aclk iface                
        H               >      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         l       d                                           biu ciu ciu-drive ciu-sample            a           lр        /              Ureset         	  [disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 l                             1macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          /            
  Ustmmaceth                      z   ?                    @           A               	  [disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                     ?      rx-queues-config                          @   queue0           tx-queues-config            
              A   queue0              vop@fe040000                          0     @                 vop gamma-lut           l                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            A   B              	                 	  [disabled             ,rockchip,rk3568-vop    ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                l                                       aclk iface          H                  	      	  [disabled               B      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 l       D           pclk                           dphy               C              	        Uapb         /                      	  [disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 l       E           pclk                           dphy               D              	        Uapb         /                      	  [disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 l       -         (                          (              iahb isfr cec ref           default            E   F   G              	                              *          	  [disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   "      qos@fe138080             ,rockchip,rk3568-qos syscon                                  1      qos@fe138100             ,rockchip,rk3568-qos syscon                                   2      qos@fe138180             ,rockchip,rk3568-qos syscon                                  3      qos@fe148000             ,rockchip,rk3568-qos syscon                                   #      qos@fe148080             ,rockchip,rk3568-qos syscon                                  $      qos@fe148100             ,rockchip,rk3568-qos syscon                                   %      qos@fe150000             ,rockchip,rk3568-qos syscon                                    /      qos@fe158000             ,rockchip,rk3568-qos syscon                                   )      qos@fe158100             ,rockchip,rk3568-qos syscon                                   *      qos@fe158180             ,rockchip,rk3568-qos syscon                                  +      qos@fe158200             ,rockchip,rk3568-qos syscon                                   ,      qos@fe158280             ,rockchip,rk3568-qos syscon                                  -      qos@fe158300             ,rockchip,rk3568-qos syscon                                   .      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    4      qos@fe190280             ,rockchip,rk3568-qos syscon                                  8      qos@fe190300             ,rockchip,rk3568-qos syscon                                   9      qos@fe190380             ,rockchip,rk3568-qos syscon                                  :      qos@fe190400             ,rockchip,rk3568-qos syscon                                   ;      qos@fe198000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   &      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  '      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   (      dfi@fe230000             ,rockchip,rk3568-dfi              #                 l                  ;   H      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                                dbi apb config        <  l       K          J          I          H          G           1sys pmc msg legacy err          H             (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         d           R                     `  e                  I                      I                     I                     I           s                                                                                          	  pcie-phy                        T                                                      @              @           /              Upipe                                   	  [disabled       legacy-interrupt-controller                      d            O                     l       H              I         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         l       b                                           biu ciu ciu-drive ciu-sample            a           lр        /              Ureset         	  [disabled          mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         l       c                                           biu ciu ciu-drive ciu-sample            a           lр        /              Ureset         	  [disabled          spi@fe300000             ,rockchip,sfc                 0        @         l       e                  x      v        clk_sfc hclk_sfc               J        default       	  [disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 l                        {      }         n6       (         |      z      y      {      }        core bus axi block timer            [okay                       l                i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 l       4                 =      A        Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               K            tx          /      P      Q      
  Utx-m rx-m                      *          	  [disabled                     i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 l       5                 E      I        Fq Fq                G      K      :        mclk_tx mclk_rx hclk               K      K           rx tx           /      R      S      
  Utx-m rx-m                      default       0     L   M   N   O   P   Q   R   S   T   U   V   W        *          	  [disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 l       6                 M        Fq                O      O      ;        mclk_tx mclk_rx hclk               K      K           tx rx           /      T        Utx-m                       default            X   Y   Z   [        *          	  [disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 l       7                  S      W      <        mclk_tx mclk_rx hclk               K      K           tx rx           /      U      V      
  Utx-m rx-m                      *          	  [disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 l       L                  Z      Y        pdm_clk pdm_hclk               K   	        rx             \   ]   ^   _   `   a        default         /      X        Updm-m           *          	  [disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 l       f         
  mclk hclk                  _      \           K           tx          default            b        *          	  [disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         l                                                 	  apb_pclk                                dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         l                                                 	  apb_pclk                          K      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 l       /                 H     G      	  i2c pclk               c        default                                   [okay       rtc@51           ,microcrystal,rv8263             Q                  i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 l       0                 J     I      	  i2c pclk               d        default                                 	  [disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 l       1                 L     K      	  i2c pclk               e        default                                 	  [disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 l       2                 N     M      	  i2c pclk               f        default                                 	  [disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 l       3                 P     O      	  i2c pclk               g        default                                 	  [disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 l                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 l       g                 R     Q        spiclk apb_pclk                             tx rx           default            h   i   j                                	  [disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 l       h                 T     S        spiclk apb_pclk                             tx rx           default            k   l   m                                	  [disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 l       i                 V     U        spiclk apb_pclk                             tx rx           default            n   o   p                                	  [disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 l       j                 X     W        spiclk apb_pclk                             tx rx           default            q   r   s                                	  [disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 l       u                              baudclk apb_pclk                                   t        default                             	  [disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 l       v                 #              baudclk apb_pclk                                   u        default                               [okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 l       w                 '     $        baudclk apb_pclk                                   v        default                             	  [disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 l       x                 +     (        baudclk apb_pclk                        	           w        default                             	  [disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 l       y                 /     ,        baudclk apb_pclk                  
                 x        default                             	  [disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 l       z                 3     0        baudclk apb_pclk                                   y        default                             	  [disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 l       {                 7     4        baudclk apb_pclk                                   z        default                             	  [disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 l       |                 ;     8        baudclk apb_pclk                                   {        default                             	  [disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 l       }                 ?     <        baudclk apb_pclk                                   |        default                             	  [disabled          thermal-zones      cpu-thermal            d        +          9   }       trips      cpu_alert0          I p        U           passive            ~      cpu_alert1          I $        U           passive       cpu_crit            I s        U        	   critical             cooling-maps       map0            `   ~      0  e   	   
                  gpu-thermal                    +          9   }      trips      gpu-threshold           I p        U           passive       gpu-target          I $        U           passive                  gpu-crit            I s        U        	   critical             cooling-maps       map0            `           e                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 l       s                             f@ 
`                           tsadc apb_pclk          /                                  t s        init default sleep                                                    	  [disabled               }      saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 l       ]                              saradc apb_pclk         /             Usaradc-apb                   	  [disabled          pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  [disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default                  	  [disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  [disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default                  	  [disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  [disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default                  	  [disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  [disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default                  	  [disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  [disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default                  	  [disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  [disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default                  	  [disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe                  "                 /                                            	  [disabled                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe                  %                 /                                            	  [disabled                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk                        /             Uapb                  	  [disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z                          	        Uapb         /           	  [disabled               C      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {                          	        Uapb         /           	  [disabled               D      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            l                                       	  [disabled       host-port                     	  [disabled                     otg-port                      	  [disabled                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            l                                       	  [disabled       host-port                     	  [disabled                     otg-port                      	  [disabled                        pinctrl          ,rockchip,rk3568-pinctrl                    ;   H                                                gpio@fdd60000            ,rockchip,gpio-bank                                l       !                  .               
                               &            O        d                    gpio@fe740000            ,rockchip,gpio-bank               t                 l       "                 c     d         
                               &            O        d         gpio@fe750000            ,rockchip,gpio-bank               u                 l       #                 e     f         
                  @            &            O        d         gpio@fe760000            ,rockchip,gpio-bank               v                 l       $                 g     h         
                  `            &            O        d         gpio@fe770000            ,rockchip,gpio-bank               w                 l       %                 i     j         
                              &            O        d         pcfg-pull-up             2                 pcfg-pull-none           ?                 pcfg-pull-none-drv-level-1           ?        L                    pcfg-pull-none-drv-level-2           ?        L                    pcfg-pull-none-drv-level-3           ?        L                    pcfg-pull-up-drv-level-1             2        L                    pcfg-pull-up-drv-level-2             2        L                    pcfg-pull-none-smt           ?         [                 acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0         p                                 cpu       ebc       edpdp         emmc          eth0          eth1          flash         fspi       fspi-pins         `  p                                                                                   J         gmac0      gmac0-miim           p                                         gmac0-rx-bus2         0  p                                                     gmac0-tx-bus2         0  p                                                     gmac0-rgmii-clk          p                                         gmac0-rgmii-bus       @  p                                                                    gmac1         gpu       hdmitx     hdmitxm0-cec            p                       G      hdmitx-scl          p                       E      hdmitx-sda          p                       F         i2c0       i2c0-xfer            p       	             
                          i2c1       i2c1-xfer            p                                     c         i2c2       i2c2m0-xfer          p                                     d         i2c3       i2c3m0-xfer          p                                    e         i2c4       i2c4m0-xfer          p                  
                 f         i2c5       i2c5m0-xfer          p                                   g         i2s1       i2s1m0-lrckrx           p                       O      i2s1m0-lrcktx           p                       N      i2s1m0-sclkrx           p                       M      i2s1m0-sclktx           p                       L      i2s1m0-sdi0         p                       P      i2s1m0-sdi1         p      
                 Q      i2s1m0-sdi2         p      	                 R      i2s1m0-sdi3         p                       S      i2s1m0-sdo0         p                       T      i2s1m0-sdo1         p                       U      i2s1m0-sdo2         p      	                 V      i2s1m0-sdo3         p      
                 W         i2s2       i2s2m0-lrcktx           p                       Y      i2s2m0-sclktx           p                       X      i2s2m0-sdi          p                       Z      i2s2m0-sdo          p                       [         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           p                       \      pdmm0-clk1          p                       ]      pdmm0-sdi0          p                       ^      pdmm0-sdi1          p      
                 _      pdmm0-sdi2          p      	                 `      pdmm0-sdi3          p                       a         pmic          pmu       pwm0       pwm0m0-pins         p                                 pwm1       pwm1m0-pins         p                                 pwm2       pwm2m0-pins         p                                  pwm3       pwm3-pins           p                        !         pwm4       pwm4-pins           p                                 pwm5       pwm5-pins           p                                 pwm6       pwm6-pins           p                                 pwm7       pwm7-pins           p                                 pwm8       pwm8m0-pins         p      	                          pwm9       pwm9m0-pins         p      
                          pwm10      pwm10m0-pins            p                                pwm11      pwm11m0-pins            p                                pwm12      pwm12m0-pins            p                                pwm13      pwm13m0-pins            p                                pwm14      pwm14m0-pins            p                                pwm15      pwm15m0-pins            p                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0        sdmmc1        sdmmc2        spdif      spdifm0-tx          p                       b         spi0       spi0m0-pins       0  p                                                  j      spi0m0-cs0          p                        h      spi0m0-cs1          p                        i         spi1       spi1m0-pins       0  p                                               m      spi1m0-cs0          p                       k      spi1m0-cs1          p                       l         spi2       spi2m0-pins       0  p                                               p      spi2m0-cs0          p                       n      spi2m0-cs1          p                       o         spi3       spi3m0-pins       0  p                              
                 s      spi3m0-cs0          p                       q      spi3m0-cs1          p                       r         tsadc      tsadc-shutorg           p                              tsadc-pin           p                                  uart0      uart0-xfer           p                                              uart1      uart1m0-xfer             p                                   t         uart2      uart2m0-xfer             p                                     u         uart3      uart3m0-xfer             p                                    v         uart4      uart4m0-xfer             p                                   w         uart5      uart5m0-xfer             p                                   x         uart6      uart6m0-xfer             p                                   y         uart7      uart7m0-xfer             p                                   z         uart8      uart8m0-xfer             p                                   {         uart9      uart9m0-xfer             p                                   |         vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2          sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          l       ^                       	  sata-phy                                   	  [disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   5      qos@fe190100             ,rockchip,rk3568-qos syscon                                   6      qos@fe190200             ,rockchip,rk3568-qos syscon                                   7      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                                    &      '     w        refclk_m refclk_n pclk          /             Uphy         ~           [okay                     pcie@fe270000            ,rockchip,rk3568-pcie                                     H             (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  l                                                          1sys pmc msg legacy err          d           R                     `  e                                                                                             s                                                                                     	  pcie-phy                        0      @       @      '                             T                                                      @      @       @            dbi apb config          /              Upipe            [okay                         legacy-interrupt-controller          O                     d                        l                              pcie@fe280000            ,rockchip,rk3568-pcie                                     H             (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  l                                                          1sys pmc msg legacy err          d           R                     `  e                                                                                             s                                                                                      	  pcie-phy                        0             @      (                             T                                                      @             @            dbi apb config          /              Upipe          	  [disabled       legacy-interrupt-controller          O                     d                        l                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 l                            1macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          /            
  Ustmmaceth                      z                                                   [okay                                                     sY@        output                     rgmii           default                                   /           <   mdio             ,snps,dwmac-mdio                              ethernet-phy@0           ,ethernet-phy-ieee802.3-c22                                   stmmac-axi-config                                                                           rx-queues-config                             queue0           tx-queues-config            
                 queue0              phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe                                   /                                            	  [disabled                        	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width non-removable dma-names arm,pl330-periph-burst #dma-cells wakeup-source polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells #io-channel-cells rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf reset-gpios clock_in_out phy-handle phy-mode rx_delay tx_delay 