 +j   8 t   (             <                             U    edgeble,neural-compute-module-6a-io edgeble,neural-compute-module-6a rockchip,rk3588                                     +            7Edgeble Neu6A IO Board     aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0            cpu           arm,cortex-a55                      
psci                      +   
            2   
            B0,         W           g           t   @                                 @                                                                        cpu@100          cpu           arm,cortex-a55                     
psci                      +   
            W           g           t   @                                 @                                                                        cpu@200          cpu           arm,cortex-a55                     
psci                      +   
            W           g           t   @                                 @                                                                        cpu@300          cpu           arm,cortex-a55                     
psci                      +   
            W           g           t   @                                 @                                                                        cpu@400          cpu           arm,cortex-a76                     
psci                       +   
           2   
           B0,         W           g           t   @                                 @                                                                       cpu@500          cpu           arm,cortex-a76                     
psci                       +   
           W           g           t   @                                 @                                                                       cpu@600          cpu           arm,cortex-a76                     
psci                       +   
           2   
           B0,         W           g           t   @                                 @                                                                       cpu@700          cpu           arm,cortex-a76                     
psci                       +   
           W           g           t   @                                 @                                                                 	      idle-states         psci       cpu-sleep             arm,idle-state                   *           A   d        R   x        b                      l2-cache-l0           cache           i           v   @                   s                                        l2-cache-l1           cache           i           v   @                   s                                        l2-cache-l2           cache           i           v   @                   s                                        l2-cache-l3           cache           i           v   @                   s                                        l2-cache-b0           cache           i           v   @                   s                                        l2-cache-b1           cache           i           v   @                   s                                        l2-cache-b2           cache           i           v   @                   s                                        l2-cache-b3           cache           i           v   @                   s                                        l3-cache              cache           i 0          v   @                   s                                display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                                     gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             2   
           B         +                       core coregroup stacks                   0         \              ]              ^               job mmu gpu                    #            	  1disabled       opp-table             operating-points-v2               opp-300000000           8             ? 
L 
L P      opp-400000000           8    ׄ         ? 
L 
L P      opp-500000000           8    e         ? 
L 
L P      opp-600000000           8    #F         ? 
L 
L P      opp-700000000           8    )'         ? 
` 
` P      opp-800000000           8    /         ? q q P      opp-900000000           8    5         ? 5  5  P      opp-1000000000          8    ;         ? P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                +                       ref_clk suspend_clk bus_clk         Motg         U                  Zusb2-phy usb3-phy         
  dutmi_wide           #              m     R         t                                                   	  1disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      +                  !        U   "        Zusb         #              1okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      +                  !        U   "        Zusb         #              1okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      +                  #        U   $        Zusb         #              1okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      +                  #        U   $        Zusb         #              1okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  +     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           Mhost            U   %         	  Zusb3-phy          
  dutmi_wide           m     4         t                                             1okay          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            :         	  1disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            :         	  1disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   e      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   `      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    a      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 +                      syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                +                b      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    (      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    +             phyclk          usb480m_phy0                                 m     m             Gphy apb       	  1disabled                  otg-port            S          	  1disabled                           syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   +             phyclk          usb480m_phy2                                 m     o             Gphy apb         1okay               !   host-port           S            1okay            ^   &           "            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   +             phyclk          usb480m_phy3                                 m     p              Gphy apb         1okay               #   host-port           S            1okay            ^   '           $            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                2                                                                         ]      q                 @  BA .  2Fq )׫ׄ e /  ׄ   e Zр         i   (                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               +     t     s      	  i2c pclk            v   )        default                      +            1okay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                            dp                           %   &              regulator-state-mem          0         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                            dp                           %   &              regulator-state-mem          0            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               +                  baudclk apb_pclk            I   *      *           Ntx rx           v   +        default         X           b         	  1disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +                	  pwm pclk            v   ,        default         o         	  1disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +                	  pwm pclk            v   -        default         o         	  1disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +                	  pwm pclk            v   .        default         o           1okay          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +                	  pwm pclk            v   /        default         o         	  1disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  c   power-controller          !    rockchip,rk3588-power-controller                        z            +            1okay                  power-domain@8                     z                         +       power-domain@9             	         +     !     #     "                0   1   2        z                         +       power-domain@10            
        +     !     #     "           3        z          power-domain@11                    +     !     #     "           4        z                power-domain@12                    +                          5   6   7   8        z          power-domain@13                                 +            z       power-domain@14                  (  +                                    9        z          power-domain@15                     +                               :        z          power-domain@16                    +                     ;   <   =                     +            z       power-domain@17                     +                               >   ?   @        z                power-domain@21                    +                                                                                                      A   B   C   D   E   F   G   H                     +            z       power-domain@23                    +      C      A                I        z          power-domain@14                     +                               9        z          power-domain@15                    +                          :        z          power-domain@22                    +                     J        z             power-domain@24                    +     [     Z     ]           K   L                     +            z       power-domain@25                  8  +                                   Z           M        z             power-domain@26                  8  +                                   Q           N   O        z          power-domain@27                  0  +                                         P   Q   R   S                     +            z       power-domain@28                     +                               T   U        z          power-domain@29                  (  +                                    V   W        z             power-domain@30                    +     z     {           X        z          power-domain@31                  @  +     W                                              Y   Z   [   \        z          power-domain@33            !        +     W     Z     [        z          power-domain@34            "        +     W     Z     [        z          power-domain@37            %        +          2           ]        z          power-domain@38            &        +      4      5        z          power-domain@40            (           ^        z                video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            2      A      C        Bׄ ׄ         +      A      C      
  aclk hclk           #               m                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  +     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             _        #              i   `           a           b           c      	  1disabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  +     ]     \        aclk iface          :            #            	  1disabled               _      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    +                       mclk_tx mclk_rx hclk            2                           I   d            Ntx          #              m             Gtx-m                      	  1disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    +     4     4     5        mclk_tx mclk_rx hclk            2     1                      I   d           Ntx          #              m             Gtx-m                      	  1disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   +     0     0     ,        mclk_tx mclk_rx hclk            2     -                      I   d           Nrx          #              m             Grx-m                      	  1disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    5      qos@fdf35200              rockchip,rk3588-qos syscon              R                    6      qos@fdf35400              rockchip,rk3588-qos syscon              T                    7      qos@fdf35600              rockchip,rk3588-qos syscon              V                    8      qos@fdf36000              rockchip,rk3588-qos syscon              `                    X      qos@fdf39000              rockchip,rk3588-qos syscon                                  ]      qos@fdf3d800              rockchip,rk3588-qos syscon                                  ^      qos@fdf3e000              rockchip,rk3588-qos syscon                                  Z      qos@fdf3e200              rockchip,rk3588-qos syscon                                  Y      qos@fdf3e400              rockchip,rk3588-qos syscon                                  [      qos@fdf3e600              rockchip,rk3588-qos syscon                                  \      qos@fdf40000              rockchip,rk3588-qos syscon                                   V      qos@fdf40200              rockchip,rk3588-qos syscon                                  W      qos@fdf40400              rockchip,rk3588-qos syscon                                  P      qos@fdf40500              rockchip,rk3588-qos syscon                                  Q      qos@fdf40600              rockchip,rk3588-qos syscon                                  R      qos@fdf40800              rockchip,rk3588-qos syscon                                  S      qos@fdf41000              rockchip,rk3588-qos syscon                                  T      qos@fdf41100              rockchip,rk3588-qos syscon                                  U      qos@fdf60000              rockchip,rk3588-qos syscon                                   ;      qos@fdf60200              rockchip,rk3588-qos syscon                                  <      qos@fdf60400              rockchip,rk3588-qos syscon                                  =      qos@fdf61000              rockchip,rk3588-qos syscon                                  >      qos@fdf61200              rockchip,rk3588-qos syscon                                  ?      qos@fdf61400              rockchip,rk3588-qos syscon                                  @      qos@fdf62000              rockchip,rk3588-qos syscon                                   9      qos@fdf63000              rockchip,rk3588-qos syscon              0                    :      qos@fdf64000              rockchip,rk3588-qos syscon              @                    I      qos@fdf66000              rockchip,rk3588-qos syscon              `                    A      qos@fdf66200              rockchip,rk3588-qos syscon              b                    B      qos@fdf66400              rockchip,rk3588-qos syscon              d                    C      qos@fdf66600              rockchip,rk3588-qos syscon              f                    D      qos@fdf66800              rockchip,rk3588-qos syscon              h                    E      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    F      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    G      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    H      qos@fdf67000              rockchip,rk3588-qos syscon              p                    J      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   3      qos@fdf71000              rockchip,rk3588-qos syscon                                  4      qos@fdf72000              rockchip,rk3588-qos syscon                                   0      qos@fdf72200              rockchip,rk3588-qos syscon              "                    1      qos@fdf72400              rockchip,rk3588-qos syscon              $                    2      qos@fdf80000              rockchip,rk3588-qos syscon                                   M      qos@fdf81000              rockchip,rk3588-qos syscon                                  N      qos@fdf81200              rockchip,rk3588-qos syscon                                  O      qos@fdf82000              rockchip,rk3588-qos syscon                                   K      qos@fdf82200              rockchip,rk3588-qos syscon              "                    L      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  e      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  +     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  +                  f                      f                     f                     f           9           J           Y  0    g  0            a           U   %         	  Zpcie-phy            #      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          m     )     .      	  Gpwr pipe                         +         	  1disabled       legacy-interrupt-controller          k                                                                     f         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  +     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  +                  h                      h                     h                     h           9           J           Y  @    g  @            a           U   i         	  Zpcie-phy            #      "      T                                                       @      
        @         0     
A        @                                     dbi apb config          m     *     /      	  Gpwr pipe                         +         	  1disabled       legacy-interrupt-controller          k                                                                     h         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  +     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         #      !        m     $      
  Gstmmaceth           i   `           (           j                    k           l               	  1disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                     j      rx-queues-config                          k   queue0        queue1           tx-queues-config            !              l   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  +     b     _     e     T     o        sata pmalive rxoob ref asic         7                        +            1okay       sata-port@0                     I @          U   i         	  Zsata-phy            V            e             sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  +     d     a     g     V     q        sata pmalive rxoob ref asic         7                        +          	  1disabled       sata-port@0                     I @          U   %         	  Zsata-phy            V            e             spi@fe2b0000              rockchip,sfc                +        @                               +     /     0        clk_sfc hclk_sfc                         +          	  1disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                +   
      
   	                  biu ciu ciu-drive ciu-sample            t                    default         v   m   n   o   p        #      (        1okay                                                                                q           r      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                +                            biu ciu ciu-drive ciu-sample            t                    default         v   s        #      %      	  1disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       2     -     .     ,        B n6        (  +     ,     *     +     -     .        core bus axi block timer                     v   t   u   v   w   x        default       (  m                                 Gcore bus axi block timer            1okay                                                                  i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       +      +      /      (        mclk_tx mclk_rx hclk            2      )      -                            I   *       *           Ntx rx           #      &        m      *      +      
  Gtx-m rx-m            8        default       (  v   y   z   {   |   }   ~                              	  1disabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       +     y     }     u        mclk_tx mclk_rx hclk            I   *      *           Ntx rx           m     ^     _      
  Gtx-m rx-m            8        default       (  v                                                	  1disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       +                    i2s_clk i2s_hclk            2                            I                     Ntx rx           #      &        default         v                              	  1disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       +      %              i2s_clk i2s_hclk            2      "                      I                    Ntx rx           #      &        default         v                              	  1disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                k        S    a          ]     8         h                                         +                 msi-controller@fe640000           arm,gic-v3-its              d                  h        w              g      msi-controller@fe660000           arm,gic-v3-its              f                  h        w                    ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        +      n      	  apb_pclk                          *      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        +      o      	  apb_pclk                                i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            {      	  i2c pclk                  >               v           default                      +          	  1disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            |      	  i2c pclk                  ?               v           default                      +          	  1disabled          i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            }      	  i2c pclk                  @               v           default                      +          	  1disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            ~      	  i2c pclk                  A               v           default                      +          	  1disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  B               v           default                      +          	  1disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               +      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              +      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               +                    spiclk apb_pclk         I   *      *           Ntx rx                      v                 default                      +          	  1disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               +                    spiclk apb_pclk         I   *      *           Ntx rx                      v                 default                      +          	  1disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               +                    spiclk apb_pclk         I                    Ntx rx                      v              default                      +            1okay            2              B    pmic@0            rockchip,rk806           B@                                              default         v                                &           &           &        	   &        	   &        	   &        	&   &        	2   &        	>   &        	J   &        	W           	d   &        	q           	~           	   &         	        	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1           vdd_gpu_s0                    dp         ~          0        	     regulator-state-mem          0         dcdc-reg2           vdd_cpu_lit_s0                             dp         ~          0              regulator-state-mem          0         dcdc-reg3           vdd_log_s0                             
L         q          0   regulator-state-mem          0        	 q         dcdc-reg4           vdd_vdenc_s0                               dp         ~          0   regulator-state-mem          0         dcdc-reg5           vdd_ddr_s0                             
L                   0   regulator-state-mem          0        	 P         dcdc-reg6           vdd2_ddr_s3                      regulator-state-mem          	         dcdc-reg7           vdd_2v0_pldo_s3                                               0              regulator-state-mem          	        	          dcdc-reg8           vcc_3v3_s3                             2Z         2Z           q   regulator-state-mem          	        	 2Z         dcdc-reg9           vddq_ddr_s0                      regulator-state-mem          0         dcdc-reg10          vcc_1v8_s3                             w@         w@   regulator-state-mem          	        	 w@         pldo-reg1           avcc_1v8_s0                            w@         w@   regulator-state-mem          0         pldo-reg2           vcc_1v8_s0                             w@         w@   regulator-state-mem          0        	 w@         pldo-reg3           avdd_1v2_s0                            O         O   regulator-state-mem          0         pldo-reg4           vcc_3v3_s0                             2Z         2Z          0   regulator-state-mem          0         pldo-reg5           vccio_sd_s0                            w@         2Z          0           r   regulator-state-mem          0         pldo-reg6         	  pldo6_s3                               w@         w@   regulator-state-mem          	        	 w@         nldo-reg1           vdd_0v75_s3                            q         q   regulator-state-mem          	        	 q         nldo-reg2           vdd_ddr_pll_s0                             P         P   regulator-state-mem          0        	 P         nldo-reg3           avdd_0v75_s0                               q         q   regulator-state-mem          0         nldo-reg4           vdd_0v85_s0                            P         P   regulator-state-mem          0         nldo-reg5           vdd_0v75_s0                            q         q   regulator-state-mem          0                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               +                    spiclk apb_pclk         I                    Ntx rx                      v                 default                      +          	  1disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               +                    baudclk apb_pclk            I   *      *   	        Ntx rx           v           default         b           X         	  1disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               +                    baudclk apb_pclk            I   *   
   *           Ntx rx           v           default         b           X           1okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               +                    baudclk apb_pclk            I   *      *           Ntx rx           v           default         b           X         	  1disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               +                    baudclk apb_pclk            I      	      
        Ntx rx           v           default         b           X         	  1disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               +                    baudclk apb_pclk            I                    Ntx rx           v           default         b           X         	  1disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               +                    baudclk apb_pclk            I                    Ntx rx           v           default         b           X           1okay          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               +                    baudclk apb_pclk            I   d      d           Ntx rx           v           default         b           X           1okay          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               +                    baudclk apb_pclk            I   d   	   d   
        Ntx rx           v           default         b           X         	  1disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               +                    baudclk apb_pclk            I   d      d           Ntx rx           v           default         b           X         	  1disabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      L      K      	  pwm pclk            v           default         o         	  1disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      L      K      	  pwm pclk            v           default         o         	  1disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      L      K      	  pwm pclk            v           default         o         	  1disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      L      K      	  pwm pclk            v           default         o         	  1disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      O      N      	  pwm pclk            v           default         o         	  1disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      O      N      	  pwm pclk            v           default         o         	  1disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      O      N      	  pwm pclk            v           default         o         	  1disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      O      N      	  pwm pclk            v           default         o         	  1disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      R      Q      	  pwm pclk            v           default         o         	  1disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      R      Q      	  pwm pclk            v           default         o         	  1disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      R      Q      	  pwm pclk            v           default         o         	  1disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      R      Q      	  pwm pclk            v           default         o         	  1disabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     +                    tsadc apb_pclk          2              B         m      V      W        Gtsadc-apb tsadc         
         
(            
?            v           
Z           gpio otpout         
d         	  1disabled          adc@fec10000              rockchip,rk3588-saradc                                                    
z           +                    saradc apb_pclk         m      U        Gsaradc-apb        	  1disabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  C               v           default                      +            1okay       rtc@51            haoyu,hym8563              Q                                              hym8563         default         v            
         i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  D               v           default                      +          	  1disabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  E               v           default                      +          	  1disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               +                    spiclk apb_pclk         I   d      d           Ntx rx                      v                 default                      +          	  1disabled          efuse@fecc0000            rockchip,rk3588-otp                               +                                otp apb_pclk phy arb            m                          Gotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        
            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        +      p      	  apb_pclk                          d      phy@fed60000              rockchip,rk3588-hdptx-phy                                 +          T        ref apb         S          8  m     #          c     d     e     !     "      "  Gphy apb init cmn lane ropll lcpll           i         	  1disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                S           +          l     V           refclk immortal pclk utmi         (  m                                     Ginit cmn lane pcs_apb pma_apb           
           
           
           
         	  1disabled                      phy@fee00000              rockchip,rk3588-naneng-combphy                               +          v     W        ref apb pipe            2             B         S           m     <     C        Gphy apb         
   (        
           1okay               i      phy@fee20000              rockchip,rk3588-naneng-combphy                               +          x     W        ref apb pipe            2             B         S           m     >     E        Gphy apb         
   (        
           1okay               %      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  i                        +                 gpio@fd8a0000             rockchip,gpio-bank                                                    +     q     r         	                                k        	                               gpio@fec20000             rockchip,gpio-bank                                                    +      s      t         	                                k        	                    gpio@fec30000             rockchip,gpio-bank                                                    +      u      v         	                  @             k        	                               gpio@fec40000             rockchip,gpio-bank                                                    +      w      x         	                  `             k        	                               gpio@fec50000             rockchip,gpio-bank                                                    +      y      z         	                               k        	                               pcfg-pull-up                              pcfg-pull-down           *                 pcfg-pull-none           9                 pcfg-pull-none-drv-level-2           9        F                    pcfg-pull-up-drv-level-1                     F                    pcfg-pull-up-drv-level-2                     F                    pcfg-pull-none-smt           9         U                 auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout            j                       t      emmc-bus8           j                                                                                                           u      emmc-clk            j                       v      emmc-cmd            j                        w      emmc-data-strobe            j                       x         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m2-xfer          j                                     )         i2c1       i2c1m0-xfer          j          	             	                       i2c2       i2c2m0-xfer          j          	             	                       i2c3       i2c3m0-xfer          j         	            	                       i2c4       i2c4m0-xfer          j         	            	                       i2c5       i2c5m0-xfer          j         	            	                       i2c6       i2c6m0-xfer          j          	             	                       i2c7       i2c7m0-xfer          j         	            	                       i2c8       i2c8m0-xfer          j         	            	                       i2s0       i2s0-lrck           j                       y      i2s0-sclk           j                       z      i2s0-sdi0           j                       {      i2s0-sdi1           j                       |      i2s0-sdi2           j                       }      i2s0-sdi3           j                       ~      i2s0-sdo0           j                             i2s0-sdo1           j                             i2s0-sdo2           j                             i2s0-sdo3           j                                i2s1       i2s1m0-lrck         j                             i2s1m0-sclk         j                             i2s1m0-sdi0         j                             i2s1m0-sdi1         j                             i2s1m0-sdi2         j                             i2s1m0-sdi3         j                             i2s1m0-sdo0         j      	                       i2s1m0-sdo1         j      
                       i2s1m0-sdo2         j                             i2s1m0-sdo3         j                                i2s2       i2s2m1-lrck         j                             i2s2m1-sclk         j                             i2s2m1-sdi          j      
                       i2s2m1-sdo          j                                i2s3       i2s3-lrck           j                             i2s3-sclk           j                             i2s3-sdi            j                             i2s3-sdo            j                                jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p  j                                                                                                                pmu       pwm0       pwm0m0-pins         j                        ,         pwm1       pwm1m0-pins         j                        -         pwm2       pwm2m1-pins         j      	                 .         pwm3       pwm3m0-pins         j                        /         pwm4       pwm4m0-pins         j                                 pwm5       pwm5m0-pins         j       	                          pwm6       pwm6m0-pins         j                                 pwm7       pwm7m0-pins         j                                 pwm8       pwm8m0-pins         j                                pwm9       pwm9m0-pins         j                                pwm10      pwm10m0-pins            j                                 pwm11      pwm11m0-pins            j                                pwm12      pwm12m0-pins            j                                pwm13      pwm13m0-pins            j                                pwm14      pwm14m0-pins            j                                pwm15      pwm15m0-pins            j                                refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `  j                                                                                    s         sdmmc      sdmmc-bus4        @  j                                                           p      sdmmc-clk           j                       m      sdmmc-cmd           j                       n      sdmmc-det           j                        o         spdif0        spdif1        spi0       spi0m0-pins       0  j                                                        spi0m0-cs0          j                              spi0m0-cs1          j                                 spi1       spi1m1-pins       0  j                                                     spi1m1-cs0          j                             spi1m1-cs1          j                                spi2       spi2m2-pins       0  j                                                        spi2m2-cs0          j       	                          spi3       spi3m1-pins       0  j                                                     spi3m1-cs0          j                             spi3m1-cs1          j                                spi4       spi4m0-pins       0  j                                                     spi4m0-cs0          j                             spi4m0-cs1          j                                tsadc      tsadc-shut          j                                 uart0      uart0m1-xfer             j                    	                 +         uart1      uart1m1-xfer             j         
            
                       uart2      uart2m0-xfer             j          
             
                       uart3      uart3m1-xfer             j         
            
                       uart4      uart4m1-xfer             j         
            
                       uart5      uart5m1-xfer             j         
            
                       uart6      uart6m0-xfer             j         
            
                       uart7      uart7m2-xfer             j         
            
                       uart8      uart8m1-xfer             j         
            
                       uart9      uart9m1-xfer             j         
            
                       vop       bt656         gpio-func      tsadc-gpio-func         j                                  eth0          gmac0         leds       led_user_en         j                                  pcie2      pcie2-0-rst         j                                 pcie3      pcie3x2-rst         j                              pcie3x2-vcc3v3-en           j                              pcie3x4-rst         j                              pcie3x4-vcc3v3-en           j                                 hym8563    hym8563-int         j                                  usb    vcc5v0-host-en          j                                    usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                +                       ref_clk suspend_clk bus_clk         Motg         U                 Zusb2-phy usb3-phy         
  dutmi_wide           #              m     S         t                                 	  1disabled          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                         syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                          syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +                 usb2phy@4000              rockchip,rk3588-usb2phy           @                        +             phyclk          usb480m_phy1                                 m     n             Gphy apb       	  1disabled                  otg-port            S          	  1disabled                           i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      +                       mclk_tx mclk_rx hclk            2                           I   d           Ntx          #              m             Gtx-m                      	  1disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      +     9     9     ?        mclk_tx mclk_rx hclk            2     6                      I   d           Ntx          #              m             Gtx-m                      	  1disabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      +     +     +     '        mclk_tx mclk_rx hclk            2     (                      I   d           Nrx          #              m             Grx-m                      	  1disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    +     &     &     "        mclk_tx mclk_rx hclk            2     #                      I   d           Nrx          #              m             Grx-m                      	  1disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  +     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                           sys pmc msg legacy err                                          `  +                                                                                             9            J           Y                      a           U         	  Zpcie-phy            #      "      T                                                       @      	        @         0     
@        @                                     dbi apb config          m     &     +      	  Gpwr pipe            1okay            default         v           x                        legacy-interrupt-controller          k                                                                             pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  +     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                              sys pmc msg legacy err                                          `  +                                                                                             9           J           Y                    a           U         	  Zpcie-phy            #      "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config          m     '     ,      	  Gpwr pipe            1okay            default         v           x                        legacy-interrupt-controller          k                                                                              pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  +     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  +                                                                                             9           J           Y       g               a           U            	  Zpcie-phy            #      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          m     (     -      	  Gpwr pipe                         +           1okay            default         v           x                        legacy-interrupt-controller          k                                                                              ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  +     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         #      !        m     #      
  Gstmmaceth           i   `           (                                                         	  1disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                           rx-queues-config                             queue0        queue1           tx-queues-config            !                 queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  +     c     `     f     U     p        sata pmalive rxoob ref asic         7                        +          	  1disabled       sata-port@0                     I @          U            	  Zsata-phy            V            e             phy@fed90000              rockchip,rk3588-usbdp-phy                                S           +          m     W           refclk immortal pclk utmi         (  m                                     Ginit cmn lane pcs_apb pma_apb           
           
           
           
         	  1disabled                     phy@fee10000              rockchip,rk3588-naneng-combphy                               +          w     W        ref apb pipe            2             B         S           m     =     D        Gphy apb         
   (        
           1okay                     phy@fee80000              rockchip,rk3588-pcie3-phy                                S            +     y        pclk            m     H        Gphy         
   (                   1okay                     gpio-leds         
    gpio-leds      led-0                    
  	heartbeat           ~                
  heartbeat           default         v            vcc12v-dcin-regulator             regulator-fixed         vcc12v_dcin                                                        vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@         LK@        %              &      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                             %   &                 chosen          serial2:1500000n8         vcc3v3-pcie2x1l0-regulator            regulator-fixed         vcc3v3_pcie2x1l0             2Z         2Z                  %   q                 vcc3v3-pcie3x2-regulator              regulator-fixed                  ~                  default         v           vcc3v3_pcie3x2           2Z         2Z                  %   &                 vcc3v3-pcie3x4-regulator              regulator-fixed                  ~                  default         v           vcc3v3_pcie3x4           2Z         2Z                  %   &                 vcc5v0-host-regulator             regulator-fixed                                    default         v           vcc5v0_host          LK@         LK@                          %   &           '         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr104 vmmc-supply vqmmc-supply no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells wakeup-source bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins reset-gpios vpcie3v3-supply rockchip,phy-grf color linux,default-trigger stdout-path startup-delay-us enable-active-high gpio 