 7   8 )|   (             )D                             &    friendlyarm,nanopc-t6 rockchip,rk3588                                    +            7FriendlyElec NanoPC-T6     aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000            /mmc@fe2c0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0            cpu           arm,cortex-a55                      psci                      0   
            7   
            G0,         \           l           y   @                                 @                                                               	         cpu@100          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                               	         cpu@200          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                               	         cpu@300          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                               	         cpu@400          cpu           arm,cortex-a76                     psci                       0   
           7   
           G0,         \           l           y   @                                 @                                                              	         cpu@500          cpu           arm,cortex-a76                     psci                       0   
           \           l           y   @                                 @                                                              	         cpu@600          cpu           arm,cortex-a76                     psci                       0   
           7   
           G0,         \           l           y   @                                 @                                                              	         cpu@700          cpu           arm,cortex-a76                     psci                       0   
           \           l           y   @                                 @                                                              	   	      idle-states         psci       cpu-sleep             arm,idle-state                   /           F   d        W   x        g          	            l2-cache-l0           cache           n           {   @                   x                               	         l2-cache-l1           cache           n           {   @                   x                               	         l2-cache-l2           cache           n           {   @                   x                               	         l2-cache-l3           cache           n           {   @                   x                               	         l2-cache-b0           cache           n           {   @                   x                               	         l2-cache-b1           cache           n           {   @                   x                               	         l2-cache-b2           cache           n           {   @                   x                               	         l2-cache-b3           cache           n           {   @                   x                               	         l3-cache              cache           n 0          {   @                   x                    	            display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                               	   
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                         	            gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             7   
           G         0                       core coregroup stacks                   0         \              ]              ^               job mmu gpu                    (            	  6disabled       opp-table             operating-points-v2         	      opp-300000000           =             D 
L 
L P      opp-400000000           =    ׄ         D 
L 
L P      opp-500000000           =    e         D 
L 
L P      opp-600000000           =    #F         D 
L 
L P      opp-700000000           =    )'         D 
` 
` P      opp-800000000           =    /         D q q P      opp-900000000           =    5         D 5  5  P      opp-1000000000          =    ;         D P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                0                       ref_clk suspend_clk bus_clk         Rotg         Z                  _usb2-phy usb3-phy         
  iutmi_wide           (              r     R         y                                                   	  6disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      0                  !        Z   "        _usb         (              6okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      0                  !        Z   "        _usb         (              6okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      0                  #        Z   $        _usb         (              6okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      0                  #        Z   $        _usb         (              6okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  0     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           Rhost            Z   %         	  _usb3-phy          
  iutmi_wide           r     4         y                                    %      	  6disabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            ?         	  6disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            ?         	  6disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                	   e      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                	   `      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                 	   a      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 0             	         syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                0             	   b      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @         	         syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                 	   '      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                	         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                	         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         	         syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +           	      usb2phy@0             rockchip,rk3588-usb2phy                                    0             phyclk          usb480m_phy0                                 r     m             Lphy apb       	  6disabled            	      otg-port            X          	  6disabled            	               syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   0             phyclk          usb480m_phy2                                 r     o             Lphy apb         6okay            	   !   host-port           X            6okay            c   &        	   "            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   0             phyclk          usb480m_phy3                                 r     p              Lphy apb         6okay            	   #   host-port           X            6okay            	   $            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                 	         syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                 	         sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                7                                                                         ]      q                 @  GA .  2Fq )׫ׄ e /  ׄ   e Zр         n   '                              	         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               0     t     s      	  i2c pclk            {   (        default                      +            6okay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                            dp                           *   )        	      regulator-state-mem          5         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                            dp                           *   )        	      regulator-state-mem          5            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               0                  baudclk apb_pclk            N   *      *           Stx rx           {   +        default         ]           g         	  6disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0                	  pwm pclk            {   ,        default         t         	  6disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0                	  pwm pclk            {   -        default         t           6okay          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0                	  pwm pclk            {   .        default         t         	  6disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0                	  pwm pclk            {   /        default         t         	  6disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                               	   c   power-controller          !    rockchip,rk3588-power-controller                                    +            6okay            	      power-domain@8                                              +       power-domain@9             	         0     !     #     "                0   1   2                                 +       power-domain@10            
        0     !     #     "           3                  power-domain@11                    0     !     #     "           4                        power-domain@12                    0                          5   6   7   8                  power-domain@13                                 +                   power-domain@14                  (  0                                    9                  power-domain@15                     0                               :                  power-domain@16                    0                     ;   <   =                     +                   power-domain@17                     0                               >   ?   @                        power-domain@21                    0                                                                                                      A   B   C   D   E   F   G   H                     +                   power-domain@23                    0      C      A                I                  power-domain@14                     0                               9                  power-domain@15                    0                          :                  power-domain@22                    0                     J                     power-domain@24                    0     [     Z     ]           K   L                     +                   power-domain@25                  8  0                                   Z           M                     power-domain@26                  8  0                                   Q           N   O                  power-domain@27                  0  0                                         P   Q   R   S                     +                   power-domain@28                     0                               T   U                  power-domain@29                  (  0                                    V   W                     power-domain@30                    0     z     {           X                  power-domain@31                  @  0     W                                              Y   Z   [   \                  power-domain@33            !        0     W     Z     [                  power-domain@34            "        0     W     Z     [                  power-domain@37            %        0          2           ]                  power-domain@38            &        0      4      5                  power-domain@40            (           ^                        video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            7      A      C        Gׄ ׄ         0      A      C      
  aclk hclk           (               r                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  0     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             _        (              n   `           a           b           c      	  6disabled       ports                        +            	      port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  0     ]     \        aclk iface          ?            (            	  6disabled            	   _      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    0                       mclk_tx mclk_rx hclk            7                           N   d            Stx          (              r             Ltx-m                      	  6disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    0     4     4     5        mclk_tx mclk_rx hclk            7     1                      N   d           Stx          (              r             Ltx-m                      	  6disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   0     0     0     ,        mclk_tx mclk_rx hclk            7     -                      N   d           Srx          (              r             Lrx-m                      	  6disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                 	   5      qos@fdf35200              rockchip,rk3588-qos syscon              R                 	   6      qos@fdf35400              rockchip,rk3588-qos syscon              T                 	   7      qos@fdf35600              rockchip,rk3588-qos syscon              V                 	   8      qos@fdf36000              rockchip,rk3588-qos syscon              `                 	   X      qos@fdf39000              rockchip,rk3588-qos syscon                               	   ]      qos@fdf3d800              rockchip,rk3588-qos syscon                               	   ^      qos@fdf3e000              rockchip,rk3588-qos syscon                               	   Z      qos@fdf3e200              rockchip,rk3588-qos syscon                               	   Y      qos@fdf3e400              rockchip,rk3588-qos syscon                               	   [      qos@fdf3e600              rockchip,rk3588-qos syscon                               	   \      qos@fdf40000              rockchip,rk3588-qos syscon                                	   V      qos@fdf40200              rockchip,rk3588-qos syscon                               	   W      qos@fdf40400              rockchip,rk3588-qos syscon                               	   P      qos@fdf40500              rockchip,rk3588-qos syscon                               	   Q      qos@fdf40600              rockchip,rk3588-qos syscon                               	   R      qos@fdf40800              rockchip,rk3588-qos syscon                               	   S      qos@fdf41000              rockchip,rk3588-qos syscon                               	   T      qos@fdf41100              rockchip,rk3588-qos syscon                               	   U      qos@fdf60000              rockchip,rk3588-qos syscon                                	   ;      qos@fdf60200              rockchip,rk3588-qos syscon                               	   <      qos@fdf60400              rockchip,rk3588-qos syscon                               	   =      qos@fdf61000              rockchip,rk3588-qos syscon                               	   >      qos@fdf61200              rockchip,rk3588-qos syscon                               	   ?      qos@fdf61400              rockchip,rk3588-qos syscon                               	   @      qos@fdf62000              rockchip,rk3588-qos syscon                                	   9      qos@fdf63000              rockchip,rk3588-qos syscon              0                 	   :      qos@fdf64000              rockchip,rk3588-qos syscon              @                 	   I      qos@fdf66000              rockchip,rk3588-qos syscon              `                 	   A      qos@fdf66200              rockchip,rk3588-qos syscon              b                 	   B      qos@fdf66400              rockchip,rk3588-qos syscon              d                 	   C      qos@fdf66600              rockchip,rk3588-qos syscon              f                 	   D      qos@fdf66800              rockchip,rk3588-qos syscon              h                 	   E      qos@fdf66a00              rockchip,rk3588-qos syscon              j                 	   F      qos@fdf66c00              rockchip,rk3588-qos syscon              l                 	   G      qos@fdf66e00              rockchip,rk3588-qos syscon              n                 	   H      qos@fdf67000              rockchip,rk3588-qos syscon              p                 	   J      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                	   3      qos@fdf71000              rockchip,rk3588-qos syscon                               	   4      qos@fdf72000              rockchip,rk3588-qos syscon                                	   0      qos@fdf72200              rockchip,rk3588-qos syscon              "                 	   1      qos@fdf72400              rockchip,rk3588-qos syscon              $                 	   2      qos@fdf80000              rockchip,rk3588-qos syscon                                	   M      qos@fdf81000              rockchip,rk3588-qos syscon                               	   N      qos@fdf81200              rockchip,rk3588-qos syscon                               	   O      qos@fdf82000              rockchip,rk3588-qos syscon                                	   K      qos@fdf82200              rockchip,rk3588-qos syscon              "                 	   L      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  e      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  0     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  0                  f                      f                     f                     f           >           O           ^  0    g  0            f           Z   %         	  _pcie-phy            (      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          r     )     .      	  Lpwr pipe                         +           6okay            p   h               |   i        default         {   j   legacy-interrupt-controller                                                                            	   f         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  0     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  0                  k                      k                     k                     k           >           O           ^  @    g  @            f           Z   l         	  _pcie-phy            (      "      T                                                       @      
        @         0     
A        @                                     dbi apb config          r     *     /      	  Lpwr pipe                         +           6okay            p   h               |   m        default         {   n   legacy-interrupt-controller                                                                            	   k         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  0     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         (      !        r     $      
  Lstmmaceth           n   `           '           o                    p           q               	  6disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                  	   o      rx-queues-config            ,           	   p   queue0        queue1           tx-queues-config            B           	   q   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  0     b     _     e     T     o        sata pmalive rxoob ref asic         X                        +          	  6disabled       sata-port@0                     j @          Z   l         	  _sata-phy            w                         sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  0     d     a     g     V     q        sata pmalive rxoob ref asic         X                        +          	  6disabled       sata-port@0                     j @          Z   %         	  _sata-phy            w                         spi@fe2b0000              rockchip,sfc                +        @                               0     /     0        clk_sfc hclk_sfc                         +          	  6disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                0   
      
   	                  biu ciu ciu-drive ciu-sample                                default         {   r   s   t   u        (      (        6okay                                            v                                                     w           x      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                0                            biu ciu ciu-drive ciu-sample                                default         {   y        (      %      	  6disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       7     -     .     ,        G n6        (  0     ,     *     +     -     .        core bus axi block timer                     {   z   {   |   }   ~        default       (  r                                 Lcore bus axi block timer            6okay                                 %         +         9         H      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       0      +      /      (        mclk_tx mclk_rx hclk            7      )      -                            N   *       *           Stx rx           (      &        r      *      +      
  Ltx-m rx-m            b        default         {                                   6okay            	      port       endpoint            }i2s                               	               i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       0     y     }     u        mclk_tx mclk_rx hclk            N   *      *           Stx rx           r     ^     _      
  Ltx-m rx-m            b        default       (  {                                                	  6disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       0                    i2s_clk i2s_hclk            7                            N                     Stx rx           (      &        default         {                              	  6disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       0      %              i2s_clk i2s_hclk            7      "                      N                    Stx rx           (      &        default         {                              	  6disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                            a               8                                                  +           	      msi-controller@fe640000           arm,gic-v3-its              d                                     	   g      msi-controller@fe660000           arm,gic-v3-its              f                                     	         ppi-partitions     interrupt-partition-0                               	         interrupt-partition-1                       	        	               dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        0      n      	  apb_pclk                       	   *      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        0      o      	  apb_pclk                       	         i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            {      	  i2c pclk                  >               {           default                      +          	  6disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            |      	  i2c pclk                  ?               {           default                      +            6okay       regulator@42              rockchip,rk8602            B                   vdd_npu_s0                             dp         ~                  *   )   regulator-state-mem          5            i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            }      	  i2c pclk                  @               {           default                      +          	  6disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            ~      	  i2c pclk                  A               {           default                      +          	  6disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  i2c pclk                  B               {           default                      +          	  6disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               0      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              0      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               0                    spiclk apb_pclk         N   *      *           Stx rx           	           {                 default                      +          	  6disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               0                    spiclk apb_pclk         N   *      *           Stx rx           	           {                 default                      +          	  6disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               0                    spiclk apb_pclk         N                    Stx rx           	           {              default                      +            6okay            7              G    pmic@0            rockchip,rk806          	# B@                        v                      default         {                     	5        	M   )        	Y   )        	e   )        	q   )        	}   )        	   )        	   )        	   )        	   )        	   )        	           	   )        	           	           	   )         
        
      dvs1-null-pins          
"gpio_pwrctrl1         	  
'pin_fun0            	         dvs2-null-pins          
"gpio_pwrctrl2         	  
'pin_fun0            	         dvs3-null-pins          
"gpio_pwrctrl3         	  
'pin_fun0            	         regulators     dcdc-reg1                     dp         ~          0        vdd_gpu_s0          
0     regulator-state-mem          5         dcdc-reg2                              dp         ~          0        vdd_cpu_lit_s0          	      regulator-state-mem          5         dcdc-reg3                              
L         q          0        vdd_log_s0     regulator-state-mem          5        
L q         dcdc-reg4                              dp         ~        
h q          0        vdd_vdenc_s0       regulator-state-mem          5         dcdc-reg5                              
L                   0        vdd_ddr_s0     regulator-state-mem          5        
L P         dcdc-reg6                             vdd2_ddr_s3    regulator-state-mem          
         dcdc-reg7                                                 0        vdd_2v0_pldo_s3         	      regulator-state-mem          
        
L          dcdc-reg8                              2Z         2Z        vcc_3v3_s3          	      regulator-state-mem          
        
L 2Z         dcdc-reg9                             vddq_ddr_s0    regulator-state-mem          5         dcdc-reg10                             w@         w@        vcc_1v8_s3     regulator-state-mem          
        
L w@         pldo-reg1                              w@         w@        avcc_1v8_s0         	      regulator-state-mem          5         pldo-reg2                              w@         w@        vcc_1v8_s0     regulator-state-mem          5        
L w@         pldo-reg3                              O         O        avdd_1v2_s0    regulator-state-mem          5         pldo-reg4                              2Z         2Z          0        vcc_3v3_s0     regulator-state-mem          5         pldo-reg5                              w@         2Z          0        vccio_sd_s0         	   x   regulator-state-mem          5         pldo-reg6                              w@         w@      	  pldo6_s3       regulator-state-mem          
        
L w@         nldo-reg1                              q         q        vdd_0v75_s3    regulator-state-mem          
        
L q         nldo-reg2                              P         P        vdd_ddr_pll_s0     regulator-state-mem          5        
L P         nldo-reg3                              q         q        avdd_0v75_s0       regulator-state-mem          5         nldo-reg4                              P         P        vdd_0v85_s0    regulator-state-mem          5         nldo-reg5                              q         q        vdd_0v75_s0    regulator-state-mem          5                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               0                    spiclk apb_pclk         N                    Stx rx           	           {                 default                      +          	  6disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               0                    baudclk apb_pclk            N   *      *   	        Stx rx           {           default         g           ]         	  6disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               0                    baudclk apb_pclk            N   *   
   *           Stx rx           {           default         g           ]           6okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               0                    baudclk apb_pclk            N   *      *           Stx rx           {           default         g           ]         	  6disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               0                    baudclk apb_pclk            N      	      
        Stx rx           {           default         g           ]         	  6disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               0                    baudclk apb_pclk            N                    Stx rx           {           default         g           ]         	  6disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               0                    baudclk apb_pclk            N                    Stx rx           {           default         g           ]         	  6disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               0                    baudclk apb_pclk            N   d      d           Stx rx           {           default         g           ]         	  6disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               0                    baudclk apb_pclk            N   d   	   d   
        Stx rx           {           default         g           ]         	  6disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               0                    baudclk apb_pclk            N   d      d           Stx rx           {           default         g           ]         	  6disabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      L      K      	  pwm pclk            {           default         t         	  6disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      L      K      	  pwm pclk            {           default         t         	  6disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      L      K      	  pwm pclk            {           default         t         	  6disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      L      K      	  pwm pclk            {           default         t         	  6disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      O      N      	  pwm pclk            {           default         t         	  6disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      O      N      	  pwm pclk            {           default         t         	  6disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      O      N      	  pwm pclk            {           default         t         	  6disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      O      N      	  pwm pclk            {           default         t         	  6disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      R      Q      	  pwm pclk            {           default         t         	  6disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      R      Q      	  pwm pclk            {           default         t         	  6disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      R      Q      	  pwm pclk            {           default         t         	  6disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      R      Q      	  pwm pclk            {           default         t         	  6disabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     0                    tsadc apb_pclk          7              G         r      V      W        Ltsadc-apb tsadc         
         
            
            {           
           gpio otpout         
           6okay          adc@fec10000              rockchip,rk3588-saradc                                                               0                    saradc apb_pclk         r      U        Lsaradc-apb          6okay                     i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  i2c pclk                  C               {           default                      +            6okay             @   typec-portc@22            fcs,fusb302            "            v                      {           default                connector             usb-c-connector         ,dual            6USB-C           <dual            Gsink            V        b,        l B@         rtc@51            haoyu,hym8563              Q                    hym8563         default         {               v                       ~         i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  i2c pclk                  D               {           default                      +            6okay             @   codec@1b              realtek,rt5616                     0      1        mclk                        7      1        G          	      port       endpoint                       	                  i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  i2c pclk                  E               {           default                      +          	  6disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               0                    spiclk apb_pclk         N   d      d           Stx rx           	           {                 default                      +          	  6disabled          efuse@fecc0000            rockchip,rk3588-otp                               0                                otp apb_pclk phy arb            r                          Lotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                                    npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        0      p      	  apb_pclk                       	   d      phy@fed60000              rockchip,rk3588-hdptx-phy                                 0          T        ref apb         X          8  r     #          c     d     e     !     "      "  Lphy apb init cmn lane ropll lcpll           n         	  6disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                X           0          l     V           refclk immortal pclk utmi         (  r                                     Linit cmn lane pcs_apb pma_apb                                                     	  6disabled            	          phy@fee00000              rockchip,rk3588-naneng-combphy                               0          v     W        ref apb pipe            7             G         X           r     <     C        Lphy apb            '                   6okay            	   l      phy@fee20000              rockchip,rk3588-naneng-combphy                               0          x     W        ref apb pipe            7             G         X           r     >     E        Lphy apb            '                   6okay            	   %      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  n                        +           	      gpio@fd8a0000             rockchip,gpio-bank                                                    0     q     r         
                                        
                    ;                      HEADER_10 HEADER_08 HEADER_32                   	   v      gpio@fec20000             rockchip,gpio-bank                                                    0      s      t         
                                        
                      HEADER_27 HEADER_28      HEADER_15 HEADER_26 HEADER_21 HEADER_19 HEADER_23 HEADER_24 HEADER_22                 HEADER_05 HEADER_03          	         gpio@fec30000             rockchip,gpio-bank                                                    0      u      v         
                  @                     
                    .                   CSI1_11 CSI1_12                        	         gpio@fec40000             rockchip,gpio-bank                                                    0      w      x         
                  `                     
                      HEADER_35 HEADER_38 HEADER_40 HEADER_36 HEADER_37  DSI0_12  HEADER_33 DSI0_10 HEADER_07 HEADER_16 HEADER_18 HEADER_29 HEADER_31 HEADER_12 DSI0_08 DSI0_14 HEADER_11 HEADER_13          DSI1_10            gpio@fec50000             rockchip,gpio-bank                                                    0      y      z         
                                       
                    C  DSI1_08 DSI1_14  DSI1_12                 CSI0_11 CSI0_12                    	   h      pcfg-pull-up                     	         pcfg-pull-down           ,        	         pcfg-pull-none           ;        	         pcfg-pull-none-drv-level-2           ;        H           	         pcfg-pull-up-drv-level-1                     H           	         pcfg-pull-up-drv-level-2                     H           	         pcfg-pull-none-smt           ;         W        	         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout            l                    	   z      emmc-bus8           l                                                                                                        	   {      emmc-clk            l                    	   |      emmc-cmd            l                     	   }      emmc-data-strobe            l                    	   ~         eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m2-xfer          l                                  	   (         i2c1       i2c1m0-xfer          l          	             	           	            i2c2       i2c2m0-xfer          l          	             	           	            i2c3       i2c3m0-xfer          l         	            	           	            i2c4       i2c4m0-xfer          l         	            	           	            i2c5       i2c5m0-xfer          l         	            	           	            i2c6       i2c6m0-xfer          l          	             	           	            i2c7       i2c7m0-xfer          l         	            	           	            i2c8       i2c8m2-xfer          l         	            	           	            i2s0       i2s0-lrck           l                    	         i2s0-mclk           l                    	         i2s0-sclk           l                    	         i2s0-sdi0           l                    	         i2s0-sdo0           l                    	            i2s1       i2s1m0-lrck         l                    	         i2s1m0-sclk         l                    	         i2s1m0-sdi0         l                    	         i2s1m0-sdi1         l                    	         i2s1m0-sdi2         l                    	         i2s1m0-sdi3         l                    	         i2s1m0-sdo0         l      	              	         i2s1m0-sdo1         l      
              	         i2s1m0-sdo2         l                    	         i2s1m0-sdo3         l                    	            i2s2       i2s2m1-lrck         l                    	         i2s2m1-sclk         l                    	         i2s2m1-sdi          l      
              	         i2s2m1-sdo          l                    	            i2s3       i2s3-lrck           l                    	         i2s3-sclk           l                    	         i2s3-sdi            l                    	         i2s3-sdo            l                    	            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p  l                                                                                                    	            pmu       pwm0       pwm0m0-pins         l                     	   ,         pwm1       pwm1m1-pins         l                    	   -         pwm2       pwm2m0-pins         l                     	   .         pwm3       pwm3m0-pins         l                     	   /         pwm4       pwm4m0-pins         l                     	            pwm5       pwm5m0-pins         l       	              	            pwm6       pwm6m0-pins         l                     	            pwm7       pwm7m0-pins         l                     	            pwm8       pwm8m0-pins         l                    	            pwm9       pwm9m0-pins         l                    	            pwm10      pwm10m0-pins            l                     	            pwm11      pwm11m0-pins            l                    	            pwm12      pwm12m0-pins            l                    	            pwm13      pwm13m0-pins            l                    	            pwm14      pwm14m0-pins            l                    	            pwm15      pwm15m0-pins            l                    	            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `  l                                                                                 	   y         sdmmc      sdmmc-bus4        @  l                                                        	   u      sdmmc-clk           l                    	   r      sdmmc-cmd           l                    	   s      sdmmc-det           l                     	   t         spdif0        spdif1        spi0       spi0m0-pins       0  l                                               	         spi0m0-cs0          l                     	         spi0m0-cs1          l                     	            spi1       spi1m1-pins       0  l                                            	         spi1m1-cs0          l                    	         spi1m1-cs1          l                    	            spi2       spi2m2-pins       0  l                                               	         spi2m2-cs0          l       	              	            spi3       spi3m1-pins       0  l                                            	         spi3m1-cs0          l                    	         spi3m1-cs1          l                    	            spi4       spi4m0-pins       0  l                                            	         spi4m0-cs0          l                    	         spi4m0-cs1          l                    	            tsadc      tsadc-shut          l                     	            uart0      uart0m1-xfer             l                    	              	   +         uart1      uart1m1-xfer             l         
            
           	            uart2      uart2m0-xfer             l          
             
           	            uart3      uart3m1-xfer             l         
            
           	            uart4      uart4m1-xfer             l         
            
           	            uart5      uart5m1-xfer             l         
            
           	            uart6      uart6m1-xfer             l          
            
           	            uart7      uart7m1-xfer             l         
            
           	            uart8      uart8m1-xfer             l         
            
           	            uart9      uart9m1-xfer             l         
            
           	            vop       bt656         gpio-func      tsadc-gpio-func         l                      	            eth0          gmac0         gpio-leds      sys-led-pin         l                     	         usr-led-pin         l                     	            headphone      hp-det          l                     	            hym8563    hym8563-int         l                      	            pcie       pcie2-0-rst         l                     	         pcie2-1-rst         l                     	   j      pcie2-2-rst         l                     	   n      pcie-m20-pwren          l                     	         pcie-m21-pwren          l                     	            usb    4g-lte-pwren            l                     	         typec5v-pwren           l                     	         usbc0-int           l                      	               usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                0                       ref_clk suspend_clk bus_clk         Rotg         Z                 _usb2-phy usb3-phy         
  iutmi_wide           (              r     S         y                                 	  6disabled          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                	         syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                 	         syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         	         syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +           	      usb2phy@4000              rockchip,rk3588-usb2phy           @                        0             phyclk          usb480m_phy1                                 r     n             Lphy apb       	  6disabled            	      otg-port            X          	  6disabled            	               i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      0                       mclk_tx mclk_rx hclk            7                           N   d           Stx          (              r             Ltx-m                      	  6disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      0     9     9     ?        mclk_tx mclk_rx hclk            7     6                      N   d           Stx          (              r             Ltx-m                      	  6disabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      0     +     +     '        mclk_tx mclk_rx hclk            7     (                      N   d           Srx          (              r             Lrx-m                      	  6disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    0     &     &     "        mclk_tx mclk_rx hclk            7     #                      N   d           Srx          (              r             Lrx-m                      	  6disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  0     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                           sys pmc msg legacy err                                          `  0                                                                                             >            O           ^                      f           Z         	  _pcie-phy            (      "      T                                                       @      	        @         0     
@        @                                     dbi apb config          r     &     +      	  Lpwr pipe            6okay            p   h               |      legacy-interrupt-controller                                                                           	            pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  0     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                              sys pmc msg legacy err                                          `  0                                                                                             >           O           ^                    f           Z         	  _pcie-phy            (      "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config          r     '     ,      	  Lpwr pipe          	  6disabled       legacy-interrupt-controller                                                                            	            pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  0     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err                                          `  0                                                                                             >           O           ^       g               f           Z            	  _pcie-phy            (      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          r     (     -      	  Lpwr pipe                         +           6okay            p   h               |   m        default         {      legacy-interrupt-controller                                                                            	            ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  0     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         (      !        r     #      
  Lstmmaceth           n   `           '                                                         	  6disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                  	         rx-queues-config            ,           	      queue0        queue1           tx-queues-config            B           	      queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  0     c     `     f     U     p        sata pmalive rxoob ref asic         X                        +          	  6disabled       sata-port@0                     j @          Z            	  _sata-phy            w                         phy@fed90000              rockchip,rk3588-usbdp-phy                                X           0          m     W           refclk immortal pclk utmi         (  r                                     Linit cmn lane pcs_apb pma_apb                                                     	  6disabled            	         phy@fee10000              rockchip,rk3588-naneng-combphy                               0          w     W        ref apb pipe            7             G         X           r     =     D        Lphy apb            '                   6okay            	         phy@fee80000              rockchip,rk3588-pcie3-phy                                X            0     y        pclk            r     H        Lphy            '        z           6okay            	         chosen          serial2:1500000n8         leds          
    gpio-leds      led-0           v                  6system-led        
  heartbeat           default         {         led-1           v                	  6user-led            default         {            sound             simple-audio-card           default         {           realtek,rt5616-codec            i2s                                     Headphones        0  3Headphone Headphones Microphone Microphone Jack       N  MHeadphones HPOL Headphones HPOR MIC1 Microphone Jack Microphone Jack micbias1      simple-audio-card,cpu           g         simple-audio-card,codec         g            vcc12v-dcin-regulator             regulator-fixed         vcc12v_dcin                                               	         vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@         LK@        *           	         vcc4v0-sys-regulator              regulator-fixed         vcc4v0_sys                             =	          =	         *           	   )      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc-1v1-nldo-s3                                             *   )        	         vcc3v3-pcie20-regulator           regulator-fixed         vcc_3v3_pcie20                             2Z         2Z        *           	   m      vbus5v0-typec-regulator           regulator-fixed          q                          default         {           vbus5v0_typec            LK@         LK@        *           	         vcc3v3-pcie2x1l0-regulator            regulator-fixed          q           h               default         {           vcc3v3_pcie2x1l0             2Z         2Z        *           	   i      vcc3v3-pcie30-regulator           regulator-fixed          q        v                  default         {           vcc3v3_pcie30            2Z         2Z        *           	         vcc3v3-sd-s0-regulator            regulator-fixed                     h                        2Z         2Z        vcc3v3_sd_s0            *           	   w      vdd-4g-3v3-regulator              regulator-fixed          q           h               default         {           vdd_4g_3v3           2Z         2Z        *           	   &         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 mmc1 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed cd-gpios disable-wp no-mmc no-sdio sd-uhs-sdr104 vmmc-supply vqmmc-supply no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only dai-format mclk-fs remote-endpoint mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells rockchip,suspend-voltage-selector num-cs spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-init-microvolt regulator-on-in-suspend rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply vbus-supply data-role label power-role try-power-role source-pdos sink-pdos op-sink-microwatt wakeup-source bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges gpio-line-names bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf stdout-path linux,default-trigger simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,hp-det-gpio simple-audio-card,hp-pin-name simple-audio-card,widgets simple-audio-card,routing sound-dai enable-active-high enable-active-low 