 *   8    (                                              turing,rk1 rockchip,rk3588                                   +            7Turing Machines RK1    aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /ethernet@fe1c0000           /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                        cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                        cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                       cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                       cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                 	      idle-states         psci       cpu-sleep             arm,idle-state           #        4           K   d        \   x        l                      l2-cache-l0           cache           s              @                   }                                        l2-cache-l1           cache           s              @                   }                                        l2-cache-l2           cache           s              @                   }                                        l2-cache-l3           cache           s              @                   }                                        l2-cache-b0           cache           s              @                   }                                        l2-cache-b1           cache           s              @                   }                                        l2-cache-b2           cache           s              @                   }                                        l2-cache-b3           cache           s              @                   }                                        l3-cache              cache           s 0             @                   }                                display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                                     gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       core coregroup stacks                   0         \              ]              ^               job mmu gpu                    -            	  ;disabled       opp-table             operating-points-v2               opp-300000000           B             I 
L 
L P      opp-400000000           B    ׄ         I 
L 
L P      opp-500000000           B    e         I 
L 
L P      opp-600000000           B    #F         I 
L 
L P      opp-700000000           B    )'         I 
` 
` P      opp-800000000           B    /         I q q P      opp-900000000           B    5         I 5  5  P      opp-1000000000          B    ;         I P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       ref_clk suspend_clk bus_clk         Wotg         _                  dusb2-phy usb3-phy         
  nutmi_wide           -              w     R         ~                                                   	  ;disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  !        _   "        dusb         -            	  ;disabled          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  !        _   "        dusb         -            	  ;disabled          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  #        _   $        dusb         -            	  ;disabled          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  #        _   $        dusb         -            	  ;disabled          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           Whost            _   %         	  dusb3-phy          
  nutmi_wide           w     4         ~                                    *      	  ;disabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            D         	  ;disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            D         	  ;disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   d      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   _      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    `      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 5                      syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                5                a      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    &      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    5             phyclk          usb480m_phy0                                 w     m             Qphy apb       	  ;disabled                  otg-port            ]          	  ;disabled                           syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy2                                 w     o             Qphy apb       	  ;disabled               !   host-port           ]          	  ;disabled               "            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             phyclk          usb480m_phy3                                 w     p              Qphy apb       	  ;disabled               #   host-port           ]          	  ;disabled               $            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр         h   &                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  i2c pclk            u   '        default                      +            ;okay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                            dp                           $   (              regulator-state-mem          /         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                            dp                           $   (              regulator-state-mem          /            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  baudclk apb_pclk            H   )      )           Mtx rx           u   *        default         W           a         	  ;disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk            u   +        default         n           ;okay                     pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  pwm pclk            u   ,        default         n         	  ;disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  pwm pclk            u   -        default         n         	  ;disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  pwm pclk            u   .        default         n         	  ;disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  b   power-controller          !    rockchip,rk3588-power-controller                        y            +            ;okay                  power-domain@8                     y                         +       power-domain@9             	         5     !     #     "                /   0   1        y                         +       power-domain@10            
        5     !     #     "           2        y          power-domain@11                    5     !     #     "           3        y                power-domain@12                    5                          4   5   6   7        y          power-domain@13                                 +            y       power-domain@14                  (  5                                    8        y          power-domain@15                     5                               9        y          power-domain@16                    5                     :   ;   <                     +            y       power-domain@17                     5                               =   >   ?        y                power-domain@21                    5                                                                                                      @   A   B   C   D   E   F   G                     +            y       power-domain@23                    5      C      A                H        y          power-domain@14                     5                               8        y          power-domain@15                    5                          9        y          power-domain@22                    5                     I        y             power-domain@24                    5     [     Z     ]           J   K                     +            y       power-domain@25                  8  5                                   Z           L        y             power-domain@26                  8  5                                   Q           M   N        y          power-domain@27                  0  5                                         O   P   Q   R                     +            y       power-domain@28                     5                               S   T        y          power-domain@29                  (  5                                    U   V        y             power-domain@30                    5     z     {           W        y          power-domain@31                  @  5     W                                              X   Y   Z   [        y          power-domain@33            !        5     W     Z     [        y          power-domain@34            "        5     W     Z     [        y          power-domain@37            %        5          2           \        y          power-domain@38            &        5      4      5        y          power-domain@40            (           ]        y                video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            <      A      C        Lׄ ׄ         5      A      C      
  aclk hclk           -               w                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             ^        -              h   _           `           a           b      	  ;disabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        aclk iface          D            -            	  ;disabled               ^      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       mclk_tx mclk_rx hclk            <                           H   c            Mtx          -              w             Qtx-m                      	  ;disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        mclk_tx mclk_rx hclk            <     1                      H   c           Mtx          -              w             Qtx-m                      	  ;disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        mclk_tx mclk_rx hclk            <     -                      H   c           Mrx          -              w             Qrx-m                      	  ;disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    4      qos@fdf35200              rockchip,rk3588-qos syscon              R                    5      qos@fdf35400              rockchip,rk3588-qos syscon              T                    6      qos@fdf35600              rockchip,rk3588-qos syscon              V                    7      qos@fdf36000              rockchip,rk3588-qos syscon              `                    W      qos@fdf39000              rockchip,rk3588-qos syscon                                  \      qos@fdf3d800              rockchip,rk3588-qos syscon                                  ]      qos@fdf3e000              rockchip,rk3588-qos syscon                                  Y      qos@fdf3e200              rockchip,rk3588-qos syscon                                  X      qos@fdf3e400              rockchip,rk3588-qos syscon                                  Z      qos@fdf3e600              rockchip,rk3588-qos syscon                                  [      qos@fdf40000              rockchip,rk3588-qos syscon                                   U      qos@fdf40200              rockchip,rk3588-qos syscon                                  V      qos@fdf40400              rockchip,rk3588-qos syscon                                  O      qos@fdf40500              rockchip,rk3588-qos syscon                                  P      qos@fdf40600              rockchip,rk3588-qos syscon                                  Q      qos@fdf40800              rockchip,rk3588-qos syscon                                  R      qos@fdf41000              rockchip,rk3588-qos syscon                                  S      qos@fdf41100              rockchip,rk3588-qos syscon                                  T      qos@fdf60000              rockchip,rk3588-qos syscon                                   :      qos@fdf60200              rockchip,rk3588-qos syscon                                  ;      qos@fdf60400              rockchip,rk3588-qos syscon                                  <      qos@fdf61000              rockchip,rk3588-qos syscon                                  =      qos@fdf61200              rockchip,rk3588-qos syscon                                  >      qos@fdf61400              rockchip,rk3588-qos syscon                                  ?      qos@fdf62000              rockchip,rk3588-qos syscon                                   8      qos@fdf63000              rockchip,rk3588-qos syscon              0                    9      qos@fdf64000              rockchip,rk3588-qos syscon              @                    H      qos@fdf66000              rockchip,rk3588-qos syscon              `                    @      qos@fdf66200              rockchip,rk3588-qos syscon              b                    A      qos@fdf66400              rockchip,rk3588-qos syscon              d                    B      qos@fdf66600              rockchip,rk3588-qos syscon              f                    C      qos@fdf66800              rockchip,rk3588-qos syscon              h                    D      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    E      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    F      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    G      qos@fdf67000              rockchip,rk3588-qos syscon              p                    I      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   2      qos@fdf71000              rockchip,rk3588-qos syscon                                  3      qos@fdf72000              rockchip,rk3588-qos syscon                                   /      qos@fdf72200              rockchip,rk3588-qos syscon              "                    0      qos@fdf72400              rockchip,rk3588-qos syscon              $                    1      qos@fdf80000              rockchip,rk3588-qos syscon                                   L      qos@fdf81000              rockchip,rk3588-qos syscon                                  M      qos@fdf81200              rockchip,rk3588-qos syscon                                  N      qos@fdf82000              rockchip,rk3588-qos syscon                                   J      qos@fdf82200              rockchip,rk3588-qos syscon              "                    K      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  d      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  5     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `  *                  e                      e                     e                     e           8           I           X  0    f  0            `           _   %         	  dpcie-phy            -      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          w     )     .      	  Qpwr pipe                         +           ;okay            default         u   g        j   h          legacy-interrupt-controller          v                                                                     e         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  5     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `  *                  i                      i                     i                     i           8           I           X  @    f  @            `           _   j         	  dpcie-phy            -      "      T                                                       @      
        @         0     
A        @                                     dbi apb config          w     *     /      	  Qpwr pipe                         +         	  ;disabled       legacy-interrupt-controller          v                                                                     i         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -      !        w     $      
  Qstmmaceth           h   _           &           k                    l           m                 ;okay            output             n        rgmii-rxid          u   o   p   q   r   s        default                        C   mdio              snps,dwmac-mdio                      +       ethernet-phy@1        4    ethernet-phy-id001c.c916 ethernet-phy-ieee802.3-c22                    default         u   t          :        /  P        j   u                 n         stmmac-axi-config           A                                 K           [              k      rx-queues-config            k              l   queue0        queue1           tx-queues-config                          m   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          _   j         	  dsata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          _   %         	  dsata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        clk_sfc hclk_sfc                         +          	  ;disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  biu ciu ciu-drive ciu-sample                                default         u   v   w   x   y        -      (      	  ;disabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            biu ciu ciu-drive ciu-sample                                default         u   z        -      %      	  ;disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        core bus axi block timer                     u   {   |   }   ~           default       (  w                                 Qcore bus axi block timer            ;okay                                                            "      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        mclk_tx mclk_rx hclk            <      )      -                            H   )       )           Mtx rx           -      &        w      *      +      
  Qtx-m rx-m            <        default       (  u                                                	  ;disabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        mclk_tx mclk_rx hclk            H   )      )           Mtx rx           w     ^     _      
  Qtx-m rx-m            <        default       (  u                                                	  ;disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    i2s_clk i2s_hclk            <                            H                     Mtx rx           -      &        default         u                              	  ;disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              i2s_clk i2s_hclk            <      "                      H                    Mtx rx           -      &        default         u                              	  ;disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                v        W    a          a     8         l                                         +                 msi-controller@fe640000           arm,gic-v3-its              d                  l        {              f      msi-controller@fe660000           arm,gic-v3-its              f                  l        {                    ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        5      n      	  apb_pclk                          )      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        5      o      	  apb_pclk                                i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  i2c pclk                  >               u           default                      +            ;okay       regulator@42              rockchip,rk8602            B                   vdd_npu_s0                             dp         ~                  $   (   regulator-state-mem          /            i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  i2c pclk                  ?               u           default                      +          	  ;disabled          i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  i2c pclk                  @               u           default                      +          	  ;disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  i2c pclk                  A               u           default                      +          	  ;disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  B               u           default                      +          	  ;disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    spiclk apb_pclk         H   )      )           Mtx rx                      u                 default                      +          	  ;disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    spiclk apb_pclk         H   )      )           Mtx rx                      u                 default                      +          	  ;disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    spiclk apb_pclk         H                    Mtx rx                      u              default                      +            ;okay       pmic@0            rockchip,rk806           B@                                              default         u                       (           (           (           (           (        	   (        	   (        	   (        	*   (        	6   (        	C           	P   (        	]           	j           	w   (         	        	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1                     dp         ~          0        vdd_gpu_s0          	     regulator-state-mem          /         dcdc-reg2                              dp         ~          0        vdd_cpu_lit_s0                regulator-state-mem          /         dcdc-reg3                              
L         q          0        vdd_log_s0     regulator-state-mem          /        	 q         dcdc-reg4                              dp         ~          0        vdd_vdenc_s0       regulator-state-mem          /         dcdc-reg5                              
L                   0        vdd_ddr_s0     regulator-state-mem          /        	 P         dcdc-reg6                             vdd2_ddr_s3    regulator-state-mem          	         dcdc-reg7                                                 0        vdd_2v0_pldo_s3               regulator-state-mem          	        	          dcdc-reg8                              2Z         2Z        vcc_3v3_s3     regulator-state-mem          	        	 2Z         dcdc-reg9                             vddq_ddr_s0    regulator-state-mem          /         dcdc-reg10                             w@         w@        vcc_1v8_s3     regulator-state-mem          	        	 w@         pldo-reg1                              w@         w@        avcc_1v8_s0    regulator-state-mem          /         pldo-reg2                              w@         w@        vcc_1v8_s0     regulator-state-mem          /        	 w@         pldo-reg3                              O         O        avdd_1v2_s0    regulator-state-mem          /         pldo-reg4                              2Z         2Z          0        vcc_3v3_s0     regulator-state-mem          /         pldo-reg5                              w@         2Z          0        vccio_sd_s0    regulator-state-mem          /         pldo-reg6                              w@         w@      	  pldo6_s3       regulator-state-mem          	        	 w@         nldo-reg1                              q         q        vdd_0v75_s3    regulator-state-mem          	        	 q         nldo-reg2                              P         P        vdd_ddr_pll_s0     regulator-state-mem          /        	 P         nldo-reg3                              q         q        avdd_0v75_s0       regulator-state-mem          /         nldo-reg4                              P         P        vdd_0v85_s0    regulator-state-mem          /         nldo-reg5                              q         q        vdd_0v75_s0    regulator-state-mem          /                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    spiclk apb_pclk         H                    Mtx rx                      u                 default                      +          	  ;disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    baudclk apb_pclk            H   )      )   	        Mtx rx           u           default         a           W         	  ;disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    baudclk apb_pclk            H   )   
   )           Mtx rx           u           default         a           W           ;okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    baudclk apb_pclk            H   )      )           Mtx rx           u           default         a           W         	  ;disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    baudclk apb_pclk            H      	      
        Mtx rx           u           default         a           W         	  ;disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    baudclk apb_pclk            H                    Mtx rx           u           default         a           W         	  ;disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    baudclk apb_pclk            H                    Mtx rx           u           default         a           W         	  ;disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    baudclk apb_pclk            H   c      c           Mtx rx           u           default         a           W         	  ;disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    baudclk apb_pclk            H   c   	   c   
        Mtx rx           u           default         a           W         	  ;disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    baudclk apb_pclk            H   c      c           Mtx rx           u           default         a           W           ;okay          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk            u           default         n         	  ;disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  pwm pclk            u           default         n         	  ;disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  pwm pclk            u           default         n         	  ;disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  pwm pclk            u           default         n         	  ;disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk            u           default         n         	  ;disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  pwm pclk            u           default         n         	  ;disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  pwm pclk            u           default         n         	  ;disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  pwm pclk            u           default         n         	  ;disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk            u           default         n         	  ;disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  pwm pclk            u           default         n         	  ;disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  pwm pclk            u           default         n         	  ;disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  pwm pclk            u           default         n         	  ;disabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    tsadc apb_pclk          <              L         w      V      W        Qtsadc-apb tsadc         	         
            
+            u           
F           gpio otpout         
P         	  ;disabled          adc@fec10000              rockchip,rk3588-saradc                                                    
f           5                    saradc apb_pclk         w      U        Qsaradc-apb        	  ;disabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  C               u           default                      +            ;okay       rtc@51            haoyu,hym8563              Q                    hym8563         default         u                                      
x         i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  D               u           default                      +          	  ;disabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  i2c pclk                  E               u           default                      +          	  ;disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    spiclk apb_pclk         H   c      c           Mtx rx                      u                 default                      +          	  ;disabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                otp apb_pclk phy arb            w                          Qotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        
            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        5      p      	  apb_pclk                          c      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        ref apb         ]          8  w     #          c     d     e     !     "      "  Qphy apb init cmn lane ropll lcpll           h         	  ;disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                ]           5          l     V           refclk immortal pclk utmi         (  w                                     Qinit cmn lane pcs_apb pma_apb           
           
           
           
         	  ;disabled                      phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        ref apb pipe            <             L         ]           w     <     C        Qphy apb         
   &        
         	  ;disabled               j      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        ref apb pipe            <             L         ]           w     >     E        Qphy apb         
   &        
           ;okay               %      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  h                        +                 gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         	        
                        v        	                               gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         	        
                        v        	                    gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         	        
          @             v        	                               gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         	        
          `             v        	                         u      gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         	        
                       v        	                         h      pcfg-pull-up             	                 pcfg-pull-down                            pcfg-pull-none           %                 pcfg-pull-none-drv-level-2           %        2                    pcfg-pull-up-drv-level-1             	        2                    pcfg-pull-up-drv-level-2             	        2                    pcfg-pull-none-smt           %         A                 auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout            V                       {      emmc-bus8           V                                                                                                           |      emmc-clk            V                       }      emmc-cmd            V                        ~      emmc-data-strobe            V                                eth1          fspi          gmac1      gmac1-miim           V                                   o      gmac1-rx-bus2         0  V                              	                 q      gmac1-tx-bus2         0  V                                               p      gmac1-rgmii-clk          V                                   r      gmac1-rgmii-bus       @  V                                                            s         gpu       hdmi          i2c0       i2c0m2-xfer          V                                     '         i2c1       i2c1m2-xfer          V          	             	                       i2c2       i2c2m0-xfer          V          	             	                       i2c3       i2c3m0-xfer          V         	            	                       i2c4       i2c4m0-xfer          V         	            	                       i2c5       i2c5m0-xfer          V         	            	                       i2c6       i2c6m0-xfer          V          	             	                       i2c7       i2c7m0-xfer          V         	            	                       i2c8       i2c8m0-xfer          V         	            	                       i2s0       i2s0-lrck           V                             i2s0-sclk           V                             i2s0-sdi0           V                             i2s0-sdi1           V                             i2s0-sdi2           V                             i2s0-sdi3           V                             i2s0-sdo0           V                             i2s0-sdo1           V                             i2s0-sdo2           V                             i2s0-sdo3           V                                i2s1       i2s1m0-lrck         V                             i2s1m0-sclk         V                             i2s1m0-sdi0         V                             i2s1m0-sdi1         V                             i2s1m0-sdi2         V                             i2s1m0-sdi3         V                             i2s1m0-sdo0         V      	                       i2s1m0-sdo1         V      
                       i2s1m0-sdo2         V                             i2s1m0-sdo3         V                                i2s2       i2s2m1-lrck         V                             i2s2m1-sclk         V                             i2s2m1-sdi          V      
                       i2s2m1-sdo          V                                i2s3       i2s3-lrck           V                             i2s3-sclk           V                             i2s3-sdi            V                             i2s3-sdo            V                                jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p  V                                                                                                                pmu       pwm0       pwm0m0-pins         V                        +      pwm0m2-pins         V                                pwm1       pwm1m0-pins         V                        ,         pwm2       pwm2m0-pins         V                        -         pwm3       pwm3m0-pins         V                        .         pwm4       pwm4m0-pins         V                                 pwm5       pwm5m0-pins         V       	                          pwm6       pwm6m0-pins         V                                 pwm7       pwm7m0-pins         V                                 pwm8       pwm8m0-pins         V                                pwm9       pwm9m0-pins         V                                pwm10      pwm10m0-pins            V                                 pwm11      pwm11m0-pins            V                                pwm12      pwm12m0-pins            V                                pwm13      pwm13m0-pins            V                                pwm14      pwm14m0-pins            V                                pwm15      pwm15m0-pins            V                                refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `  V                                                                                    z         sdmmc      sdmmc-bus4        @  V                                                           y      sdmmc-clk           V                       v      sdmmc-cmd           V                       w      sdmmc-det           V                        x         spdif0        spdif1        spi0       spi0m0-pins       0  V                                                        spi0m0-cs0          V                              spi0m0-cs1          V                                 spi1       spi1m1-pins       0  V                                                     spi1m1-cs0          V                             spi1m1-cs1          V                                spi2       spi2m2-pins       0  V                                                        spi2m2-cs0          V       	                          spi3       spi3m1-pins       0  V                                                     spi3m1-cs0          V                             spi3m1-cs1          V                                spi4       spi4m0-pins       0  V                                                     spi4m0-cs0          V                             spi4m0-cs1          V                                tsadc      tsadc-shut          V                                 uart0      uart0m1-xfer             V                    	                 *         uart1      uart1m1-xfer             V         
            
                       uart2      uart2m0-xfer             V          
             
                       uart3      uart3m1-xfer             V         
            
                       uart4      uart4m1-xfer             V         
            
                       uart5      uart5m1-xfer             V         
            
                       uart6      uart6m1-xfer             V          
            
                       uart7      uart7m1-xfer             V         
            
                       uart8      uart8m1-xfer             V         
            
                       uart9      uart9m0-xfer             V         
            
                       vop       bt656         gpio-func      tsadc-gpio-func         V                                  eth0          gmac0         fan    fan-int         V                                  hym8563    hym8563-int         V                                  pcie2      pcie2-reset         V                        g         pcie3      pcie3-reset         V                              pcie3-reg           V                                 rtl8211f       rtl8211f-rst            V                        t            usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                5                       ref_clk suspend_clk bus_clk         Wotg         _                 dusb2-phy usb3-phy         
  nutmi_wide           -              w     S         ~                                 	  ;disabled          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                         syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                          syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +                 usb2phy@4000              rockchip,rk3588-usb2phy           @                        5             phyclk          usb480m_phy1                                 w     n             Qphy apb       	  ;disabled                  otg-port            ]          	  ;disabled                           i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      5                       mclk_tx mclk_rx hclk            <                           H   c           Mtx          -              w             Qtx-m                      	  ;disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      5     9     9     ?        mclk_tx mclk_rx hclk            <     6                      H   c           Mtx          -              w             Qtx-m                      	  ;disabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      5     +     +     '        mclk_tx mclk_rx hclk            <     (                      H   c           Mrx          -              w             Qrx-m                      	  ;disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    5     &     &     "        mclk_tx mclk_rx hclk            <     #                      H   c           Mrx          -              w             Qrx-m                      	  ;disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  5     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                           sys pmc msg legacy err                                          `  *                                                                                             8            I           X                      `           _         	  dpcie-phy            -      "      T                                                       @      	        @         0     
@        @                                     dbi apb config          w     &     +      	  Qpwr pipe            ;okay            default         u           j   h               d      legacy-interrupt-controller          v                                                                             pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  5     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                              sys pmc msg legacy err                                          `  *                                                                                             8           I           X                    `           _         	  dpcie-phy            -      "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config          w     '     ,      	  Qpwr pipe          	  ;disabled       legacy-interrupt-controller          v                                                                              pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  5     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                sys pmc msg legacy err                                          `  *                                                                                             8           I           X       f               `           _            	  dpcie-phy            -      "      T                                                       @      	       @         0     
@       @                                     dbi apb config          w     (     -      	  Qpwr pipe                         +         	  ;disabled       legacy-interrupt-controller          v                                                                              ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  5     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -      !        w     #      
  Qstmmaceth           h   _           &                                                         	  ;disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           A                                 K           [                    rx-queues-config            k                 queue0        queue1           tx-queues-config                             queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  5     c     `     f     U     p        sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          _            	  dsata-phy                                     phy@fed90000              rockchip,rk3588-usbdp-phy                                ]           5          m     W           refclk immortal pclk utmi         (  w                                     Qinit cmn lane pcs_apb pma_apb           
           
           
           
         	  ;disabled                     phy@fee10000              rockchip,rk3588-naneng-combphy                               5          w     W        ref apb pipe            <             L         ]           w     =     D        Qphy apb         
   &        
         	  ;disabled                     phy@fee80000              rockchip,rk3588-pcie3-phy                                ]            5     y        pclk            w     H        Qphy         
   &        t           ;okay                     pwm-fan           pwm-fan                   _                    (        default         u                                                 P                     vcc3v3-pcie30-regulator           regulator-fixed         vcc3v3_pcie30            2Z         2Z                 p                  default         u                              vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@         LK@           (      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                             $   (                 chosen          serial9:115200n8             	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 ethernet0 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes reset-gpios interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode rx_delay tx_delay reset-assert-us reset-deassert-us snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs spi-max-frequency vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells wakeup-source bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins vpcie3v3-supply rockchip,phy-grf cooling-levels fan-supply pwms enable-active-high startup-delay-us stdout-path 