  hC   8  a   (            k  a                             #    geniatech,xpi-3128 rockchip,rk3128                                   +            7Geniatech XPI-3128     aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/pinctrl/gpio@20088000           U/i2c@20072000            Z/i2c@20056000            _/i2c@2005a000            d/i2c@2005e000            i/serial@20060000             q/serial@20064000             y/serial@20068000             /ethernet@2008c000           /mmc@1021c000            /mmc@10214000         arm-pmu           arm,cortex-a7-pmu         0          L          M          N          O                              cpus                         +             rockchip,rk3036-smp    cpu@f00          cpu           arm,cortex-a7                          @                                                                                 cpu@f01          cpu           arm,cortex-a7                                                          cpu@f02          cpu           arm,cortex-a7                                                          cpu@f03          cpu           arm,cortex-a7                                                             opp-table-0           operating-points-v2          #              opp-216000000           .             5 ~ ~ 7      opp-408000000           .    Q         5 ~ ~ 7      opp-600000000           .    #F         5 ~ ~ 7      opp-696000000           .    )|         5   7      opp-816000000           .    0,         5 g8 g8 7         C      opp-1008000000          .    <         5 O O 7      opp-1200000000          .    G         5 7 7 7         display-subsystem             rockchip,display-subsystem          O   	        Uokay          opp-table-1           operating-points-v2            
   opp-200000000           .             5         opp-300000000           .             5         opp-400000000           .    ׄ         5 0 0       opp-480000000           .    8         5            timer             arm,armv7-timer       0                                 
           \        n6       oscillator            fixed-clock         n6         xin24m                         *      sram@10080000         
    mmio-sram                                       +                        smp-sram@0            rockchip,rk3066-smp-sram                             gpu@10090000          "    rockchip,rk3128-mali arm,mali-400            	           H                                                                       gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core                
               x                      Uokay                     syscon@100a0000       &    rockchip,rk3128-pmu syscon simple-mfd            
        power-controller          !    rockchip,rk3128-power-controller                                    +                  power-domain@1                                                                        E                                             z                                         power-domain@2                    (                                                            power-domain@3                                                                vop@1010e000              rockchip,rk3126-vop                              	                                     aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk                          Uokay       port                         +               	   endpoint@0                                     0            qos@1012d000              rockchip,rk3128-qos syscon                                 qos@1012e000              rockchip,rk3128-qos syscon                                 qos@1012f000              rockchip,rk3128-qos syscon                                 qos@1012f080              rockchip,rk3128-qos syscon                                qos@1012f100              rockchip,rk3128-qos syscon                                 qos@1012f180              rockchip,rk3128-qos syscon                                qos@1012f200              rockchip,rk3128-qos syscon                                 interrupt-controller@10139000             arm,cortex-a7-gic                                              	           $        9                                 usb@10180000          2    rockchip,rk3128-usb rockchip,rk3066-usb snps,dwc2                                 
                         otg         Jotg         R           d          s            @                        	  usb2-phy            Uokay                                usb@101c0000              generic-ehci                                                                      usb         Uokay          usb@101e0000              generic-ohci                                                                       usb       	  Udisabled          mmc@10214000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !@   @                                         D      r      v        biu ciu ciu-drive ciu-sample                  
        rx-tx                      р               Q        reset           Uokay                                  default                                                         &      mmc@10218000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         E      s      w        biu ciu ciu-drive ciu-sample                          rx-tx                      р               R        reset         	  Udisabled          mmc@1021c000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         G      u      y        biu ciu ciu-drive ciu-sample                          rx-tx                      р               S        reset           Uokay                                  default                   !         .         @         M         &      nand-controller@10500000          (    rockchip,rk3128-nfc rockchip,rk2928-nfc          P    @                                        C        ahb nfc         default             "   #   $   %   &   '   (   )      	  Udisabled          clock-controller@20000000             rockchip,rk3128-cru                             *        xin24m          S   +                   `           m              }#g                 syscon@20008000       &    rockchip,rk3128-grf syscon simple-mfd                                       +              +   usb2phy@17c           rockchip,rk3128-usb2phy            |                          phyclk          usb480m_phy         m                 ,                    Uokay               ,   host-port                   5         
  linestate                       Uokay                     otg-port          $          #          3          4           otg-bvalid otg-id linestate                     Uokay                           hdmi@20034000             rockchip,rk3128-inno-hdmi             @   @                 -                 G            	  pclk ref            default            -   .   /                      Uokay       ports                        +       port@0                  endpoint               0                    port@1                 endpoint               1           L               timer@20044000        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      U        pclk timer        timer@20044020        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      V        pclk timer        timer@20044040        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @@                    ;                 a      W        pclk timer        timer@20044060        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @`                    <                 a      X        pclk timer        timer@20044080        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    =                 a      Y        pclk timer        timer@200440a0        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    >                 a      Z        pclk timer        watchdog@2004c000              rockchip,rk3128-wdt snps,dw-wdt                               "                 ?      	  Udisabled          pwm@20050000          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            2                 	  Udisabled          pwm@20050010          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                             ^        default            3                   Uokay               X      pwm@20050020          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            4                   Uokay               Y      pwm@20050030          (    rockchip,rk3128-pwm rockchip,rk3288-pwm            0                 ^        default            5                 	  Udisabled          i2c@20056000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c           `                               i2c               M        default            6                     +          	  Udisabled          i2c@2005a000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               N        default            7                     +          	  Udisabled          i2c@2005e000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               O        default            8                     +          	  Udisabled          serial@20060000       &    rockchip,rk3128-uart snps,dw-apb-uart                                             n6                M     U        baudclk apb_pclk                                tx rx           default            9   :   ;                            	  Udisabled          serial@20064000       &    rockchip,rk3128-uart snps,dw-apb-uart             @                               n6                N     V        baudclk apb_pclk                                tx rx           default            <                              Uokay          serial@20068000       &    rockchip,rk3128-uart snps,dw-apb-uart                                            n6                O     W        baudclk apb_pclk                                tx rx           default            =                            	  Udisabled          saradc@2006c000           rockchip,saradc                                                 [     >        saradc apb_pclk                W        saradc-apb                     Uokay                          K      i2c@20072000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                           i2c               L        default            >                     +          	  Udisabled          spi@20074000          (    rockchip,rk3128-spi rockchip,rk3066-spi           @                                      A     R        spiclk apb_pclk                     	        tx rx           default            ?   @   A   B   C                     +          	  Udisabled          dma-controller@20078000           arm,pl330 arm,primecell              @                                                                      	  apb_pclk            &                    ethernet@2008c000             rockchip,rk3128-gmac                 @                 8          9           macirq eth_wake_irq       8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth           S   +        1           ?           Uokay            Moutput          Z   D        ermii            n   E        m      |        }        default            F   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                      y   d           
                      G              default            H           E            pinctrl           rockchip,rk3128-pinctrl         S   +                     +               gpio@2007c000             rockchip,gpio-bank                                $                 @                             $        9             HEADER_5 HEADER_3     HEADER_22 HEADER_23  HEADER_19 HEADER_26 HEADER_21 HEADER_24   HEADER_18       HEADER_36      HEADER_13                Q      gpio@20080000             rockchip,gpio-bank                                 %                 A                             $        9         p  HEADER_7 HEADER_35 HEADER_33 HEADER_37 HEADER_40 HEADER_38   HEADER_11   HEADER_29 HEADER_31                               U      gpio@20084000             rockchip,gpio-bank            @                    &                 B                             $        9         :                      HEADER_27      HEADER_8 HEADER_10                  G      gpio@20088000             rockchip,gpio-bank                                '                 C                             $        9         ;                   HEADER_32      HEADER_12    HEADER_15                 M      pcfg-pull-default                       J      pcfg-pull-none                      I      emmc       emmc-clk                         I                 emmc-cmd                         J                  emmc-cmd1                        J      emmc-pwr                         J      emmc-bus1                        J      emmc-bus4         @               J            J            J            J      emmc-bus8                        J            J            J            J            J            J            J            J           !         gmac       rgmii-pins                       J      	      J            J            J            J            J            J            J            J            J            J            J            J            J            J      rmii-pins                        J            J            J            J            J            J            J            J            J            J           F         hdmi       hdmii2c-xfer                           I             I           -      hdmi-hpd                          I           .      hdmi-cec                          I           /         i2c0       i2c0-xfer                           I             I           >         i2c1       i2c1-xfer                          I             I           6         i2c2       i2c2-xfer                         I            I           7         i2c3       i2c3-xfer                          I             I           8         i2s    i2s-bus       `                I       	      I             I             I             I             I      i2s1-bus          `                I            I            I            I            I            I         lcdc       lcdc-dclk                        I      lcdc-den                         I      lcdc-hsync                 	      I      lcdc-vsync                 
      I      lcdc-rgb24                       I            I            I            I            I            I            I            I            I            I            I            I            I            I         nfc    flash-ale                         I           "      flash-cle                        I           $      flash-wrn                        I           )      flash-rdn                        I           '      flash-rdy                        I           (      flash-cs0                        I           %      flash-dqs                        I           &      flash-bus8                       I            I            I            I            I            I            I            I           #         pwm0       pwm0-pin                          I           2         pwm1       pwm1-pin                          I           3         pwm2       pwm2-pin                          I           4         pwm3       pwm3-pin                         I           5         sdio       sdio-clk                          I      sdio-cmd                          J      sdio-pwren                        J      sdio-bus4         @               J            J            J            J         sdmmc      sdmmc-clk                        I                 sdmmc-cmd                        J                 sdmmc-det                        J                 sdmmc-wp                         J      sdmmc-pwren                       J           V      sdmmc-bus4        @               J            J            J            J                    spdif      spdif-tx                         I         spi0       spi0-clk                         J           A      spi0-cs0                         J           B      spi0-tx                	      J           ?      spi0-rx                
      J           @      spi0-cs1                         J           C      spi1-clk                          J      spi1-cs0                         J      spi1-tx                      J      spi1-rx                      J      spi1-cs1                         J      spi2-clk                    	      J      spi2-cs0                          J      spi2-tx                       J      spi2-rx                       J         uart0      uart0-xfer                        J            I           9      uart0-cts                        I           :      uart0-rts                         I           ;         uart1      uart1-xfer                  	      J      
      J           <      uart1-cts                        I      uart1-rts                        I         uart2      uart2-xfer                        J            I           =      uart2-cts                         I      uart2-rts                         I         dp83848c       dp83848c-rst                          I           H         ir-receiver    ir-int                        I           P         leds       power-led                          I           R      spd-led                       I           S         usb2       host-drv                          I           O            memory@60000000          memory           `   @         chosen          /serial@20064000          adc-keys          	    adc-keys               K           &buttons         7 2Z   button-recovery       	  QRecovery            W  h        b             dc-5v-regulator           regulator-fixed         |DC_5V            LK@         LK@                             N      hdmi-connnector           hdmi-connector           a      port       endpoint               L           1            host-pwr-5v-regulator             regulator-fixed            M                         |HOST_PWR_5V          LK@         LK@           N        default            O                        ir-receiver           gpio-ir-receiver               M              default            P      leds          
    gpio-leds      led-power              Q               power                      $on          default            R      led-spd            M              lan                    default            S         mcu3v3-regulator              regulator-fixed         |MCU3V3           2Z         2Z                                   vcc-ddr-regulator             regulator-fixed         |VCC_DDR          `         `           T                        vcc-io-regulator              regulator-fixed         |VCC_IO           2Z         2Z           T                                   vcc-lan-regulator             regulator-fixed         |VCC_LAN          2Z         2Z                                        D      vcc-sd-regulator              regulator-fixed            U                        |VCC_SD           2Z         2Z                   default            V                 vcc-sys-regulator             regulator-fixed         |VCC_SYS          LK@         LK@           N                             T      vcc33-hdmi-regulator              regulator-fixed         |VCC33_HDMI           2Z         2Z           W                        vcca-33-regulator             regulator-fixed         |VCCA_33          2Z         2Z           T                             W      vdd-11-regulator              regulator-fixed         |VDD_11                               T                                   vdd11-hdmi-regulator              regulator-fixed         |VDD11_HDMI                                                       vdd-arm-regulator             pwm-regulator           |VDD_ARM         2   X      a           7   T                  \                                   vdd-log-regulator             pwm-regulator           |VDD_LOG         2   Y      a           B      d        7   T                  \        V                                        	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 ethernet0 mmc0 mmc1 interrupts interrupt-affinity enable-method device_type reg clock-latency clocks resets operating-points-v2 #cooling-cells cpu-supply phandle opp-shared opp-hz opp-microvolt opp-suspend ports status arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names clock-names power-domains mali-supply #power-domain-cells pm_qos reset-names remote-endpoint interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names vusb_a-supply vusb_d-supply dmas dma-names fifo-depth max-frequency bus-width vmmc-supply pinctrl-names pinctrl-0 disable-wp cap-sd-highspeed no-mmc no-sdio cap-mmc-highspeed mmc-ddr-3_3v no-sd rockchip,grf #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents #phy-cells #pwm-cells reg-io-width reg-shift #io-channel-cells vref-supply arm,pl330-broken-no-flushp arm,pl330-periph-burst #dma-cells rx-fifo-depth tx-fifo-depth clock_in_out phy-supply phy-mode phy-handle max-speed reset-assert-us reset-deassert-us reset-gpios gpio-controller #gpio-cells gpio-line-names bias-pull-pin-default bias-disable rockchip,pins stdout-path io-channels io-channel-names keyup-threshold-microvolt label linux,code press-threshold-microvolt regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on gpio startup-delay-us vin-supply enable-active-high function color default-state pwms pwm-supply pwm-dutycycle-range regulator-ramp-delay 