  V   8  Q   (            `  Qp                             $    rockchip,rk3128-evb rockchip,rk3128                                  +         !   7Rockchip RK3128 Evaluation board       aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/pinctrl/gpio@20088000           U/i2c@20072000            Z/i2c@20056000            _/i2c@2005a000            d/i2c@2005e000            i/serial@20060000             q/serial@20064000             y/serial@20068000             /mmc@1021c000         arm-pmu           arm,cortex-a7-pmu         0          L          M          N          O                              cpus                         +             rockchip,rk3036-smp    cpu@f00          cpu           arm,cortex-a7                          @                                                                       cpu@f01          cpu           arm,cortex-a7                                                          cpu@f02          cpu           arm,cortex-a7                                                          cpu@f03          cpu           arm,cortex-a7                                                             opp-table-0           operating-points-v2          	              opp-216000000                         ~ ~ 7      opp-408000000               Q          ~ ~ 7      opp-600000000               #F          ~ ~ 7      opp-696000000               )|            7      opp-816000000               0,          g8 g8 7         )      opp-1008000000              <          O O 7      opp-1200000000              G          7 7 7         display-subsystem             rockchip,display-subsystem          5         	  ;disabled          opp-table-1           operating-points-v2            	   opp-200000000                                 opp-300000000                                 opp-400000000               ׄ          0 0       opp-480000000               8                     timer             arm,armv7-timer       0                                 
           B        fn6       oscillator            fixed-clock         fn6         vxin24m                         "      sram@10080000         
    mmio-sram                                       +                        smp-sram@0            rockchip,rk3066-smp-sram                             gpu@10090000          "    rockchip,rk3128-mali arm,mali-400            	           H                                                                       gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core                	               x           
         	  ;disabled          syscon@100a0000       &    rockchip,rk3128-pmu syscon simple-mfd            
        power-controller          !    rockchip,rk3128-power-controller                                    +               
   power-domain@1                                                                        E                                             z                                         power-domain@2                    (                                                            power-domain@3                                                                vop@1010e000              rockchip,rk3126-vop                              	                                     aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk               
         	  ;disabled       port                         +                  endpoint@0                                     (            qos@1012d000              rockchip,rk3128-qos syscon                                 qos@1012e000              rockchip,rk3128-qos syscon                                 qos@1012f000              rockchip,rk3128-qos syscon                                 qos@1012f080              rockchip,rk3128-qos syscon                                qos@1012f100              rockchip,rk3128-qos syscon                                 qos@1012f180              rockchip,rk3128-qos syscon                                qos@1012f200              rockchip,rk3128-qos syscon                                 interrupt-controller@10139000             arm,cortex-a7-gic                                              	                                                    usb@10180000          2    rockchip,rk3128-usb rockchip,rk3066-usb snps,dwc2                                 
                         otg         $otg         ,           >          M            @               \         	  ausb2-phy            ;okay            k         usb@101c0000              generic-ehci                                                           \           ausb         ;okay          usb@101e0000              generic-ohci                                                            \           ausb         ;okay          mmc@10214000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !@   @                                         D      r      v        biu ciu ciu-drive ciu-sample            w      
        |rx-tx                      р               Q        reset         	  ;disabled          mmc@10218000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         E      s      w        biu ciu ciu-drive ciu-sample            w              |rx-tx                      р               R        reset         	  ;disabled          mmc@1021c000          0    rockchip,rk3128-dw-mshc rockchip,rk3288-dw-mshc          !   @                                         G      u      y        biu ciu ciu-drive ciu-sample            w              |rx-tx                      р               S        reset           ;okay                       default                        nand-controller@10500000          (    rockchip,rk3128-nfc rockchip,rk2928-nfc          P    @                                        C        ahb nfc         default                                   !      	  ;disabled          clock-controller@20000000             rockchip,rk3128-cru                             "        xin24m             #                                            #g                 syscon@20008000       &    rockchip,rk3128-grf syscon simple-mfd                                       +              #   usb2phy@17c           rockchip,rk3128-usb2phy            |                          phyclk          vusb480m_phy                           $                    ;okay               $   host-port                   5         
  linestate                       ;okay                     otg-port          $          #          3          4           otg-bvalid otg-id linestate                     ;okay                           hdmi@20034000             rockchip,rk3128-inno-hdmi             @   @                 -                 G            	  pclk ref            default            %   &   '           
         	  ;disabled       ports                        +       port@0                  endpoint               (                    port@1                          timer@20044000        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      U        pclk timer        timer@20044020        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                                      a      V        pclk timer        timer@20044040        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @@                    ;                 a      W        pclk timer        timer@20044060        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @`                    <                 a      X        pclk timer        timer@20044080        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    =                 a      Y        pclk timer        timer@200440a0        ,    rockchip,rk3128-timer rockchip,rk3288-timer           @                    >                 a      Z        pclk timer        watchdog@2004c000              rockchip,rk3128-wdt snps,dw-wdt                               "                 ?      	  ;disabled          pwm@20050000          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            )        "         	  ;disabled          pwm@20050010          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                             ^        default            *        "         	  ;disabled          pwm@20050020          (    rockchip,rk3128-pwm rockchip,rk3288-pwm                              ^        default            +        "         	  ;disabled          pwm@20050030          (    rockchip,rk3128-pwm rockchip,rk3288-pwm            0                 ^        default            ,        "         	  ;disabled          i2c@20056000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c           `                               i2c               M        default            -                     +            ;okay       rtc@51            haoyu,hym8563               Q                    vxin32k           i2c@2005a000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               N        default            .                     +          	  ;disabled          i2c@2005e000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                          i2c               O        default            /                     +          	  ;disabled          serial@20060000       &    rockchip,rk3128-uart snps,dw-apb-uart                                             fn6                M     U        baudclk apb_pclk            w                    |tx rx           default            0   1   2        -           :         	  ;disabled          serial@20064000       &    rockchip,rk3128-uart snps,dw-apb-uart             @                               fn6                N     V        baudclk apb_pclk            w                    |tx rx           default            3        -           :         	  ;disabled          serial@20068000       &    rockchip,rk3128-uart snps,dw-apb-uart                                            fn6                O     W        baudclk apb_pclk            w                    |tx rx           default            4        -           :         	  ;disabled          saradc@2006c000           rockchip,saradc                                                 [     >        saradc apb_pclk                W        saradc-apb          D         	  ;disabled          i2c@20072000          (    rockchip,rk3128-i2c rockchip,rk3288-i2c                                           i2c               L        default            5                     +          	  ;disabled          spi@20074000          (    rockchip,rk3128-spi rockchip,rk3066-spi           @                                      A     R        spiclk apb_pclk         w            	        |tx rx           default            6   7   8   9   :                     +          	  ;disabled          dma-controller@20078000           arm,pl330 arm,primecell              @                                        V         q                     	  apb_pclk                                ethernet@2008c000             rockchip,rk3128-gmac                 @                 8          9           macirq eth_wake_irq       8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth              #                            	  ;disabled       mdio              snps,dwmac-mdio                      +             pinctrl           rockchip,rk3128-pinctrl            #                     +               gpio@2007c000             rockchip,gpio-bank                                $                 @                                                   =      gpio@20080000             rockchip,gpio-bank                                 %                 A                                              gpio@20084000             rockchip,gpio-bank            @                    &                 B                                                   ?      gpio@20088000             rockchip,gpio-bank                                '                 C                                              pcfg-pull-default                       <      pcfg-pull-none                      ;      emmc       emmc-clk                        ;                 emmc-cmd                        <                 emmc-cmd1                       <      emmc-pwr                        <      emmc-bus1                       <      emmc-bus4         @              <            <            <            <      emmc-bus8                       <            <            <            <            <            <            <            <                    gmac       rgmii-pins                      <      	      <            <            <            <            <            <            <            <            <            <            <            <            <            <      rmii-pins                       <            <            <            <            <            <            <            <            <            <         hdmi       hdmii2c-xfer                          ;             ;           %      hdmi-hpd                         ;           &      hdmi-cec                         ;           '         i2c0       i2c0-xfer                          ;             ;           5         i2c1       i2c1-xfer                         ;             ;           -         i2c2       i2c2-xfer                        ;            ;           .         i2c3       i2c3-xfer                         ;             ;           /         i2s    i2s-bus       `               ;       	      ;             ;             ;             ;             ;      i2s1-bus          `               ;            ;            ;            ;            ;            ;         lcdc       lcdc-dclk                       ;      lcdc-den                        ;      lcdc-hsync                	      ;      lcdc-vsync                
      ;      lcdc-rgb24                      ;            ;            ;            ;            ;            ;            ;            ;            ;            ;            ;            ;            ;            ;         nfc    flash-ale                        ;                 flash-cle                       ;                 flash-wrn                       ;           !      flash-rdn                       ;                 flash-rdy                       ;                  flash-cs0                       ;                 flash-dqs                       ;                 flash-bus8                      ;            ;            ;            ;            ;            ;            ;            ;                    pwm0       pwm0-pin                         ;           )         pwm1       pwm1-pin                         ;           *         pwm2       pwm2-pin                         ;           +         pwm3       pwm3-pin                        ;           ,         sdio       sdio-clk                         ;      sdio-cmd                         <      sdio-pwren                       <      sdio-bus4         @              <            <            <            <         sdmmc      sdmmc-clk                       ;      sdmmc-cmd                       <      sdmmc-det                       <      sdmmc-wp                        <      sdmmc-pwren                      <      sdmmc-bus4        @              <            <            <            <         spdif      spdif-tx                        ;         spi0       spi0-clk                        <           8      spi0-cs0                        <           9      spi0-tx               	      <           6      spi0-rx               
      <           7      spi0-cs1                        <           :      spi1-clk                         <      spi1-cs0                        <      spi1-tx                     <      spi1-rx                     <      spi1-cs1                        <      spi2-clk                   	      <      spi2-cs0                         <      spi2-tx                      <      spi2-rx                      <         uart0      uart0-xfer                       <            ;           0      uart0-cts                       ;           1      uart0-rts                        ;           2         uart1      uart1-xfer                 	      <      
      <           3      uart1-cts                       ;      uart1-rts                       ;         uart2      uart2-xfer                       <            ;           4      uart2-cts                        ;      uart2-rts                        ;         usb-host       host-vbus-drv                        ;           @         usb-otg    otg-vbus-drv                          ;           >            chosen          /serial@20068000          memory@60000000          memory           `   @         vcc5v0-otg-regulator              regulator-fixed            =               default            >        vcc5v0_otg           LK@        4 LK@                 vcc5v0-host-regulator             regulator-fixed            ?               default            @        vcc5v0_host          L         LK@        4 LK@         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 mmc0 interrupts interrupt-affinity enable-method device_type reg clock-latency clocks resets operating-points-v2 #cooling-cells phandle opp-shared opp-hz opp-microvolt opp-suspend ports status arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names clock-names power-domains #power-domain-cells pm_qos reset-names remote-endpoint interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names vbus-supply dmas dma-names fifo-depth max-frequency bus-width pinctrl-names pinctrl-0 rockchip,grf #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents #phy-cells #pwm-cells reg-io-width reg-shift #io-channel-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst #dma-cells rx-fifo-depth tx-fifo-depth gpio-controller #gpio-cells bias-pull-pin-default bias-disable rockchip,pins stdout-path gpio regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on 