  :   8  58   (              5                              #    raspberrypi,5-model-b brcm,bcm2712                                   &            7Raspberry Pi 5     clocks     clk-osc           fixed-clock          =             Josc          ]7         m         clk-vpu           fixed-clock          =             ],      
   Jvpu-clock            m         clk-uart              fixed-clock          =             ]           Juart-clock           m   
      clk-emmc2             fixed-clock          =             ]          Jemmc2-clock          m            cpus                                      m      cpu@0            ucpu           arm,cortex-a76                        psci                            @                                    @                                 m      l2-cache              cache                           @                                                      m            cpu@1            ucpu           arm,cortex-a76                       psci                            @                                    @                                 m       l2-cache              cache                           @                                                      m            cpu@2            ucpu           arm,cortex-a76                       psci                            @                                    @                                 m   !   l2-cache              cache                           @                                                      m            cpu@3            ucpu           arm,cortex-a76                       psci                            @                                    @                                 m   "   l2-cache              cache                           @                                                      m            l3-cache              cache                            @                                          m            psci             smc           arm,psci-1.0 arm,psci-0.2         reserved-memory                                           m   #   atf@0                                          linux,cma             shared-dma-pool                          $         -        ?            @            m   $         soc@107c000000            simple-bus                                                         m   %   reset-controller@119500           brcm,bcm7216-pcie-sata-rescal                         L             m         mmc@fff000        &    brcm,bcm2712-sdhci brcm,sdhci-brcmstb                `           	  Yhost cfg            c                 n           usw_sdio                                	                                               m   &      reset-controller@1504318              brcm,brcmstb-reset           PC   0        L            m         timer@7c003000            brcm,bcm2835-system-timer            | 0          0  c       @          A          B          C            ] B@         m   '      mailbox@7c013880              brcm,bcm2835-mbox            |8   @        c       !                        m         serial@7d001000           arm,pl011 arm,primecell          }             c       y           n   
           uuartclk apb_pclk             4        okay             m   (      interrupt-controller@7d517000             brcm,bcm7271-l2-intc             }Qp            c                                    gpio@7d517c00         $    brcm,bcm7445-gpio brcm,brcmstb-gpio          }Q|    @         )        9           E              [RP1_SDA RP1_SCL RP1_RUN SD_IOVDD_SEL SD_PWR_ON SD_CDET_N SD_FLG_N  2712_WAKE 2712_STAT_LED   PMIC_INT UART_TX_FS UART_RX_FS                  HDMI0_SCL HDMI0_SDA HDMI1_SCL HDMI1_SDA PMIC_SCL PMIC_SDA           m         interrupt-controller@7fff9000             arm,gic-400                                                           m         interrupt-controller@7d510600         "    brcm,bcm2711-l2-intc brcm,l2-intc            }Q    0        c                                       m         pixelvalve@7c410000           brcm,bcm2712-pixelvalve0             |A             c       e            m   )      pixelvalve@7c411000           brcm,bcm2712-pixelvalve1             |A            c       n            m   *      mop@7c500000              brcm,bcm2712-mop             |P     (         &           c            m   +      moplet@7c501000           brcm,bcm2712-moplet          |P              &           c             m   ,      interrupt-controller@7c502000         "    brcm,bcm2711-l2-intc brcm,l2-intc            |P     0        c       a                                m         clock@7c700000            brcm,brcm2711-dvp            |p             n            =           L            m         i2c@7d508200              brcm,brcmstb-i2c             }P    X         &           c            ] |                                  m         i2c@7d508280              brcm,brcmstb-i2c             }P   X         &           c            ] |                                  m         interrupt-controller@7d508380             brcm,bcm7271-l2-intc             }P           c                                       m         interrupt-controller@7d508400             brcm,bcm7271-l2-intc             }P            c                                       m   -      hdmi@7c701400             brcm,bcm2712-hdmi0        H   |p    |p    |p    |p     |p8    |p@    |p    }Q    |r           +  Yhdmi dvp phy rm packet metadata csc cec hd          k               &           c                     0  rcec-tx cec-rx cec-low hpd-connected hpd-removed                    n                              uhdmi bvb audio cec           m   .      hdmi@7c706400             brcm,bcm2712-hdmi1        H   |pd    |p`    |pm    |pp    |p    |p    |p   }Q    |r           +  Yhdmi dvp phy rm packet metadata csc cec hd          k               &           c                     0  rcec-tx cec-rx cec-low hpd-connected hpd-removed                    n                             uhdmi bvb audio cec           m   /      firmware          (    raspberrypi,bcm2835-firmware simple-mfd                                                      m      clocks            raspberrypi,firmware-clocks          =            m         reset             raspberrypi,firmware-reset          L            m   0         power             raspberrypi,bcm2835-power                                  m   1         axi           simple-bus                                x                                                                                                                   x                                                                                                                      m   2   gpu           brcm,bcm2712-vc6             m   3      pcie@1000100000           brcm,bcm2712-pcie                                 upci                                                                               &           c                          	  rpcie msi                                                                                                                                                           k         *         rescal bridge                             8                        C                                C                               	  disabled             m         pcie@1000110000           brcm,bcm2712-pcie                                 upci                                                                              &           c                          	  rpcie msi                                                                                                                                                           k         +         rescal bridge                             8                        C                              8                                                      okay             m   4      pcie@1000120000           brcm,bcm2712-pcie                                 upci                                                                              &           c                          	  rpcie msi                                                                                                                                                           k         ,         rescal bridge                             8                        C                              T                         @  C                                                     okay             m   5      msi-controller@1000130000             brcm,bcm2712-mip                                                       &                @        1             m         msi-controller@1000131000             brcm,bcm2712-mip                                                      &                        1            m            timer             arm,armv8-timer       <  c                              
                clk-27M          =              fixed-clock          ]         J27MHz-clock          m         clk-108M             =              fixed-clock          ]o          J108MHz-clock             m         hvs@107c580000            brcm,bcm2712-hvs                |X                 &           c      	           rch0-eof ch1-eof ch2-eof         n                  
  ucore disp            m   6      aliases          A/soc@107c000000/serial@7d001000       chosen          Jserial10:115200n8            m   7      memory@0             umemory                       (         sd-io-1v8-reg             regulator-gpio        
  Vvdd-sd-io           e w@        } 2Z                                                       w@    2Z             m         sd-vcc-reg            regulator-fixed         Vvcc-sd          e 2Z        } 2Z                                             m   	      __symbols__         /clocks/clk-osc         /clocks/clk-vpu         /clocks/clk-uart            /clocks/clk-emmc2           /cpus           /cpus/cpu@0         #/cpus/cpu@0/l2-cache            //cpus/cpu@1         4/cpus/cpu@1/l2-cache            @/cpus/cpu@2         E/cpus/cpu@2/l2-cache            Q/cpus/cpu@3         V/cpus/cpu@3/l2-cache            b/cpus/l3-cache          k/reserved-memory            p/reserved-memory/linux,cma          t/soc@107c000000       (  x/soc@107c000000/reset-controller@119500         /soc@107c000000/mmc@fff000        )  /soc@107c000000/reset-controller@1504318            /soc@107c000000/timer@7c003000        !  /soc@107c000000/mailbox@7c013880             /soc@107c000000/serial@7d001000         /soc@107c000000/gpio@7d517c00         .  /soc@107c000000/interrupt-controller@7fff9000         .  /soc@107c000000/interrupt-controller@7d510600         $  /soc@107c000000/pixelvalve@7c410000       $  /soc@107c000000/pixelvalve@7c411000         /soc@107c000000/mop@7c500000             /soc@107c000000/moplet@7c501000       .  /soc@107c000000/interrupt-controller@7c502000           /soc@107c000000/clock@7c700000          /soc@107c000000/i2c@7d508200            /soc@107c000000/i2c@7d508280          .  /soc@107c000000/interrupt-controller@7d508380         .  
/soc@107c000000/interrupt-controller@7d508400           /soc@107c000000/hdmi@7c701400           /soc@107c000000/hdmi@7c706400           /soc@107c000000/firmware             /soc@107c000000/firmware/clocks         /soc@107c000000/firmware/reset          //soc@107c000000/power           5/axi          	  9/axi/gpu            =/axi/pcie@1000100000            C/axi/pcie@1000110000            I/axi/pcie@1000120000            O/axi/msi-controller@1000130000          T/axi/msi-controller@1000131000        	  Y/clk-27M          
  c/clk-108M           n/hvs@107c580000         r/chosen         y/sd-io-1v8-reg          /sd-vcc-reg          	compatible #address-cells #size-cells interrupt-parent model #clock-cells clock-output-names clock-frequency phandle device_type reg enable-method d-cache-size d-cache-line-size d-cache-sets i-cache-size i-cache-line-size i-cache-sets next-level-cache cache-level cache-unified ranges no-map reusable linux,cma-default alloc-ranges #reset-cells reg-names interrupts clocks clock-names mmc-ddr-3_3v vqmmc-supply vmmc-supply bus-width sd-uhs-sdr50 sd-uhs-ddr50 sd-uhs-sdr104 #mbox-cells arm,primecell-periphid status interrupt-controller #interrupt-cells gpio-controller #gpio-cells brcm,gpio-bank-widths gpio-line-names resets interrupt-names ddc mboxes dma-ranges firmware #power-domain-cells linux,pci-domain max-link-speed num-lanes interrupt-map-mask interrupt-map reset-names msi-controller msi-parent msi-ranges brcm,msi-offset serial10 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-settling-time-us gpios states enable-active-high clk_osc clk_vpu clk_uart clk_emmc2 cpus cpu0 l2_cache_l0 cpu1 l2_cache_l1 cpu2 l2_cache_l2 cpu3 l2_cache_l3 l3_cache rmem cma soc pcie_rescal sdio1 bcm_reset system_timer mailbox uart10 gio_aon gicv2 aon_intr pixelvalve0 pixelvalve1 mop moplet disp_intr dvp ddc0 ddc1 bsc_irq main_irq hdmi0 hdmi1 firmware_clocks power axi vc4 pcie0 pcie1 pcie2 mip0 mip1 clk_27MHz clk_108MHz hvs chosen sd_io_1v8_reg sd_vcc_reg 