     8  x   (            *  @                             3    samsung,exynosautov920-sadk samsung,exynosautov920                                   &         "   7Samsung ExynosAutov920 SADK board      aliases          =/soc@0/pinctrl@11850000          F/soc@0/pinctrl@1a460000          O/soc@0/pinctrl@16040000          X/soc@0/pinctrl@16450000          a/soc@0/pinctrl@16c10000          j/soc@0/pinctrl@16d20000          s/soc@0/pinctrl@10830000          |/soc@0/pinctrl@10c30000       $   /soc@0/usi@108800c0/serial@10880000       arm-pmu           arm,cortex-a78-pmu                          clock             fixed-clock                       oscclk           I                   cpus                                cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	         cluster2       core0               
      core1                           cpu@0            cpu           arm,cortex-a78ae                              psci                            @                              +   @        =           J                     cpu@100          cpu           arm,cortex-a78ae                             psci                            @                              +   @        =           J                     cpu@200          cpu           arm,cortex-a78ae                             psci                            @                              +   @        =           J                     cpu@300          cpu           arm,cortex-a78ae                             psci                            @                              +   @        =           J                     cpu@10000            cpu           arm,cortex-a78ae                             psci                            @                              +   @        =           J                     cpu@10100            cpu           arm,cortex-a78ae                            psci                            @                              +   @        =           J                     cpu@10200            cpu           arm,cortex-a78ae                            psci                            @                              +   @        =           J                     cpu@10300            cpu           arm,cortex-a78ae                            psci                            @                              +   @        =           J               	      cpu@20000            cpu           arm,cortex-a78ae                             psci                            @                              +   @        =           J               
      cpu@20100            cpu           arm,cortex-a78ae                            psci                            @                              +   @        =           J                     l2-cache0             cache           [            g                       @                   J                     l2-cache1             cache           [            g                       @                   J                     l2-cache2             cache           [            g                       @                   J                     l3-cache0             cache           [            g                        @                             l3-cache1             cache           [            g                        @                             l3-cache2             cache           [            g                       @          U                     psci              arm,psci-1.0             smc       soc@0             simple-bus                                  u                   chipid@10000000       7    samsung,exynosautov920-chipid samsung,exynos850-chipid                 $      clock-controller@10020000              samsung,exynosautov920-cmu-misc                                   |                 oscclk noc                    watchdog@10060000             samsung,exynosautov920-wdt                                          |              watchdog watchdog_src                                watchdog@10070000             samsung,exynosautov920-wdt                                          |              watchdog watchdog_src                               interrupt-controller@10400000             arm,gic-v3                                            @     F                    	                     dma-controller@10180000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@10190000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@101a0000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@101b0000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@101c0000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@101d0000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     dma-controller@101e0000           arm,pl330 arm,primecell                                         |            	  apb_pclk                     clock-controller@10800000         "    samsung,exynosautov920-cmu-peric0                                     |                       oscclk noc ip                     syscon@10820000       ,    samsung,exynosautov920-peric0-sysreg syscon                                  pinctrl@10830000              samsung,exynosautov920-pinctrl                                     gpg0-gpio-bank                                                gpg2-gpio-bank                                                gpg3-gpio-bank                                                gpg4-gpio-bank                                                gpg5-gpio-bank                                                gpp0-gpio-bank                                                gpp1-gpio-bank                                                gpp2-gpio-bank                                                gpp3-gpio-bank                                                gpp4-gpio-bank                                                pwm-tout0-pins          	gpg0-0                     +                !      pwm-tout1-pins          	gpg0-1                     +          pwm-tout2-pins          	gpg0-2                     +          pwm-tout3-pins          	gpg0-3                     +          uart0-bus-pins          	gpp0-0 gpp0-1 gpp0-2 gpp0-3                    +                      uart0-bus-dual-pins         	gpp0-0 gpp0-1                      +          uart1-bus-pins          	gpp0-4 gpp0-5 gpp0-6 gpp0-7                    +                      uart1-bus-dual-pins         	gpp0-4 gpp0-5                      +          uart2-bus-pins          	gpp1-0 gpp1-1 gpp1-2 gpp1-3                    +                      uart2-bus-dual-pins         	gpp1-0 gpp1-1                      +          uart3-bus-pins          	gpp1-4 gpp1-5 gpp1-6 gpp1-7                    +                      uart3-bus-dual-pins         	gpp1-4 gpp1-5                      +          uart4-bus-pins          	gpp2-0 gpp2-1 gpp2-2 gpp2-3                    +                      uart4-bus-dual-pins         	gpp2-0 gpp2-1                      +          uart5-bus-pins          	gpp2-4 gpp2-5 gpp2-6 gpp2-7                    +                      uart5-bus-dual-pins         	gpp2-4 gpp2-5                      +          uart6-bus-pins          	gpp3-0 gpp3-1 gpp3-2 gpp3-3                    +                      uart6-bus-dual-pins         	gpp3-0 gpp3-1                      +          uart7-bus-pins          	gpp3-4 gpp3-5 gpp3-6 gpp3-7                    +                      uart7-bus-dual-pins         	gpp3-4 gpp3-5                      +          uart8-bus-pins          	gpp4-0 gpp4-1 gpp4-2 gpp4-3                    +                       uart8-bus-dual-pins         	gpp4-0 gpp4-1                      +          hsi2c0-bus-pins         	gpp0-0 gpp0-1                      +          hsi2c1-bus-pins         	gpp0-2 gpp0-3                      +          hsi2c2-bus-pins         	gpp0-4 gpp0-5                      +          hsi2c3-bus-pins         	gpp0-6 gpp0-7                      +          hsi2c4-bus-pins         	gpp1-0 gpp1-1                      +          hsi2c5-bus-pins         	gpp1-2 gpp1-3                      +          hsi2c6-bus-pins         	gpp1-4 gpp1-5                      +          hsi2c7-bus-pins         	gpp1-6 gpp1-7                      +          hsi2c8-bus-pins         	gpp2-0 gpp2-1                      +          hsi2c9-bus-pins         	gpp2-2 gpp2-3                      +          hsi2c10-bus-pins            	gpp2-4 gpp2-5                      +          hsi2c11-bus-pins            	gpp2-6 gpp2-7                      +          hsi2c12-bus-pins            	gpp3-0 gpp3-1                      +          hsi2c13-bus-pins            	gpp3-2 gpp3-3                      +          hsi2c14-bus-pins            	gpp3-4 gpp3-5                      +          hsi2c15-bus-pins            	gpp3-6 gpp3-7                      +          hsi2c16-bus-pins            	gpp4-0 gpp4-1                      +          hsi2c17-bus-pins            	gpp4-2 gpp4-3                      +          spi0-bus-pins           	gpp0-0 gpp0-1 gpp0-2                       +          spi0-cs-pins            	gpp0-3                     +          spi0-cs-func-pins           	gpp0-3                     +          spi1-bus-pins           	gpp0-4 gpp0-5 gpp0-6                       +          spi1-cs-pins            	gpp0-7                     +          spi1-cs-func-pins           	gpp0-7                     +          spi2-bus-pins           	gpp1-0 gpp1-1 gpp1-2                       +          spi2-cs-pins            	gpp1-3                     +          spi2-cs-func-pins           	gpp1-3                     +          spi3-bus-pins           	gpp1-4 gpp1-5 gpp1-6                       +          spi3-cs-pins            	gpp1-7                     +          spi3-cs-func-pins           	gpp1-7                     +          spi4-bus-pins           	gpp2-0 gpp2-1 gpp2-2                       +          spi4-cs-pins            	gpp2-3                     +          spi4-cs-func-pins           	gpp2-3                     +          spi5-bus-pins           	gpp2-4 gpp2-5 gpp2-6                       +          spi5-cs-pins            	gpp2-7                     +          spi5-cs-func-pins           	gpp2-7                     +          spi6-bus-pins           	gpp3-0 gpp3-1 gpp3-2                       +          spi6-cs-pins            	gpp3-3                     +          spi6-cs-func-pins           	gpp3-3                     +          spi7-bus-pins           	gpp3-4 gpp3-5 gpp3-6                       +          spi7-cs-pins            	gpp3-7                     +          spi7-cs-func-pins           	gpp3-7                     +          spi8-bus-pins           	gpp4-0 gpp4-1 gpp4-2                       +          spi8-cs-pins            	gpp4-3                     +          spi8-cs-func-pins           	gpp4-3                     +          i3c0-bus-pins           	gpp2-6 gpp2-7                      +          i3c1-bus-pins           	gpp3-2 gpp3-3                      +          i3c2-bus-pins           	gpp3-6 gpp3-7                      +          i3c3-bus-pins           	gpp4-2 gpp4-3                      +             usi@108800c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;              J                                    u        |                    pclk ipclk          Wokay             ^   serial@10880000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0                    Wokay             usi@108a00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;             J                                    u        |                    pclk ipclk        	  Wdisabled       serial@108a0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0                  	  Wdisabled             usi@108c00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;             J                                    u        |                    pclk ipclk        	  Wdisabled       serial@108c0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                           pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@108e00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;             J                                    u        |                    pclk ipclk        	  Wdisabled       serial@108e0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@109000c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;              J                                    u        |                    pclk ipclk        	  Wdisabled       serial@10900000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@109200c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;     (        J                                    u        |                    pclk ipclk        	  Wdisabled       serial@10920000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@109400c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;     0        J                                    u        |                    pclk ipclk        	  Wdisabled       serial@10940000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@109600c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;     8        J                                    u        |                    pclk ipclk        	  Wdisabled       serial@10960000       3    samsung,exynosautov920-uart samsung,exynos850-uart                               
           pdefault         ~           |                    uart clk_uart_baud0            @      	  Wdisabled             usi@109800c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;     @        J                                    u        |                    pclk ipclk        	  Wdisabled       serial@10980000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~            |                    uart clk_uart_baud0            @      	  Wdisabled             pwm@109b0000          2    samsung,exynosautov920-pwm samsung,exynos4210-pwm                                                         |           timers          Wokay            pdefault         ~   !      clock-controller@10c00000         "    samsung,exynosautov920-cmu-peric1                                     |                       oscclk noc ip               #      syscon@10c20000       ,    samsung,exynosautov920-peric1-sysreg syscon                            "      pinctrl@10c30000              samsung,exynosautov920-pinctrl                                     gpg1-gpio-bank                                                gpp5-gpio-bank                                                gpp6-gpio-bank                                                      0      gpp7-gpio-bank                                                gpp8-gpio-bank                                                gpp9-gpio-bank                                                gpp10-gpio-bank                                               gpp11-gpio-bank                                               gpp12-gpio-bank                                               uart9-bus-pins          	gpp5-0 gpp5-1 gpp5-2 gpp5-3                    +                $      uart9-bus-dual-pins         	gpp5-0 gpp5-1                      +          uart10-bus-pins         	gpp5-4 gpp5-5 gpp5-6 gpp5-7                    +                %      uart10-bus-dual-pins            	gpp5-4 gpp5-5                      +          uart11-bus-pins          	gpp10-0 gpp10-1 gpp10-2 gpp10-3                    +                &      uart11-bus-dual-pins            	gpp10-0 gpp10-1                    +          uart12-bus-pins         	gpp7-0 gpp7-1 gpp7-2 gpp7-3                    +                '      uart12-bus-dual-pins            	gpp7-0 gpp7-1                      +          uart13-bus-pins         	gpp7-4 gpp7-5 gpp7-6 gpp7-7                    +                (      uart13-bus-dual-pins            	gpp7-4 gpp7-5                      +          uart14-bus-pins         	gpp8-0 gpp8-1 gpp8-2 gpp8-3                    +                )      uart14-bus-dual-pins            	gpp8-0 gpp8-1                      +          uart15-bus-pins          	gpp11-0 gpp11-1 gpp11-2 gpp11-3                    +                *      uart15-bus-dual-pins            	gpp11-0 gpp11-1                    +          uart16-bus-pins         	gpp9-0 gpp9-1 gpp9-2 gpp9-3                    +                +      uart16-bus-dual-pins            	gpp9-0 gpp9-1                      +          uart17-bus-pins          	gpp12-0 gpp12-1 gpp12-2 gpp12-3                    +                ,      uart17-bus-dual-pins            	gpp12-0 gpp12-1                    +          hsi2c18-bus-pins            	gpp5-0 gpp5-1                      +          hsi2c19-bus-pins            	gpp5-2 gpp5-3                      +          hsi2c20-bus-pins            	gpp5-4 gpp5-5                      +          hsi2c21-bus-pins            	gpp5-6 gpp5-7                      +          hsi2c22-bus-pins            	gpp10-0 gpp10-1                    +          hsi2c23-bus-pins            	gpp10-2 gpp10-3                    +          hsi2c24-bus-pins            	gpp7-0 gpp7-1                      +          hsi2c25-bus-pins            	gpp7-2 gpp7-3                      +          hsi2c26-bus-pins            	gpp7-4 gpp7-5                      +          hsi2c27-bus-pins            	gpp7-6 gpp7-7                      +          hsi2c28-bus-pins            	gpp8-0 gpp8-1                      +          hsi2c29-bus-pins            	gpp8-2 gpp8-3                      +          hsi2c30-bus-pins            	gpp11-0 gpp11-1                    +          hsi2c31-bus-pins            	gpp11-2 gpp11-3                    +          hsi2c32-bus-pins            	gpp9-0 gpp9-1                      +          hsi2c33-bus-pins            	gpp9-2 gpp9-3                      +          hsi2c34-bus-pins            	gpp12-0 gpp12-1                    +          hsi2c35-bus-pins            	gpp12-2 gpp12-3                    +          spi9-bus-pins           	gpp5-0 gpp5-1 gpp5-2                       +          spi9-cs-pins            	gpp5-3                     +          spi9-cs-func-pins           	gpp5-3                     +          spi10-bus-pins          	gpp5-4 gpp5-5 gpp5-6                       +          spi10-cs-pins           	gpp5-7                     +          spi10-cs-func-pins          	gpp5-7                     +          spi11-bus-pins          	gpp10-0 gpp10-1 gpp10-2                    +          spi11-cs-pins           	gpp10-3                    +          spi11-cs-func-pins          	gpp10-3                    +          spi12-bus-pins          	gpp7-0 gpp7-1 gpp7-2                       +          spi12-cs-pins           	gpp7-3                     +          spi12-cs-func-pins          	gpp7-3                     +          spi13-bus-pins          	gpp7-4 gpp7-5 gpp7-6                       +          spi13-cs-pins           	gpp7-7                     +          spi13-cs-func-pins          	gpp7-7                     +          spi14-bus-pins          	gpp8-0 gpp8-1 gpp8-2                       +          spi14-cs-pins           	gpp8-3                     +          spi14-cs-func-pins          	gpp8-3                     +          spi15-bus-pins          	gpp11-0 gpp11-1 gpp11-2                    +          spi15-cs-pins           	gpp11-3                    +          spi15-cs-func-pins          	gpp11-3                    +          spi16-bus-pins          	gpp9-0 gpp9-1 gpp9-2                       +          spi16-cs-pins           	gpp9-3                     +          spi16-cs-func-pins          	gpp9-3                     +          spi17-bus-pins          	gpp12-0 gpp12-1 gpp12-2                    +          spi17-cs-pins           	gpp12-3                    +          spi17-cs-func-pins          	gpp12-3                    +          i3c4-bus-pins           	gpp7-2 gpp7-3                      +          i3c5-bus-pins           	gpp7-6 gpp7-7                      +          i3c6-bus-pins           	gpp8-2 gpp8-3                      +          i3c7-bus-pins           	gpp11-2 gpp11-3                    +          key-back-pins           	gpp6-3                         .         usi@10c800c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "           J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10c8000        3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   $        |   #      #           uart clk_uart_baud0                  	  Wdisabled             usi@10ca00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "          J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10ca0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   %        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10cc00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "          J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10cc0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   &        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10ce00c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "          J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10ce0000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   '        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10d000c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "           J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10d00000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   (        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10d200c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "  (        J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10d20000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   )        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10d400c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "  0        J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10d40000       3    samsung,exynosautov920-uart samsung,exynos850-uart                                          pdefault         ~   *        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10d600c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "  8        J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10d60000       3    samsung,exynosautov920-uart samsung,exynos850-uart                               !           pdefault         ~   +        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             usi@10d800c0          1    samsung,exynosautov920-usi samsung,exynos850-usi                          ;   "  @        J                                    u        |   #      #           pclk ipclk        	  Wdisabled       serial@10d80000       3    samsung,exynosautov920-uart samsung,exynos850-uart                               #           pdefault         ~   ,        |   #      #           uart clk_uart_baud0            @      	  Wdisabled             clock-controller@11000000             samsung,exynosautov920-cmu-top                                     |           oscclk                    pinctrl@11850000              samsung,exynosautov920-pinctrl                   wakeup-interrupt-controller       #    samsung,exynosautov920-wakeup-eint        gpa0-gpio-bank                                                   &         `                                                                                               /      gpa1-gpio-bank                                                   &                                      gpq0-gpio-bank                                                key-wakeup-pins         	gpa0-0                         -         system-controller@11860000        6    samsung,exynosautov920-pmu samsung,exynos7-pmu syscon                                   clock-controller@16000000              samsung,exynosautov920-cmu-hsi0                                    |         x        oscclk noc        pinctrl@16040000              samsung,exynosautov920-pinctrl                                     gph0-gpio-bank                                                gph1-gpio-bank                                                   clock-controller@16400000              samsung,exynosautov920-cmu-hsi1          @                         |         y      z      {        oscclk noc usbdrd mmc_card        pinctrl@16450000              samsung,exynosautov920-pinctrl           E                          gph8-gpio-bank                                                   pinctrl@16c10000              samsung,exynosautov920-pinctrl                               Z      gph3-gpio-bank                                                gph4-gpio-bank                                                gph5-gpio-bank                                                gph6-gpio-bank                                                   pinctrl@16d20000              samsung,exynosautov920-pinctrl                               [      gph2-gpio-bank                                                ufs-refclk-out-pins         	gph2-0                     +                      ufs-rst-n-pins          	gph2-1                     +                     ufs-refclk-out-1-pins           	gph2-2                     +                     ufs-rst-n-1-pins            	gph2-3                     +                        phy@16e04000              samsung,exynosautov920-ufs-phy           @   @         phy-pma         |           ref_clk                              	  Wdisabled          pinctrl@1a460000              samsung,exynosautov920-pinctrl           F        gpb0-gpio-bank                                                gpb1-gpio-bank                                                gpb2-gpio-bank                                                gpb3-gpio-bank                                                gpb4-gpio-bank                                                gpb5-gpio-bank                                                gpb6-gpio-bank                                                   clock-controller@1ec00000         "    samsung,exynosautov920-cmu-cpucl0                                     |         d      e      f        oscclk switch cluster dbg         clock-controller@1ed00000         "    samsung,exynosautov920-cmu-cpucl1                                     |         g      h        oscclk switch cluster         clock-controller@1ee00000         "    samsung,exynosautov920-cmu-cpucl2                                     |         i      j        oscclk switch cluster            timer             arm,armv8-timer       <                                    
                  chosen        $  /soc@0/usi@108800c0/serial@10880000       gpio-keys         
    gpio-keys           pdefault         ~   -   .   key-wakeup          KEY_WAKEUP                        /                      key-back          	  KEY_BACK                          0               memory@80000000          memory        0              p                 
                    	compatible #address-cells #size-cells interrupt-parent model pinctrl0 pinctrl1 pinctrl2 pinctrl3 pinctrl4 pinctrl5 pinctrl6 pinctrl7 serial0 interrupts #clock-cells clock-output-names clock-frequency phandle cpu device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cache-level cache-unified ranges clocks clock-names samsung,syscon-phandle samsung,cluster-index #interrupt-cells interrupt-controller #dma-cells gpio-controller #gpio-cells samsung,pins samsung,pin-function samsung,pin-pud samsung,sysreg samsung,mode status samsung,clkreq-on pinctrl-names pinctrl-0 samsung,uart-fifosize samsung,pwm-outputs #pwm-cells samsung,pin-con-pdn reg-names samsung,pmu-syscon #phy-cells stdout-path label linux,code gpios wakeup-source 