     8      (            	                                                                     &   ,Toradex Colibri iMX8DX on Aster Board         =   2toradex,colibri-imx8x-aster toradex,colibri-imx8x fsl,imx8dx       aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000            /bus@5a000000/spi@5a000000           /bus@5a000000/spi@5a010000           /bus@5a000000/spi@5a020000           /bus@5a000000/spi@5a030000            /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       cpus                                 cpu@0            cpu          2arm,cortex-a35                          psci                       +   @        =           J           W   @        i           v                                                    	      cpu@1            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                    
      l2-cache0            2cache                                           -   @        ?                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3               Q             Q                             !        6      	                    reserved-memory                                   A   decoder-boot@84000000                                  H                 encoder-boot@86000000                                   H                 decoder-rpc@92000000                                   H                 dsp@92400000                @                  H      	  Odisabled          encoder-rpc@94400000                @       p           H                    pmu          2arm,cortex-a35-pmu          6               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         Vtx0 rx0 gip3          $  a                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           h                    clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         |                    pinctrl          2fsl,imx8qxp-iomuxc          default                          ad7879intgrp                     !           ]      adc0grp       0     d       `   c       `   h       `   g       `           c      atmeladaptergrp            N      !   M     !      atmelconnectorgrp                   !         !      canintgrp                    @      csictlgrp                                     csimclkgrp                   A      extio0grp              1     @      fec1grp       x     5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a           w      fec1slpgrp        x     5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A           x      flexcan0grp            j       !   i       !      flexcan1grp            l       !   k       !      flexcan2grp            n       !   m       !      gpioblongrp                  `      gpiohpdgrp             z             gpiokeysgrp               p A                 hog0grp                  a             S                 a   ,                a             T                 a             U                 a   R                 a                                                               X                                            hog1grp                         hog2grp                         hogscfwgrp                          i2c0grp                 !        !           T      i2c0mipilvds0grp               t          u             i2c0mipilvds1grp               x          y             i2c1grp            v     !   w     !           _      lcdifgrp         ,     L      `   H      `   K      `   J      @         @   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0     Y      !   Z      @   [      @   \      @           D      lpspi2cs2grp               *      !      lpuart0grp        0     o          p          i         j                 I      lpuart2grp             r          q                  L      lpuart3grp             m         n                 N      lpuart3ctrlgrp        H     {          V          W                                                O      pciebgrp          $          a        a          `                 pwmagrp                   a   `      `           Q      pwmbgrp            M      `                 pwmcgrp            N      `                 pwmdgrp                   a   O      `                 sai0grp       0     ^     @   a     @   ]     @   _     @           $      sgtl5000grp                  A      sgtl5000usbclkgrp              e      !           U      usb3503agrp                  a           W      usbcdetgrp             3     @                 usbh1reggrp                 @                 usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A          !           k      usdhc1-100mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           l      usdhc1-200mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           m      usdhc2gpiogrp                   !           p      usdhc2gpioslpgrp                     `           t      usdhc2grp         T           A          !           !   !       !   "       !   #       !          !           o      usdhc2-100mhzgrp          T           A          !           !   !       !   "       !   #       !          !           q      usdhc2-200mhzgrp          T           A          !           !   !       !   "       !   #       !          !           r      usdhc2slpgrp          T           `         `          `   !      `   "      `   #      `          !           s      wifigrp                            ocotp            2fsl,imx8qxp-scu-ocotp                                  keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t      	  Odisabled          rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                                  timer            2arm,armv8-timer       0  6                                 
         clock-dummy          2fixed-clock         |                      
  clk_dummy                    clock-xtal32k            2fixed-clock         |                       xtal_32KHz        clock-xtal24m            2fixed-clock         |            n6         xtal_24MHz        thermal-zones      cpu0-thermal                                 "     c   trips      trip0           2 _        >          passive                  trip1           2 (        >        	  critical             cooling-maps       map0            I           N   	   
            pmic-thermal                                 "        trips      trip0           2         >          passive                  trip1           2 H        >        	  critical             cooling-maps       map0            I           N   	   
               clock-img-ipg            2fixed-clock         |                     img_ipg_clk                  bus@58000000             2simple-bus                                   AX       X         jpegdec@58400000            X@             6      5                                ]                     m                             2nxp,imx8qxp-jpgdec          Ookay          jpegenc@58450000            XE             6      1                                ]                     m                             2nxp,imx8qxp-jpgenc          Ookay          clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             |                                      0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk                               clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             |                                      0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk                                  vpu@2c000000                                     A,       ,                  ,                               Ookay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              6                                         Ookay                     mailbox@2d020000             2fsl,imx6sx-mu           -             6                                         Ookay                     vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder                        Vtx0 tx1 rx        $  a                                       Ookay                        vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder                        Vtx0 tx1 rx        $  a                                       Ookay                           clock-cm40-ipg           2fixed-clock         |            )         cm40_ipg_clk                     bus@34000000             2simple-bus                                   A4       4                      serial@37220000          2fsl,imx8qxp-lpuart          7"             6                                 	  ipg baud            ]                mn6                    	  Odisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             6   	                                per ipg         ]                 mn6                     	  Odisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  6                                                                                         !                              ipg              !      	  Odisabled                     clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             |                                           *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk                                 clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             |                                            (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk                                   bus@53000000             2simple-bus                                   AS       S         gpu@53100000             2vivante,gc          S             6       @                                     core shader         ]                          m,E ,E                        clock-audio-ipg          2fixed-clock         |            '         audio_ipg_clk              "      clock-ext-aud-mclk0          2fixed-clock         |                        ext_aud_mclk0              2      clock-ext-aud-mclk1          2fixed-clock         |                        ext_aud_mclk1              3      clock-esai0-rx           2fixed-clock         |                        esai0_rx_clk               4      clock-esai0-rx-hf            2fixed-clock         |                        esai0_rx_hf_clk            5      clock-esai0-tx           2fixed-clock         |                        esai0_tx_clk               6      clock-esai0-tx-hf            2fixed-clock         |                        esai0_tx_hf_clk            7      clock-spdif0-rx          2fixed-clock         |                      
  spdif0_rx              8      clock-sai0-rx-bclk           2fixed-clock         |                        sai0_rx_bclk               9      clock-sai0-tx-bclk           2fixed-clock         |                        sai0_tx_bclk               :      clock-sai1-rx-bclk           2fixed-clock         |                        sai1_rx_bclk               ;      clock-sai1-tx-bclk           2fixed-clock         |                        sai1_tx_bclk               <      clock-sai2-rx-bclk           2fixed-clock         |                        sai2_rx_bclk               =      clock-sai3-rx-bclk           2fixed-clock         |                        sai3_rx_bclk               >      clock-sai4-rx-bclk           2fixed-clock         |                        sai4_rx_bclk               ?      bus@59000000             2simple-bus                                   AY       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              6      t         d                                                                                        mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `                                                                                            rxa rxb rxc txa txb txc           @                                          	  Odisabled          esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             6                                                  core extal fsys spba                                                rx tx                      	  Odisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             6                        0     !         !                "               :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                               	               rx tx                      	  Odisabled          sai@59040000             2fsl,imx8qm-sai          Y             6      :              #         #                  bus mclk0 mclk1 mclk2 mclk3         rx tx                                                    >        Ookay                        default            $                 sai@59050000             2fsl,imx8qm-sai          Y             6      <              %         %                  bus mclk0 mclk1 mclk2 mclk3         rx tx                                                    ?      	  Odisabled          sai@59060000             2fsl,imx8qm-sai          Y             6      >              &         &                  bus mclk0 mclk1 mclk2 mclk3         rx                                    @      	  Odisabled          sai@59070000             2fsl,imx8qm-sai          Y             6      C              '         '                  bus mclk0 mclk1 mclk2 mclk3         rx                                          	  Odisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y                                   * \         6      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                               @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W                 clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             |              "                   asrc0_lpcg_ipg_clk                                clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             |                    "                     (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk                                clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             |                    "                     %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw                            !      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             |                    "                     !  sai0_lpcg_mclk sai0_lpcg_ipg_clk                 >           #      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             |                    "                     !  sai1_lpcg_mclk sai1_lpcg_ipg_clk                 ?           %      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             |                    "                     !  sai2_lpcg_mclk sai2_lpcg_ipg_clk                 @           &      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             |                    "                     !  sai3_lpcg_mclk sai3_lpcg_ipg_clk                            '      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             |              "                   dsp_ram_lpcg_ipg_clk                       asrc@59800000            2fsl,imx8qm-asrc         Y             6      |         d     (      (                                                                             mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     )               )              )              )             )             )                  rxa rxb rxc txa txb txc           @                                         	  Odisabled          sai@59820000             2fsl,imx8qm-sai          Y             6      I              *         *                  bus mclk0 mclk1 mclk2 mclk3             )             )   	                rx tx                      	  Odisabled               -      sai@59830000             2fsl,imx8qm-sai          Y             6      K              +         +                  bus mclk0 mclk1 mclk2 mclk3            )   
                tx                     	  Odisabled               .      amix@59840000            2fsl,imx8qm-audmix           Y                ,            ipg                      ;   -   .      	  Odisabled          mqs@59850000             2fsl,imx8qm-mqs          Y                /      /          
  mclk core                      	  Odisabled          dma-controller@599f0000          2fsl,imx8qm-edma         Y                                   *           6      ~                                                                            J         J         L         X        l      m      n      o      p      q      r      s      t      u      v           )      clock-controller@59d00000            2fsl,imx8qxp-lpcg            Y             |                E                       aud_rec_clk0_lpcg_clk                E           0      clock-controller@59d10000            2fsl,imx8qxp-lpcg            Y             |                                       aud_rec_clk1_lpcg_clk                           1      clock-controller@59d20000            2fsl,imx8qxp-lpcg            Y             |                E                        aud_pll_div_clk0_lpcg_clk                E                 clock-controller@59d30000            2fsl,imx8qxp-lpcg            Y             |                                        aud_pll_div_clk1_lpcg_clk                                 clock-controller@59d50000            2fsl,imx8qxp-lpcg            Y             |                                     mclkout0_lpcg_clk                           V      clock-controller@59d60000            2fsl,imx8qxp-lpcg            Y             |                                     mclkout1_lpcg_clk                      acm@59e00000             2fsl,imx8qxp-acm         Y             |                                    E                         >     ?     @                               X     0       1                     2   3   4   5   6   7   8   9   :   ;   <   =   >   ?       aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk                   clock-controller@59c00000            2fsl,imx8qxp-lpcg            Y             |              "                   asrc1_lpcg_ipg_clk                          (      clock-controller@59c20000            2fsl,imx8qxp-lpcg            Y             |                    "                     !  sai4_lpcg_mclk sai4_lpcg_ipg_clk                            *      clock-controller@59c30000            2fsl,imx8qxp-lpcg            Y             |                    "                     !  sai5_lpcg_mclk sai5_lpcg_ipg_clk                            +      clock-controller@59c40000            2fsl,imx8qxp-lpcg            Y             |              "                    amix_lpcg_ipg_clk                           ,      clock-controller@59c50000            2fsl,imx8qxp-lpcg            Y             |                    "                     !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk                            /         clock-dma-ipg            2fixed-clock         |            '         dma_ipg_clk            R      bus@5a000000             2simple-bus                                   AZ       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        6      P                           @       @           per ipg         ]      5           m               5            A              A                   tx rx         	  Odisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       6      Q                           B       B           per ipg         ]      6           m               6            A              A                  tx rx         	  Odisabled          spi@5a020000             2fsl,imx7ulp-spi         Z                                       6      R                           C       C           per ipg         ]      7           m               7            A              A                  tx rx         	  Odisabled            default            D        @   E          F            spi@5a030000             2fsl,imx7ulp-spi         Z                                       6      S                           G       G           per ipg         ]      8           m               8            A              A                  tx rx         	  Odisabled          serial@5a060000         Z             6      Y              H      H          	  ipg baud            ]      9           mĴ               9        rx tx               A             A   	                Ookay             2fsl,imx8qxp-lpuart          default            I      serial@5a070000         Z             6      Z              J      J          	  ipg baud            ]      :           mĴ               :        rx tx               A   
          A                 	  Odisabled             2fsl,imx8qxp-lpuart        serial@5a080000         Z             6      [              K      K          	  ipg baud            ]      ;           mĴ               ;        rx tx               A             A                   Ookay             2fsl,imx8qxp-lpuart          default            L      serial@5a090000         Z	             6      \              M      M          	  ipg baud            ]      <           mĴ               <        rx tx               A             A                   Ookay             2fsl,imx8qxp-lpuart          default            N   O      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             6                     P      P            ipg per         ]                 mn6         I                         default            Q        Ookay          dma-controller@5a1f0000          2fsl,imx8qm-edma         Z                                   6                                                                                                                                                                                                                                                      A      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             |                 5      R                        spi0_lpcg_clk spi0_lpcg_ipg_clk               5           @      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             |                 6      R                        spi1_lpcg_clk spi1_lpcg_ipg_clk               6           B      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             |                 7      R                        spi2_lpcg_clk spi2_lpcg_ipg_clk               7           C      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             |                 8      R                        spi3_lpcg_clk spi3_lpcg_ipg_clk               8           G      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             |                 9      R                     '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk                9           H      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             |                 :      R                     '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk                :           J      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             |                 ;      R                     '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk                ;           K      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             |                 <      R                     '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk                <           M      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             |                       R                     (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk                          P      i2c@5a800000            Z    @                                   6                     S       S           per ipg         ]      `           mn6               `        Ookay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            T   U   usb-hub@8            2smsc,usb3803                     ,  ]     E        E         E      V            m.                default            W        T   X                 V            refclk          a           p           }   Y                 X            audio-codec@a            2fsl,sgtl5000               
                  ,  ]     E        E         E      V            m.                   V               Z           [           \                 touchscreen@2c           2adi,ad7879-1            default            ]           ,             Y        6                            x                                         0           >         	  Odisabled          gpio@43          2fcs,fxl6408            C         V        f         u  rWi-Fi_W_DISABLE Wi-Fi_WKUP_WLAN PWR_EN_+V3.3_WiFi_N PCIe_REF_CLK_EN USB_RESET_N USB_BYPASS_N Wi-Fi_PDn Wi-Fi_WKUP_BT               X         i2c@5a810000            Z    @                                   6                     ^       ^           per ipg         ]      a           mn6               a      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            _      i2c@5a820000            Z    @                                   6                     `       `           per ipg         ]      b           mn6               b      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000            Z    @                                   6                     a       a           per ipg         ]      c           mn6               c      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc                    Z             6                                  b       b           per ipg         ]      e           mn6               e        Ookay            default            c           [      can@5a8d0000             2fsl,imx8qm-flexcan          Z             6                                  d      d            ipg per         ]      i           mbZ               i                              	  Odisabled          can@5a8e0000             2fsl,imx8qm-flexcan          Z             6                                  d      d            ipg per         ]      i           mbZ               j                             	  Odisabled          can@5a8f0000             2fsl,imx8qm-flexcan          Z             6                                  d      d            ipg per         ]      i           mbZ               k                             	  Odisabled          dma-controller@5a9f0000          2fsl,imx8qm-edma         Z   	                              `  6                                                                              @                                                clock-controller@5ac00000            2fsl,imx8qxp-lpcg            Z             |                 `      R                        i2c0_lpcg_clk i2c0_lpcg_ipg_clk               `           S      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            Z             |                 a      R                        i2c1_lpcg_clk i2c1_lpcg_ipg_clk               a           ^      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            Z             |                 b      R                        i2c2_lpcg_clk i2c2_lpcg_ipg_clk               b           `      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            Z             |                 c      R                        i2c3_lpcg_clk i2c3_lpcg_ipg_clk               c           a      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            Z             |                 e      R                        adc0_lpcg_clk adc0_lpcg_ipg_clk               e           b      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            Z             |                 i      R   R                        5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk                  i           d         clock-conn-axi           2fixed-clock         |            CU        conn_axi_clk               ~      clock-conn-ahb           2fixed-clock         |            	!        conn_ahb_clk                     clock-conn-ipg           2fixed-clock         |                    conn_ipg_clk               }      clock-conn-bch           2fixed-clock         |            ׄ         conn_bch_clk          bus@5b000000             2simple-bus                                   A[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          6                    e           f               g                                                          Ookay                              .   h   h         5         A         S        _   i      usbmisc@5b0d0200            k         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [               f      usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [                g                        Ookay               e      mmc@5b010000            6                  [                j      j      j            ipg ahb per                       Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           x                                    "  default state_100mhz state_200mhz              k           l           m      mmc@5b020000            6                  [                n      n      n            ipg ahb per                                             Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           x              Y   	              \      (  default state_100mhz state_200mhz sleep            o   p           q   p           r   p           s   t                        mmc@5b030000            6                  [                u      u      u            ipg ahb per                     	  Odisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  6                                                 v      v      v      v            ipg ahb enet_clk_ref ptp            ]                          m沀sY@        
                                    Ookay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default sleep              w           x        .rmii            7   y         B   mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22          S   d                      y            ethernet@5b050000           [           0  6                                                z      z      z      z            ipg ahb enet_clk_ref ptp            ]                          m沀sY@        
                                  	  Odisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3         [                                       A      (     {      {       {      {      {           lpm bus aclk ipg core           ]                m沀                     Ookay       usb@5b120000          
   2cdns,usb3           [     [     [             ]otg xhci dev                       0  6                                            ghost peripheral otg wakeup          w   |        |cdns3,usb3-phy                     Ookay            host             usb-phy@5b160000             2nxp,salvo-phy           [                {           salvo_phy_clk                                    Ookay               |      clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              |                       }   ~                        9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk                             j      clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             |                       }   ~                        9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk                             n      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             |                       }   ~                        9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk                             u      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             |         0                       ~            }   }                                   enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_ref_50mhz_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk                             v      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             |         0                       ~            }   }                                   enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk                             z      clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             |                 }                    "  usboh3_ahb_clk usboh3_phy_ipg_clk                           g      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             |                                    0                     }   }   }              M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk                            {      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             |                 	        	      ~   ~                           '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb               	                 clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            |              ~                   apbhdma_hclk                 	                 dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [            0  6                                                                                      	                 nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [      [@             ]gpmi-nand bch                                     6                 gbch                                         '  gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb                         rx-tx                	        ]     	           m      	  Odisabled             bus@5c000000             2simple-bus                                   A\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             6                   clock-lsio-bus           2fixed-clock         |                     lsio_bus_clk                     bus@5d000000             2simple-bus                                    A]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              ipg per                             ]                 mn6         I           6       ^         	  Odisabled                       default       pwm@5d010000             2fsl,imx27-pwm           ]             ipg per                             ]                 mn6         I           6       _         	  Odisabled                       default       pwm@5d020000             2fsl,imx27-pwm           ]             ipg per                             ]                 mn6         I           6       `         	  Odisabled                       default       pwm@5d030000             2fsl,imx27-pwm           ]             ipg per                             ]                 mn6         I           6       a         	  Odisabled          gpio@5d080000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       P           8            E            K            P            R          r SODIMM_70 SODIMM_60 SODIMM_58 SODIMM_78 SODIMM_72 SODIMM_80 SODIMM_46 SODIMM_62 SODIMM_48 SODIMM_74 SODIMM_50 SODIMM_52 SODIMM_54 SODIMM_66 SODIMM_64 SODIMM_68   SODIMM_82 SODIMM_56 SODIMM_28 SODIMM_30  SODIMM_61 SODIMM_103 SODIMM_79 SODIMM_97  SODIMM_25 SODIMM_27 SODIMM_100          gpio@5d090000           ]	             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            Y   	      	   c            t          rSODIMM_86 SODIMM_92 SODIMM_90 SODIMM_88    SODIMM_59  SODIMM_6 SODIMM_8   SODIMM_2 SODIMM_4 SODIMM_34 SODIMM_32 SODIMM_63 SODIMM_55 SODIMM_33 SODIMM_35 SODIMM_36 SODIMM_38 SODIMM_21 SODIMM_19 SODIMM_140 SODIMM_142 SODIMM_196 SODIMM_194 SODIMM_186 SODIMM_188 SODIMM_138               E      gpio@5d0a0000           ]
             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            {            ~                       rSODIMM_23   SODIMM_144        gpio@5d0b0000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0                                               rSODIMM_96 SODIMM_75 SODIMM_37 SODIMM_29      SODIMM_43 SODIMM_45 SODIMM_69 SODIMM_71 SODIMM_73 SODIMM_77 SODIMM_89 SODIMM_93 SODIMM_95 SODIMM_99 SODIMM_105 SODIMM_107 SODIMM_98 SODIMM_102 SODIMM_104 SODIMM_106              Y      gpio@5d0c0000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio                                            	                                                            %           r   SODIMM_129 SODIMM_133 SODIMM_127 SODIMM_131             SODIMM_44  SODIMM_76 SODIMM_31 SODIMM_47 SODIMM_190 SODIMM_192 SODIMM_49 SODIMM_51 SODIMM_53                  gpio@5d0d0000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            (            ,         	   3         a  r SODIMM_57 SODIMM_65 SODIMM_85     SODIMM_135 SODIMM_137 UNUSABLE_SODIMM_180 UNUSABLE_SODIMM_184               F      gpio@5d0e0000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             6                   V        f            !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   ]fspi_base fspi_mmap         6       \                                     fspi_en fspi                        	  Odisabled          mailbox@5d1b0000            ]             6                           	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             6                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              6                                         	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             6                                         	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             6                                            2fsl,imx8qxp-mu fsl,imx6sx-mu          clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             |         4                                                                       h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk                                clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             |         4                                                                       h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk                                clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             |         4                                                                       h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk                                clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             |         4                                                                       h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk                                clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             |         4                                                                       h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk                     clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             |         4                                                                       h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk                     clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             |         4                                                                       h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk                     clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             |         4                                                                       h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk                        clock-hsio-axi           2fixed-clock         |            ׄ         hsio_axi_clk                     clock-hsio-per           2fixed-clock         |            U        hsio_per_clk                     clock-hsio-refa          2gpio-gate-clock                    |                           clock-hsio-refb          2gpio-gate-clock                    |               X                        clock-xtal100m           2fixed-clock         |                     xtal_100MHz                  bus@5f000000             2simple-bus           A_       _             p                                       ɀ                pcie@5f010000            2fsl,imx8q-pcie          _                  ]dbi config        0  A                                                          6       f          h           gmsi dma                                                            dbi mstr slv                            pci                                  i                            j                            k                            l                                             	                                    Ookay            default                    w                    	  |pcie-phy                            pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _                   ]dbi addr_space                     6       h           gdma                                   dbi mstr slv                                     )           8         	  Odisabled          clock-controller@5f060000            2fsl,imx8qxp-lpcg            _                              |                          F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk                                  clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _                        |                      hsio_phyx1_per_clk                                 clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _                        |                      hsio_pcieb_per_clk                                 clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _                        |                      hsio_misc_per_clk                                  clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	                                 |                              Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk                                   phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             ]reg phy ctrl misc         (                                       +  pclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr                                   Ookay            Gpciea-x2-pcieb          Tinput                       chosen          h/bus@5a000000/serial@5a090000         gpio-keys         
   2gpio-keys           default                    Ookay       key-wakeup          t   
        C   Y   
            Wake-Up                              usbc-det             2linux,extcon-usb-gpio           default                       F   	            Ookay               h      regulator-module-3v3             2regulator-fixed         +V3.3            2Z         2Z           \      regulator-module-3v3-avdd            2regulator-fixed          2Z         2Z        +V3.3_AVDD_AUDIO               Z      regulator-module-vref-1v8            2regulator-fixed          w@         w@      	  vref-1v8               [      regulator-module-wifi            2regulator-fixed            X                         	      
  Wi-Fi_PDn           	        regulator-usbh-vbus          2regulator-fixed         default                                      	         LK@         LK@      
  usbh_vbus              i      sound-card           2simple-audio-card           	*           	Li2s         	e           	colibri-imx8x      simple-audio-card,codec            V            	                    simple-audio-card,cpu           	               	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins linux,keycodes timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains clock-indices #mbox-cells memory-region clock-names dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #sound-dai-cells #dma-cells dma-channels dma-channel-mask dais cs-gpios #pwm-cells bypass-gpios disabled-ports initial-mode intn-gpios reset-gpios VDDA-supply VDDD-supply VDDIO-supply touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval gpio-controller #gpio-cells gpio-line-names #io-channel-cells vref-supply fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable disable-over-current extcon hnp-disable power-active-high srp-disable vbus-supply #index-cells bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 fsl,tuning-start-tap fsl,tuning-step cd-gpios vmmc-supply pinctrl-3 disable-wp no-1-8-v fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode #phy-cells gpio-ranges enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed num-ib-windows num-ob-windows fsl,hsio-cfg fsl,refclk-pad-mode stdout-path debounce-interval label linux,code wakeup-source id-gpios regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high regulator-always-on startup-delay-us simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai 