 1   8    (                                                                                   ,Freescale i.MX8QXP MEK           2fsl,imx8qxp-mek fsl,imx8qxp    aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000            /bus@5a000000/spi@5a000000           /bus@5a000000/spi@5a010000           /bus@5a000000/spi@5a020000           /bus@5a000000/spi@5a030000            /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       cpus                                 cpu@0            cpu          2arm,cortex-a35                          psci                       +   @        =           J           W   @        i           v                                                          cpu@1            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                    	      cpu@2            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                    
      cpu@3            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                          l2-cache0            2cache                                           -   @        ?                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3               Q             Q                             !        6      	                    reserved-memory                                   A   decoder-boot@84000000                                  H                 encoder-boot@86000000                                   H                 decoder-rpc@92000000                                   H                 dsp@92400000                @                  H        Ookay               :      encoder-rpc@94400000                @       p           H                 memory@90000000                                H                 memory@90008000                               H                 memory@90010000                               H                 memory@90018000                              H                 memory@900ff000                              H                 memory@90400000          2shared-dma-pool             @                  H                 memory@942f0000             /                  H           8      memory@942f8000             /                 H           9      memory@94300000          2shared-dma-pool             0                  H           7      memory@880000000             H                                         pmu          2arm,cortex-a35-pmu          6               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         Vtx0 rx0 gip3          $  a                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           h                    clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         |                    pinctrl          2fsl,imx8qxp-iomuxc                cm40i2cgrp             c     L   d     L                 cm40i2cgpio-grp            c     L   d     L                 esai0grp          x     7      @   8      @   9      @   :      @   ;      @   <      @   =      @   >      @   ?      @   @      @           +      fec1grp            5          4          &          %          '          (          )          *          ,          -          .          /          0          1                  }      flexcan0grp            j       !   i       !           n      flexcan1grp            l       !   k       !           p      ioexprstgrp            Z     !           d      isl29023grp            [      !           e      lpi2c1grp                    !         !           c      lpuart0grp             o          p                  Y      lpuart2grp             q          r                  \      lpuart3grp             n         m                 ^      pcieagrp          $           !         !        !                 typecgrp               \     !           f      typecmuxgrp            3      `                 sai0grp       0     R      `   T      @   S      @   U      @           /      sai1grp       <     V      @   W     @   X     @   `     `   Y     @           1      usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A           v      usdhc2grp         T           A          !           !   !       !   "       !   #       !          !           x         ocotp            2fsl,imx8qxp-scu-ocotp                                             keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t        Ookay                     rtc          2fsl,imx8qxp-sc-rtc                   watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                                  timer            2arm,armv8-timer       0  6                                 
         clock-dummy          2fixed-clock         |                      
  clk_dummy              (      clock-xtal32k            2fixed-clock         |                       xtal_32KHz                   clock-xtal24m            2fixed-clock         |            n6         xtal_24MHz                   thermal-zones                 cpu0-thermal                                 
     c   trips      trip0                    &          passive                  trip1                    &        	  critical                        cooling-maps       map0            1         0  6      	   
               pmic-thermal                                 
        trips      trip0                    &          passive                  trip1            H        &        	  critical                        cooling-maps       map0            1         0  6      	   
                  clock-img-ipg            2fixed-clock         |                     img_ipg_clk                  bus@58000000             2simple-bus                                   AX       X                    jpegdec@58400000            X@             6      5                                E                     U          j                   2nxp,imx8qxp-jpgdec          Ookay                     jpegenc@58450000            XE             6      1                                E                     U          j                   2nxp,imx8qxp-jpgenc          Ookay                     clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             |                         x             0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         j                      clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             |                         x             0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         j                         vpu@2c000000                                     A,       ,                  ,                  j             Ookay             2nxp,imx8qxp-vpu               mailbox@2d000000             2fsl,imx6sx-mu           -              6                            j             Ookay                     mailbox@2d020000             2fsl,imx6sx-mu           -             6                            j             Ookay                     vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder           j             Vtx0 tx1 rx        $  a                                       Ookay                                   vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder           j             Vtx0 tx1 rx        $  a                                       Ookay                                      clock-cm40-ipg           2fixed-clock         |            )         cm40_ipg_clk               #      bus@34000000             2simple-bus                                   A4       4                                 serial@37220000          2fsl,imx8qxp-lpuart          7"             6                                 	  ipg baud            E                Un6         j           	  Odisabled                     i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             6   	                                per ipg         E                 Un6         j              Ookay                                               default gpio                                        
                  	                  audio-codec@1a           2wlf,wm8960                                    mclk          ,  E     E        E         E                  U.                                                                              $           1            @                     gpio@20          2ti,tca6416                       O        _                    audio-codec@48           2cirrus,cs42888             H                       mclk          ,  E     E        E         E                  U.                k   !              w   "           "           "           "                    intmux@37400000          2fsl,imx-intmux          7@                        `  6                                                                                         !                      #        ipg         j     !        Ookay                     clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             |                      #        x             *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           j                      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             |                       #        x             (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         j                          bus@53000000             2simple-bus                                   AS       S                    gpu@53100000             2vivante,gc          S             6       @                                     core shader         E                          U)' 2        j                          clock-audio-ipg          2fixed-clock         |            '         audio_ipg_clk              -      clock-ext-aud-mclk0          2fixed-clock         |                        ext_aud_mclk0              E      clock-ext-aud-mclk1          2fixed-clock         |                        ext_aud_mclk1              F      clock-esai0-rx           2fixed-clock         |                        esai0_rx_clk               G      clock-esai0-rx-hf            2fixed-clock         |                        esai0_rx_hf_clk            H      clock-esai0-tx           2fixed-clock         |                        esai0_tx_clk               I      clock-esai0-tx-hf            2fixed-clock         |                        esai0_tx_hf_clk            J      clock-spdif0-rx          2fixed-clock         |                      
  spdif0_rx              K      clock-sai0-rx-bclk           2fixed-clock         |                        sai0_rx_bclk               L      clock-sai0-tx-bclk           2fixed-clock         |                        sai0_tx_bclk               M      clock-sai1-rx-bclk           2fixed-clock         |                        sai1_rx_bclk               N      clock-sai1-tx-bclk           2fixed-clock         |                        sai1_tx_bclk               O      clock-sai2-rx-bclk           2fixed-clock         |                        sai2_rx_bclk               P      clock-sai3-rx-bclk           2fixed-clock         |                        sai3_rx_bclk               Q      clock-sai4-rx-bclk           2fixed-clock         |                        sai4_rx_bclk               R      bus@59000000             2simple-bus                                   AY       Y                    asrc@59000000            2fsl,imx8qm-asrc         Y              6      t         d     $       $       %      &      '       '      (   (   (   (   (   (   (   (   (   (   (   (   (        mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     )               )              )              )             )             )                  rxa rxb rxc txa txb txc                                          j             Ookay                     esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             6                    *      *       *      (        core extal fsys spba                )             )                   rx tx           j             Ookay          4  E   '        E        E         E      *               %            U    .                   +        default                  spdif@59020000           2fsl,imx8qm-spdif            Y             6                        0     ,      (   ,       (   (   (   -   (   (   (      :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba               )             )   	               rx tx           j           	  Odisabled                     sai@59040000             2fsl,imx8qm-sai          Y             6      :              .      (   .       (   (        bus mclk0 mclk1 mclk2 mclk3         rx tx               )             )                   j     >        Ookay                      ,  E     E        E         E      .            U.                default            /                 sai@59050000             2fsl,imx8qm-sai          Y             6      <              0      (   0       (   (        bus mclk0 mclk1 mclk2 mclk3         rx tx               )             )                   j     ?        Ookay          ,  E     E        E         E      0            U.                default            1                 sai@59060000             2fsl,imx8qm-sai          Y             6      >              2      (   2       (   (        bus mclk0 mclk1 mclk2 mclk3         rx             )                  j     @      	  Odisabled                     sai@59070000             2fsl,imx8qm-sai          Y             6      C              3      (   3       (   (        bus mclk0 mclk1 mclk2 mclk3         rx             )                  j           	  Odisabled                     dma-controller@591f0000          2fsl,imx8qm-edma         Y                                    \         6      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                         j      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W           )      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             |              -        x           asrc0_lpcg_ipg_clk          j                $      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             |              '      -        x             (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         j                *      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             |              '      -        x             %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            j                ,      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             |              '      -        x             !  sai0_lpcg_mclk sai0_lpcg_ipg_clk            j     >           .      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             |              '      -        x             !  sai1_lpcg_mclk sai1_lpcg_ipg_clk            j     ?           0      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             |              '      -        x             !  sai2_lpcg_mclk sai2_lpcg_ipg_clk            j     @           2      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             |              '      -        x             !  sai3_lpcg_mclk sai3_lpcg_ipg_clk            j                3      clock-controller@59580000            2fsl,imx8qxp-lpcg            YX             |              -   -   -        x               4  dsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk         j                 4      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             |              -        x           dsp_ram_lpcg_ipg_clk            j                5      dsp@596e8000             2fsl,imx8qxp-hifi4           Yn              4      5      4           ipg ocram core          j                    Vtx rx rxdb        $  a   6           6          6               /imx/dsp/hifi4.bin           Ookay               7   8   9   :                 asrc@59800000            2fsl,imx8qm-asrc         Y             6      |         d     ;      ;      %       &       '       '      (   (   (   (   (   (   (   (   (   (   (   (   (        mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     <               <              <              <             <             <                  rxa rxb rxc txa txb txc           @                              j           	  Odisabled                     sai@59820000             2fsl,imx8qm-sai          Y             6      I              =      (   =       (   (        bus mclk0 mclk1 mclk2 mclk3             <             <   	                rx tx           j             Ookay          4  E   '                               =               &            U    .                 =           @      sai@59830000             2fsl,imx8qm-sai          Y             6      K              >      (   >       (   (        bus mclk0 mclk1 mclk2 mclk3            <   
                tx          j             Ookay          4  E   '                               >               &            U    .                 =           A      amix@59840000            2fsl,imx8qm-audmix           Y                ?            ipg         j             R   @   A        Ookay                     mqs@59850000             2fsl,imx8qm-mqs          Y                B      B          
  mclk core           j           	  Odisabled                     dma-controller@599f0000          2fsl,imx8qm-edma         Y                                              6      ~                                                                            J         J         L         X  j      l      m      n      o      p      q      r      s      t      u      v           <      clock-controller@59d00000            2fsl,imx8qxp-lpcg            Y             |                E           x            aud_rec_clk0_lpcg_clk           j     E           C      clock-controller@59d10000            2fsl,imx8qxp-lpcg            Y             |                           x            aud_rec_clk1_lpcg_clk           j                D      clock-controller@59d20000            2fsl,imx8qxp-lpcg            Y             |                E            x            aud_pll_div_clk0_lpcg_clk           j     E           %      clock-controller@59d30000            2fsl,imx8qxp-lpcg            Y             |                            x            aud_pll_div_clk1_lpcg_clk           j                &      clock-controller@59d50000            2fsl,imx8qxp-lpcg            Y             |              '           x            mclkout0_lpcg_clk           j                      clock-controller@59d60000            2fsl,imx8qxp-lpcg            Y             |              '           x            mclkout1_lpcg_clk           j                      acm@59e00000             2fsl,imx8qxp-acm         Y             |           j                         E                         >     ?     @                               X     C       D       %       &       E   F   G   H   I   J   K   L   M   N   O   P   Q   R       aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk             '      clock-controller@59c00000            2fsl,imx8qxp-lpcg            Y             |              -        x           asrc1_lpcg_ipg_clk          j                ;      clock-controller@59c20000            2fsl,imx8qxp-lpcg            Y             |              '      -        x             !  sai4_lpcg_mclk sai4_lpcg_ipg_clk            j                =      clock-controller@59c30000            2fsl,imx8qxp-lpcg            Y             |              '      -        x             !  sai5_lpcg_mclk sai5_lpcg_ipg_clk            j                >      clock-controller@59c40000            2fsl,imx8qxp-lpcg            Y             |              -        x            amix_lpcg_ipg_clk           j                ?      clock-controller@59c50000            2fsl,imx8qxp-lpcg            Y             |              '      -        x             !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            j                B         clock-dma-ipg            2fixed-clock         |            '         dma_ipg_clk            `      bus@5a000000             2simple-bus                                   AZ       Z                    spi@5a000000             2fsl,imx7ulp-spi         Z                                        6      P                           S       S           per ipg         E      5           U         j      5            T              T                   tx rx         	  Odisabled                     spi@5a010000             2fsl,imx7ulp-spi         Z                                       6      Q                           U       U           per ipg         E      6           U         j      6            T              T                  tx rx         	  Odisabled                     spi@5a020000             2fsl,imx7ulp-spi         Z                                       6      R                           V       V           per ipg         E      7           U         j      7            T              T                  tx rx         	  Odisabled                     spi@5a030000             2fsl,imx7ulp-spi         Z                                       6      S                           W       W           per ipg         E      8           U         j      8            T              T                  tx rx         	  Odisabled                     serial@5a060000         Z             6      Y              X      X          	  ipg baud            E      9           UĴ         j      9        rx tx               T             T   	                Ookay             2fsl,imx8qxp-lpuart          default            Y                 serial@5a070000         Z             6      Z              Z      Z          	  ipg baud            E      :           UĴ         j      :        rx tx               T   
          T                 	  Odisabled             2fsl,imx8qxp-lpuart                   serial@5a080000         Z             6      [              [      [          	  ipg baud            E      ;           UĴ         j      ;        rx tx               T             T                   Ookay             2fsl,imx8qxp-lpuart          default            \                 serial@5a090000         Z	             6      \              ]      ]          	  ipg baud            E      <           UĴ         j      <        rx tx               T             T                   Ookay             2fsl,imx8qxp-lpuart          default            ^                 pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             6                     _      _            ipg per         E                 Un6         W           j                       dma-controller@5a1f0000          2fsl,imx8qm-edma         Z                                   6                                                                                                                                                        j                                                                                              T      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             |                 5      `        x                spi0_lpcg_clk spi0_lpcg_ipg_clk         j      5           S      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             |                 6      `        x                spi1_lpcg_clk spi1_lpcg_ipg_clk         j      6           U      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             |                 7      `        x                spi2_lpcg_clk spi2_lpcg_ipg_clk         j      7           V      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             |                 8      `        x                spi3_lpcg_clk spi3_lpcg_ipg_clk         j      8           W      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             |                 9      `        x             '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          j      9           X      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             |                 :      `        x             '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          j      :           Z      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             |                 ;      `        x             '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          j      ;           [      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             |                 <      `        x             '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          j      <           ]      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             |                       `        x             (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         j                 _      i2c@5a800000            Z    @                                   6                     a       a           per ipg         E      `           Un6         j      `      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  i2c@5a810000            Z    @                                   6                     b       b           per ipg         E      a           Un6         j      a        Ookay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            c   d              i2c-mux@71           2nxp,pca9646 nxp,pca9546                                      q        k            i2c@0                                            gpio@68          2maxim,max7322              h         O        _                       i2c@1                                              i2c@2                                           pressure-sensor@60           2fsl,mpl3115            `         i2c@3                                           gpio@1a          2nxp,pca9557                     O        _                    gpio@1d          2nxp,pca9557                     O        _              !      light-sensor@44         default            e         2isil,isl29023              D                     6                  tcpc@50          2nxp,ptn5110 tcpci           default            f           P                     6                    connector            2usb-c-connector         bUSB-C           hsource          sdual            },              ports                                port@0                 endpoint               g                    port@1                endpoint               h                                i2c@5a820000            Z    @                                   6                     i       i           per ipg         E      b           Un6         j      b      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  i2c@5a830000            Z    @                                   6                     j       j           per ipg         E      c           Un6         j      c      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  adc@5a880000             2nxp,imx8qxp-adc                    Z             6                                  k       k           per ipg         E      e           Un6         j      e      	  Odisabled                     adc@5a890000             2nxp,imx8qxp-adc                    Z             6                                  l       l           per ipg         E      f           Un6         j      f      	  Odisabled                     can@5a8d0000             2fsl,imx8qm-flexcan          Z             6                                  m      m            ipg per         E      i           UbZ         j      i                                Ookay               n        default            o                 can@5a8e0000             2fsl,imx8qm-flexcan          Z             6                                  m      m            ipg per         E      i           UbZ         j      j                               Ookay               p        default            o                 can@5a8f0000             2fsl,imx8qm-flexcan          Z             6                                  m      m            ipg per         E      i           UbZ         j      k                             	  Odisabled                     dma-controller@5a9f0000          2fsl,imx8qm-edma         Z   	                              `  6                                                                              @  j                                                         clock-controller@5ac00000            2fsl,imx8qxp-lpcg            Z             |                 `      `        x                i2c0_lpcg_clk i2c0_lpcg_ipg_clk         j      `           a      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            Z             |                 a      `        x                i2c1_lpcg_clk i2c1_lpcg_ipg_clk         j      a           b      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            Z             |                 b      `        x                i2c2_lpcg_clk i2c2_lpcg_ipg_clk         j      b           i      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            Z             |                 c      `        x                i2c3_lpcg_clk i2c3_lpcg_ipg_clk         j      c           j      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            Z             |                 e      `        x                adc0_lpcg_clk adc0_lpcg_ipg_clk         j      e           k      clock-controller@5ac90000            2fsl,imx8qxp-lpcg            Z             |                 f      `        x                adc1_lpcg_clk adc1_lpcg_ipg_clk         j      f           l      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            Z             |                 i      `   `        x                5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            j      i           m         clock-conn-axi           2fixed-clock         |            CU        conn_axi_clk                     clock-conn-ahb           2fixed-clock         |            	!        conn_ahb_clk                     clock-conn-ipg           2fixed-clock         |                    conn_ipg_clk                     clock-conn-bch           2fixed-clock         |            ׄ         conn_bch_clk                     bus@5b000000             2simple-bus                                   A[       [                    usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          6                    q           r               s                                             j             Ookay             '         3         ?         K         `        r   t                 usbmisc@5b0d0200            ~         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [               r      usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [                s           j             Ookay               q      mmc@5b010000            6                  [                u      u      u            ipg ahb per         j              Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           E                 U         default            v                                                       mmc@5b020000            6                  [                w      w      w            ipg ahb per         j                                    Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           E                 U         default            x                      y           z                 z                        mmc@5b030000            6                  [                {      {      {            ipg ahb per         j            	  Odisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                    ethernet@5b040000           [           0  6                                                 |      |      |      |            ipg ahb enet_clk_ref ptp            E                          U沀sY@                              j              Ookay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default            }      	  rgmii-id            !   ~         ,              mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                         ~            ethernet@5b050000           [           0  6                                                                              ipg ahb enet_clk_ref ptp            E                          U沀sY@                              j            	  Odisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec                    usb@5b110000             2fsl,imx8qm-usb3         [                                       A      (                                         lpm bus aclk ipg core           E                U沀        j             Ookay                  usb@5b120000          
   2cdns,usb3           [     [     [             =otg xhci dev                       0  6                                            Ghost peripheral otg wakeup          W           \cdns3,usb3-phy          f           Ookay            }otg                        port       endpoint                          g               usb-phy@5b160000             2nxp,salvo-phy           [                           salvo_phy_clk           j                         Ookay                     clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              |                                  x                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            j                 u      clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             |                                  x                9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            j                 w      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             |                                  x                9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            j                 {      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             |         0                                              x                           enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            j                 |      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             |         0                                              x                           enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            j                       clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             |                         x            "  usboh3_ahb_clk usboh3_phy_ipg_clk           j                s      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             |           x                         0                                         M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            j                      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             |                 	        	                 x                   '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          j     	                 clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            |                      x           apbhdma_hclk            j     	                 dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [            0  6                                                                                 j     	                 nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [      [@             =gpmi-nand bch                                     6                 Gbch                                         '  gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb                         rx-tx           j     	        E     	           U      	  Odisabled                        bus@5c000000             2simple-bus                                   A\       \                    ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             6                              clock-lsio-bus           2fixed-clock         |                     lsio_bus_clk                     bus@5d000000             2simple-bus                                    A]       ]                                 pwm@5d000000             2fsl,imx27-pwm           ]              ipg per                             E                 Un6         W           6       ^         	  Odisabled                     pwm@5d010000             2fsl,imx27-pwm           ]             ipg per                             E                 Un6         W           6       _         	  Odisabled                     pwm@5d020000             2fsl,imx27-pwm           ]             ipg per                             E                 Un6         W           6       `         	  Odisabled                     pwm@5d030000             2fsl,imx27-pwm           ]             ipg per                             E                 Un6         W           6       a         	  Odisabled                     gpio@5d080000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio       P           8            E            K            P            R                    gpio@5d090000           ]	             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            Y   	      	   c            t                    gpio@5d0a0000           ]
             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            {            ~                                gpio@5d0b0000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio       0                                                        gpio@5d0c0000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio                                            	                                                            %              z      gpio@5d0d0000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            (            ,         	   3                    gpio@5d0e0000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio                  gpio@5d0f0000           ]             6                   O        _            !                   j                2fsl,imx8qxp-gpio fsl,imx35-gpio                  spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   =fspi_base fspi_mmap         6       \                                     fspi_en fspi            j            	  Odisabled                     mailbox@5d1b0000            ]             6                           	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1c0000            ]             6                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1e0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1f0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d200000            ]              6                             j              Ookay             2fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d210000            ]!             6                             j            	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d280000            ](             6                             j               2fsl,imx8qxp-mu fsl,imx6sx-mu               6      clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             |         4                                                 x                      h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         j                       clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             |         4                                                 x                      h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         j                       clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             |         4                                                 x                      h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         j                       clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             |         4                                                 x                      h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         j                       clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             |         4                                                 x                      h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         j                      clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             |         4                                                 x                      h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         j                      clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             |         4                                                 x                      h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         j                      clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             |         4                                                 x                      h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         j                         clock-hsio-axi           2fixed-clock         |            ׄ         hsio_axi_clk                     clock-hsio-per           2fixed-clock         |            U        hsio_per_clk                     clock-hsio-refa          2gpio-gate-clock                    |               z                      clock-hsio-refb          2gpio-gate-clock                    |               z                       clock-xtal100m           2fixed-clock         |                     xtal_100MHz                  bus@5f000000             2simple-bus           A_       _             p                                                                 pcie@5f010000            2fsl,imx8q-pcie          _                  =dbi config        0  A                                                          6       f          h           Gmsi dma                                                            dbi mstr slv                            pci                                  i                            j                            k                            l                                                        j                         Ookay            W                    	  \pcie-phy                       default         k   z                                  pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _                   =dbi addr_space                     6       h           Gdma                                   dbi mstr slv            j                         &           5         	  Odisabled            W                    	  \pcie-phy                       default                            clock-controller@5f060000            2fsl,imx8qxp-lpcg            _                              |           x               F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk           j                       clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _                        |           x           hsio_phyx1_per_clk          j                       clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _                        |           x           hsio_pcieb_per_clk          j                       clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _                        |           x           hsio_misc_per_clk           j                       clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	                                 |           x                   Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk            j                       phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             =reg phy ctrl misc         (                                       +  pclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr                     j              Ookay            Dpciea-x2-pcieb          Qinput                       audio-codec-bt           2linux,bt-sco                                chosen          e/bus@5a000000/serial@5a060000         imx8x-cm4            2fsl,imx8qxp-cm4         Vtx rx rxdb        $  a                                                              j          )        q4                      	      memory@80000000          memory                     @         usdhc2-vmmc          2regulator-fixed       	  SD1_SPWR             -         -           z                           y      gpio-sbu-mux             2nxp,cbdtu02043 gpio-sbu-mux         default                          	                                 port       endpoint                          h            regulator-pcie           2regulator-fixed          2Z         2Z      
  mpcie_3v3                                               regulator-audio          2regulator-fixed          2Z         2Z        cs42888_supply             "      regulator-audio-pwr          2regulator-fixed       	  audio-5v             LK@         LK@         	
         	                  regulator-audio-3v3          2regulator-fixed       
  audio-3v3            2Z         2Z         	
         	                 regulator-audio-1v8          2regulator-fixed       
  audio-1v8            w@         w@         	
         	                 regulator-can-en             2regulator-fixed          2Z         2Z        can-en                                              regulator-can-stby           2regulator-fixed          2Z         2Z      	  can-stby                                       	0              o      regulator-usbotg1-vbus           2regulator-fixed          LK@         LK@        usb_otg1_vbus              !                           t      sound-bt-sco             2simple-audio-card            	;        	`           	dsp_a           	           	bt-sco-audio       simple-audio-card,codec         	            simple-audio-card,cpu           	           	           	                       sound-cs42888            2fsl,imx-audio-cs42888           	           

           
           
 Line Out Jack AOUT1L Line Out Jack AOUT1R Line Out Jack AOUT2L Line Out Jack AOUT2R Line Out Jack AOUT3L Line Out Jack AOUT3R Line Out Jack AOUT4L Line Out Jack AOUT4R AIN1L Line In Jack AIN1R Line In Jack AIN2L Line In Jack AIN2R Line In Jack          ,imx-cs42888       sound-wm8960             2fsl,imx-audio-wm8960             ,wm8960-audio            
           

           
.                   
 Headphone Jack HP_L Headphone Jack HP_R Ext Spk SPK_LP Ext Spk SPK_LN Ext Spk SPK_RP Ext Spk SPK_RN LINPUT1 Mic Jack Mic Jack MICB        __symbols__         
:/cpus/cpu@0         
@/cpus/cpu@1         
F/cpus/cpu@2         
L/cpus/cpu@3         
R/cpus/l2-cache0         
Y/opp-table          
g/interrupt-controller@51a00000        '  
k/reserved-memory/decoder-boot@84000000        '  
x/reserved-memory/encoder-boot@86000000        &  
/reserved-memory/decoder-rpc@92000000           
/reserved-memory/dsp@92400000         &  
/reserved-memory/encoder-rpc@94400000         !  
/reserved-memory/memory@90000000          !  
/reserved-memory/memory@90008000          !  
/reserved-memory/memory@90010000          !  
/reserved-memory/memory@90018000          !  
/reserved-memory/memory@900ff000          !  
/reserved-memory/memory@90400000          !  
/reserved-memory/memory@942f0000          !  
/reserved-memory/memory@942f8000          !  /reserved-memory/memory@94300000          "  /reserved-memory/memory@880000000         $  ,/system-controller/power-controller       $  /system-controller/clock-controller         //system-controller/pinctrl        &  6/system-controller/pinctrl/cm40i2cgrp         +  G/system-controller/pinctrl/cm40i2cgpio-grp        $  ]/system-controller/pinctrl/esai0grp       #  k/system-controller/pinctrl/fec1grp        '  x/system-controller/pinctrl/flexcan0grp        '  /system-controller/pinctrl/flexcan1grp        '  /system-controller/pinctrl/ioexprstgrp        '  /system-controller/pinctrl/isl29023grp        %  /system-controller/pinctrl/lpi2c1grp          &  /system-controller/pinctrl/lpuart0grp         &  /system-controller/pinctrl/lpuart2grp         &  /system-controller/pinctrl/lpuart3grp         $  /system-controller/pinctrl/pcieagrp       $  
/system-controller/pinctrl/typecgrp       '  /system-controller/pinctrl/typecmuxgrp        #  */system-controller/pinctrl/sai0grp        #  7/system-controller/pinctrl/sai1grp        %  D/system-controller/pinctrl/usdhc1grp          %  S/system-controller/pinctrl/usdhc2grp            b/system-controller/ocotp            h/system-controller/keys         p/system-controller/rtc        "  t/system-controller/thermal-sensor           z/clock-dummy            /clock-xtal32k          /clock-xtal24m          /thermal-zones        (  /thermal-zones/cpu0-thermal/trips/trip0       (  /thermal-zones/cpu0-thermal/trips/trip1       (  /thermal-zones/pmic-thermal/trips/trip0       (  /thermal-zones/pmic-thermal/trips/trip1         /clock-img-ipg          /bus@58000000           /bus@58000000/jpegdec@58400000          /bus@58000000/jpegenc@58450000        (  /bus@58000000/clock-controller@585d0000       (  /bus@58000000/clock-controller@585f0000         /vpu@2c000000           /vpu@2c000000/mailbox@2d000000          #/vpu@2c000000/mailbox@2d020000           */vpu@2c000000/vpu-core@2d080000          4/vpu@2c000000/vpu-core@2d090000         >/clock-cm40-ipg         K/bus@34000000           W/bus@34000000/serial@37220000           >/bus@34000000/i2c@37230000        *  c/bus@34000000/i2c@37230000/audio-codec@1a         #  j/bus@34000000/i2c@37230000/gpio@20        *  r/bus@34000000/i2c@37230000/audio-codec@48           z/bus@34000000/intmux@37400000         (  /bus@34000000/clock-controller@37620000       (  /bus@34000000/clock-controller@37630000         /bus@53000000           /bus@53000000/gpu@53100000          /clock-audio-ipg            /clock-ext-aud-mclk0            /clock-ext-aud-mclk1            /clock-esai0-rx         /clock-esai0-rx-hf          /clock-esai0-tx         /clock-esai0-tx-hf          3/clock-spdif0-rx            A/clock-sai0-rx-bclk         R/clock-sai0-tx-bclk         c/clock-sai1-rx-bclk         t/clock-sai1-tx-bclk         /clock-sai2-rx-bclk         /clock-sai3-rx-bclk         /clock-sai4-rx-bclk         /bus@59000000           /bus@59000000/asrc@59000000         e/bus@59000000/esai@59010000         /bus@59000000/spdif@59020000            f/bus@59000000/sai@59040000          ?/bus@59000000/sai@59050000          /bus@59000000/sai@59060000          /bus@59000000/sai@59070000        &  /bus@59000000/dma-controller@591f0000         (  /bus@59000000/clock-controller@59400000       (  /bus@59000000/clock-controller@59410000       (  /bus@59000000/clock-controller@59420000       (  /bus@59000000/clock-controller@59440000       (  /bus@59000000/clock-controller@59450000       (  /bus@59000000/clock-controller@59460000       (  /bus@59000000/clock-controller@59470000       (  "/bus@59000000/clock-controller@59580000       (  +/bus@59000000/clock-controller@59590000         8/bus@59000000/dsp@596e8000          </bus@59000000/asrc@59800000         B/bus@59000000/sai@59820000          G/bus@59000000/sai@59830000          L/bus@59000000/amix@59840000         Q/bus@59000000/mqs@59850000        &  U/bus@59000000/dma-controller@599f0000         (  [/bus@59000000/clock-controller@59d00000       (  i/bus@59000000/clock-controller@59d10000       (  w/bus@59000000/clock-controller@59d20000       (  /bus@59000000/clock-controller@59d30000       (  /bus@59000000/clock-controller@59d50000       (  /bus@59000000/clock-controller@59d60000         /bus@59000000/acm@59e00000        (  /bus@59000000/clock-controller@59c00000       (  /bus@59000000/clock-controller@59c20000       (  /bus@59000000/clock-controller@59c30000       (  /bus@59000000/clock-controller@59c40000       (  /bus@59000000/clock-controller@59c50000         /clock-dma-ipg          /bus@5a000000           /bus@5a000000/spi@5a000000          /bus@5a000000/spi@5a010000          /bus@5a000000/spi@5a020000          /bus@5a000000/spi@5a030000          /bus@5a000000/serial@5a060000           !/bus@5a000000/serial@5a070000           /bus@5a000000/serial@5a080000           /bus@5a000000/serial@5a090000           )/bus@5a000000/pwm@5a190000        &  2/bus@5a000000/dma-controller@5a1f0000         (  8/bus@5a000000/clock-controller@5a400000       (  B/bus@5a000000/clock-controller@5a410000       (  L/bus@5a000000/clock-controller@5a420000       (  V/bus@5a000000/clock-controller@5a430000       (  `/bus@5a000000/clock-controller@5a460000       (  k/bus@5a000000/clock-controller@5a470000       (  v/bus@5a000000/clock-controller@5a480000       (  /bus@5a000000/clock-controller@5a490000       (  /bus@5a000000/clock-controller@5a590000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000        4  /bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@0/gpio@68       4  /bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@3/gpio@1a       4  /bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@3/gpio@1d       #  /bus@5a000000/i2c@5a810000/tcpc@50        -  /bus@5a000000/i2c@5a810000/tcpc@50/connector          C  /bus@5a000000/i2c@5a810000/tcpc@50/connector/ports/port@0/endpoint        C  /bus@5a000000/i2c@5a810000/tcpc@50/connector/ports/port@1/endpoint           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000          /bus@5a000000/adc@5a880000          /bus@5a000000/adc@5a890000          /bus@5a000000/can@5a8d0000          /bus@5a000000/can@5a8e0000          /bus@5a000000/can@5a8f0000        &  /bus@5a000000/dma-controller@5a9f0000         (  /bus@5a000000/clock-controller@5ac00000       (  /bus@5a000000/clock-controller@5ac10000       (  /bus@5a000000/clock-controller@5ac20000       (  /bus@5a000000/clock-controller@5ac30000       (  !/bus@5a000000/clock-controller@5ac80000       (  +/bus@5a000000/clock-controller@5ac90000       (  5/bus@5a000000/clock-controller@5acd0000         ?/clock-conn-axi         L/clock-conn-ahb         Y/clock-conn-ipg         f/clock-conn-bch         s/bus@5b000000           /bus@5b000000/usb@5b0d0000          /bus@5b000000/usbmisc@5b0d0200          /bus@5b000000/usbphy@5b100000           L/bus@5b000000/mmc@5b010000          [/bus@5b000000/mmc@5b020000          /bus@5b000000/mmc@5b030000           s/bus@5b000000/ethernet@5b040000       4  /bus@5b000000/ethernet@5b040000/mdio/ethernet-phy@0          /bus@5b000000/ethernet@5b050000         /bus@5b000000/usb@5b110000        (  /bus@5b000000/usb@5b110000/usb@5b120000       6  /bus@5b000000/usb@5b110000/usb@5b120000/port/endpoint           /bus@5b000000/usb-phy@5b160000        (  /bus@5b000000/clock-controller@5b200000       (  /bus@5b000000/clock-controller@5b210000       (  /bus@5b000000/clock-controller@5b220000       (  /bus@5b000000/clock-controller@5b230000       (  /bus@5b000000/clock-controller@5b240000       (  /bus@5b000000/clock-controller@5b270000       (  /bus@5b000000/clock-controller@5b280000       (  "/bus@5b000000/clock-controller@5b290000       (  1/bus@5b000000/clock-controller@5b290004       &  @/bus@5b000000/dma-controller@5b810000         '  I/bus@5b000000/nand-controller@5b812000          N/bus@5c000000           Y/bus@5c000000/ddr-pmu@5c020000          b/clock-lsio-bus         o/bus@5d000000           {/bus@5d000000/pwm@5d000000          /bus@5d000000/pwm@5d010000          /bus@5d000000/pwm@5d020000          /bus@5d000000/pwm@5d030000          /bus@5d000000/gpio@5d080000         /bus@5d000000/gpio@5d090000         /bus@5d000000/gpio@5d0a0000         /bus@5d000000/gpio@5d0b0000         /bus@5d000000/gpio@5d0c0000         /bus@5d000000/gpio@5d0d0000         /bus@5d000000/gpio@5d0e0000         /bus@5d000000/gpio@5d0f0000         /bus@5d000000/spi@5d120000          /bus@5d000000/mailbox@5d1b0000          /bus@5d000000/mailbox@5d1c0000          /bus@5d000000/mailbox@5d1d0000          /bus@5d000000/mailbox@5d1e0000          (/bus@5d000000/mailbox@5d1f0000          1/bus@5d000000/mailbox@5d200000          :/bus@5d000000/mailbox@5d210000          C/bus@5d000000/mailbox@5d280000        (  M/bus@5d000000/clock-controller@5d400000       (  W/bus@5d000000/clock-controller@5d410000       (  a/bus@5d000000/clock-controller@5d420000       (  k/bus@5d000000/clock-controller@5d430000       (  u/bus@5d000000/clock-controller@5d440000       (  /bus@5d000000/clock-controller@5d450000       (  /bus@5d000000/clock-controller@5d460000       (  /bus@5d000000/clock-controller@5d470000         /clock-hsio-axi         /clock-hsio-per         /clock-hsio-refa            /clock-hsio-refb            /clock-xtal100m         /bus@5f000000           /bus@5f000000/pcie@5f010000         /bus@5f000000/pcie@5f010000         /bus@5f000000/pcie-ep@5f010000          /bus@5f000000/pcie-ep@5f010000        (   /bus@5f000000/clock-controller@5f060000       (  /bus@5f000000/clock-controller@5f0b0000       (  /bus@5f000000/clock-controller@5f0d0000       (  +/bus@5f000000/clock-controller@5f0f0000       (  :/bus@5f000000/clock-controller@5f090000         E/bus@5f000000/phy@5f1a0000          N/audio-codec-bt         [/imx8x-cm4          e/usdhc2-vmmc            u/gpio-sbu-mux/port/endpoint         /regulator-pcie         /regulator-audio            /regulator-audio-pwr            /regulator-audio-3v3            /regulator-audio-1v8            /regulator-can-en           /regulator-can-stby         /regulator-usbotg1-vbus       $  /sound-bt-sco/simple-audio-card,cpu          	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells fsl,pins linux,keycodes timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains clock-indices #mbox-cells memory-region clock-names pinctrl-names pinctrl-0 pinctrl-1 scl-gpios sda-gpios wlf,shared-lrclk wlf,hp-cfg wlf,gpio-cfg AVDD-supply DBVDD-supply DCVDD-supply SPKVDD1-supply SPKVDD2-supply gpio-controller #gpio-cells reset-gpios VA-supply VD-supply VLC-supply VLS-supply dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map assigned-clock-parents #sound-dai-cells #dma-cells dma-channels dma-channel-mask firmware-name fsl,sai-asynchronous dais #pwm-cells label power-role data-role source-pdos remote-endpoint #io-channel-cells fsl,clk-source fsl,scu-index xceiver-supply fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable hnp-disable srp-disable disable-over-current power-active-high vbus-supply #index-cells bus-width no-sd no-sdio non-removable fsl,tuning-start-tap fsl,tuning-step vmmc-supply cd-gpios wp-gpios fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode usb-role-switch #phy-cells gpio-ranges enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed vpcie-supply num-ib-windows num-ob-windows fsl,hsio-cfg fsl,refclk-pad-mode stdout-path fsl,entry-address fsl,resource-id regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high select-gpios orientation-switch regulator-always-on regulator-boot-on vin-supply simple-audio-card,bitclock-inversion simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai dai-tdm-slot-num dai-tdm-slot-width audio-asrc audio-codec audio-cpu audio-routing hp-det-gpio A35_0 A35_1 A35_2 A35_3 A35_L2 a35_opp_table gic decoder_boot encoder_boot decoder_rpc dsp_reserved encoder_rpc vdev0vring0 vdev0vring1 vdev1vring0 vdev1vring1 rsc_table vdevbuffer dsp_vdev0vring0 dsp_vdev0vring1 dsp_vdev0buffer gpu_reserved pd iomuxc pinctrl_cm40_i2c pinctrl_cm40_i2c_gpio pinctrl_esai0 pinctrl_fec1 pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_ioexp_rst pinctrl_isl29023 pinctrl_lpi2c1 pinctrl_lpuart0 pinctrl_lpuart2 pinctrl_lpuart3 pinctrl_pcieb pinctrl_typec pinctrl_typec_mux pinctrl_sai0 pinctrl_sai1 pinctrl_usdhc1 pinctrl_usdhc2 ocotp scu_key rtc tsens clk_dummy xtal32k xtal24m thermal_zones cpu_alert0 cpu_crit0 pmic_alert0 pmic_crit0 img_ipg_clk img_subsys jpegdec jpegenc img_jpeg_dec_lpcg img_jpeg_enc_lpcg vpu mu_m0 mu1_m0 vpu_core0 vpu_core1 cm40_ipg_clk cm40_subsys cm40_lpuart wm8960 pca6416 cs42888 cm40_intmux cm40_uart_lpcg cm40_i2c_lpcg gpu0_subsys gpu_3d0 audio_ipg_clk clk_ext_aud_mclk0 clk_ext_aud_mclk1 clk_esai0_rx_clk clk_esai0_rx_hf_clk clk_esai0_tx_clk clk_esai0_tx_hf_clk clk_spdif0_rx clk_sai0_rx_bclk clk_sai0_tx_bclk clk_sai1_rx_bclk clk_sai1_tx_bclk clk_sai2_rx_bclk clk_sai3_rx_bclk clk_sai4_rx_bclk audio_subsys asrc0 spdif0 sai2 sai3 edma0 asrc0_lpcg esai0_lpcg spdif0_lpcg sai1_lpcg sai2_lpcg sai3_lpcg dsp_lpcg dsp_ram_lpcg dsp asrc1 sai4 sai5 amix mqs edma1 aud_rec0_lpcg aud_rec1_lpcg aud_pll_div0_lpcg aud_pll_div1_lpcg mclkout0_lpcg mclkout1_lpcg acm asrc1_lpcg sai4_lpcg sai5_lpcg amix_lpcg mqs0_lpcg dma_ipg_clk dma_subsys lpspi0 lpspi1 lpspi2 lpspi3 lpuart1 adma_pwm edma2 spi0_lpcg spi1_lpcg spi2_lpcg spi3_lpcg uart0_lpcg uart1_lpcg uart2_lpcg uart3_lpcg adma_pwm_lpcg max7322 pca9557_a pca9557_b ptn5110 usb_con1 typec_dr_sw typec_con_ss adc0 adc1 flexcan3 edma3 i2c0_lpcg i2c1_lpcg i2c2_lpcg i2c3_lpcg adc0_lpcg adc1_lpcg can0_lpcg conn_axi_clk conn_ahb_clk conn_ipg_clk conn_bch_clk conn_subsys usbotg1 usbmisc1 usbphy1 usdhc3 ethphy0 fec2 usbotg3 usbotg3_cdns3 usb3_drd_sw usb3_phy sdhc0_lpcg sdhc1_lpcg sdhc2_lpcg enet0_lpcg enet1_lpcg usb2_lpcg usb3_lpcg rawnand_0_lpcg rawnand_4_lpcg dma_apbh gpmi ddr_subsys ddr_pmu0 lsio_bus_clk lsio_subsys lsio_pwm0 lsio_pwm1 lsio_pwm2 lsio_pwm3 lsio_gpio0 lsio_gpio1 lsio_gpio2 lsio_gpio3 lsio_gpio4 lsio_gpio5 lsio_gpio6 lsio_gpio7 flexspi0 lsio_mu0 lsio_mu1 lsio_mu2 lsio_mu3 lsio_mu4 lsio_mu5 lsio_mu6 lsio_mu13 pwm0_lpcg pwm1_lpcg pwm2_lpcg pwm3_lpcg pwm4_lpcg pwm5_lpcg pwm6_lpcg pwm7_lpcg hsio_axi_clk hsio_per_clk hsio_refa_clk hsio_refb_clk xtal100m hsio_subsys pcie0 pcie0_ep pcieb_ep pcieb_lpcg phyx1_crr1_lpcg pcieb_crr3_lpcg misc_crr5_lpcg phyx1_lpcg hsio_phy bt_sco_codec imx8x_cm4 reg_usdhc2_vmmc usb3_data_ss reg_pcieb reg_audio reg_audio_5v reg_audio_3v3 reg_audio_1v8 reg_can_en reg_can_stby reg_usb_otg1_vbus btcpu 