88(.radxa,nio-12lmediatek,mt8395mediatek,mt8195 +7Radxa NIO 12L =embeddedaliasesJ/soc/dp-intf@1c015000S/soc/dp-intf@1c113000\/soc/mailbox@10320000a/soc/mailbox@10330000f/soc/hdr-engine@1c114000m/soc/mutex@1c016000t/soc/mutex@1c101000{/soc/vpp-merge@1c10c000/soc/vpp-merge@1c10d000/soc/vpp-merge@1c10e000/soc/vpp-merge@1c10f000/soc/vpp-merge@1c110000/soc/dma-controller@1c104000/soc/dma-controller@1c105000/soc/dma-controller@1c106000/soc/dma-controller@1c107000/soc/dma-controller@1c108000/soc/dma-controller@1c109000/soc/dma-controller@1c10a000/soc/dma-controller@1c10b000/soc/i2c@11e02000/soc/i2c@11e03000/soc/i2c@11e04000/soc/i2c@11e00000 /soc/i2c@11e01000/soc/ethernet@11021000/soc/serial@11001100!/soc/serial@11001200)/soc/spi@11010000./soc/spi@11012000cpus+cpu@03cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@1003cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@2003cpuarm,cortex-a55?CpsciQeec3@u4@@ cpu@3003cpuarm,cortex-a55?CpsciQeec3@u4@@cpu@4003cpuarm,cortex-a78?CpsciQefu@@  cpu@5003cpuarm,cortex-a78?CpsciQefu@@  cpu@6003cpuarm,cortex-a78?CpsciQefu@@  cpu@7003cpuarm,cortex-a78?CpsciQefu@@  cpu-mapcluster0core0# core1# core2# core3#core4#core5#core6#core7#idle-states'pscicpu-retention-larm,idle-state4K\2m_}Dcpu-retention-barm,idle-state4K\-m}cpu-off-larm,idle-state4K\7m}Hcpu-off-barm,idle-state4K\2m}l2-cache0cache@l2-cache1cache@ l3-cachecache @dsu-pmu arm,dsu-pmu  faildmic-codec dmic-codec2mt8195-soundokaymediatek,mt8195_mt6359 7mt8395-evkdefault,HeadphoneHeadphone LHeadphoneHeadphone Rheadphone-dai-link "DL_SRC_BEcodec,fixed-factor-clock-13mfixed-factor-clock6CJT_clk13m/oscillator-26m fixed-clock6e_clk26moscillator-32k fixed-clock6e_clk32kperformance-controller@11bc10mediatek,cpufreq-hw ? 0 ropp-table-gpuoperating-points-v2{opp-390000000> hopp-410000000p opp-431000000 opp-4730000001h@ <opp-515000000F <opp-556000000!# Ҧopp-598000000# opp-640000000&% opp-670000000'c opp-700000000)' Lopp-730000000+ }opp-760000000-L `opp-790000000/q 4opp-82000000005 opp-8500000002 @opp-8800000004s qpmu-a55arm,cortex-a55-pmu pmu-a78arm,cortex-a78-pmu psci arm,psci-1.0Jsmctimerarm,armv8-timer @   soc+ simple-businterrupt-controller@c000000 arm,gic-v3  ?    ppi-partitionsinterrupt-partition-0 interrupt-partition-1syscon@10000000 mediatek,mt8195-topckgensyscon?6syscon@10001000#mediatek,mt8195-infracfg_aosyscon?6syscon@10003000mediatek,mt8195-pericfgsyscon?06Hpinctrl@10005000mediatek,mt8195-pinctrl?PBiocfg0iocfg_bmiocfg_bliocfg_briocfg_lmiocfg_rbiocfg_tleint+7Caudio-default-pinspins-cmd-datgFEGHIJKdsi0-backlight-pinspins-backlight-engkneth-default-pinsDpins-ccgUVWXzpins-mdiogYZpins-powerg[\npins-rstg]pins-rxdgQRSTpins-txdgMNOPzeth-sleep-pinsEpins-ccgUVWXpins-mdiogYZpins-rxdgQRSTpins-txdgMNOPi2c2-pinsipins-busg  zi2c4-pinslpins-busgi2c6-pinsbpinsgmmc0-default-pinsMpins-clkgzfzpins-cmd-dat$g~}|{wvutyezpins-rstgxezmmc0-uhs-pinsNpins-clkgzfzpins-cmd-dat$g~}|{wvutyezpins-dsgfzpins-rstgxezmmc1-default-pinsQpins-clkgofzpins-cmd-datgnpqrsezmmc1-detect-pinsRpins-insertgmt6360-pinscpins-irqgdepanel-pinspins-rstglpcie0-default-pins]pins-bus gpcie1-default-pins`pins-bus gpwm0-pinspins-disp-pwmgaspi1-default-pins>pins-busgspi2-default-pins?pins-busgtouch-pinspins-touch-intgpins-touch-rstgnuart0-pins9pins-busgbcuart1-pins:pins-busgfgusb3p0-default-pinsIpins-vbusg?usb2p0-default-pinsXpins-iddiggpins-vbusgwifi-vreg-pinspins-wifi-pmu-engAnpins-wifi-vreg-engCsyscon@10006000)mediatek,mt8195-scpsyssysconsimple-mfd?`power-controller!mediatek,mt8195-power-controller+2power-domain@8?+power-domain@9? Cmfgalt+ power-domain@10? power-domain@11? power-domain@12? power-domain@13? power-domain@14?power-domain@15?C @AK! ! !!!!!!!!!!!!!!!!! vppsysvppsys1vppsys2vppsys3vppsys4vppsys5vppsys6vppsys7vppsys0-0vppsys0-1vppsys0-2vppsys0-3vppsys0-4vppsys0-5vppsys0-6vppsys0-7vppsys0-8vppsys0-9vppsys0-10vppsys0-11vppsys0-12vppsys0-13vppsys0-14vppsys0-15vppsys0-16vppsys0-17vppsys0-18+power-domain@16?8C"$"%"&"'"(")Dvdosys0vdosys0-0vdosys0-1vdosys0-2vdosys0-3vdosys0-4vdosys0-5+power-domain@17?C##vppsys1vppsys1-0vppsys1-1power-domain@22? C$$$$$wepsys-0wepsys-1wepsys-2wepsys-3power-domain@23?C%vdec0-0+power-domain@24?C&vdec1-0power-domain@25?C'vdec2-0power-domain@26?C( venc0-larb+power-domain@27?C) venc1-larbpower-domain@18? C***&vdosys1vdosys1-0vdosys1-1vdosys1-2+power-domain@19?power-domain@20?power-domain@21?CQhdmi_txpower-domain@28?C++  img-0img-1+power-domain@29?power-domain@30?C+,ipeipe-0ipe-1power-domain@31?(C-----cam-0cam-1cam-2cam-3cam-4+power-domain@32? power-domain@33?!power-domain@34?"power-domain@0?power-domain@1?power-domain@2?power-domain@3?power-domain@4?C57csi_rx_topcsi_rx_top1power-domain@5?C. etherpower-domain@6?CXn adspadsp1+power-domain@7? Cg"n2audioaudio1audio2audio3watchdog@10007000mediatek,mt8195-wdt0?p7syscon@1000c000"mediatek,mt8195-apmixedsyssyscon?6timer@10017000,mediatek,mt8195-timermediatek,mt6765-timer?p C/pwrap@10024000mediatek,mt8195-pwrapsyscon?@pwrapC spiwrapH$Xpmicmediatek,mt6359o adcmediatek,mt6359-auxadcaudio-codecmediatek,mt6359-codecregulatorsmediatek,mt6359-regulatorbuck_vs1vs1 5!buck_vgpu11vgpu117 *buck_vmodemvmodem*buck_vpuvpu7 *buck_vcorevcore  *buck_vs2vs2 5jbuck_vpavpa 7,buck_vproc2vproc27L *buck_vproc1vproc17L *buck_vcore_sshub vcore_sshub7buck_vgpu11_sshub vgpu11_sshub7ldo_vaud18vaud18w@w@ldo_vsim1vsim1/M`ldo_vibrvibrO2Zjldo_vrf12vrf12 ldo_vusbvusb--Jldo_vsram_proc2 vsram_proc2 Lldo_vio18vio18ldo_vcamiovcamioldo_vcn18vcn18w@w@ldo_vfe28vfe28**xldo_vcn13vcn13  ldo_vcn33_1_bt vcn33_1_bt*5gldo_vcn33_1_wifi vcn33_1_wifi*5gldo_vaux18vaux18w@w@ldo_vsram_others vsram_others q q ldo_vefusevefuseldo_vxo22vxo22w@!ldo_vrfckvrfck`ldo_vrfck_1vrfckjldo_vbif28vbif28**ldo_vio28vio28*2Zldo_vemcvemc,@ 2Zldo_vemc_1vemc&%2ZOldo_vcn33_2_bt vcn33_2_bt2Z2Zldo_vcn33_2_wifi vcn33_2_wifi*5gldo_va12va12O ldo_va09va09 5Oldo_vrf18vrf18Pldo_vsram_md vsram_md *ldo_vufsvufsPldo_vm18vm18ldo_vbbckvbbckOldo_vsram_proc1 vsram_proc1 Lldo_vsim2vsim2/M`ldo_vsram_others_sshubvsram_others_sshub rtcmediatek,mt6358-rtcspmi@10027000mediatek,mt8195-spmi ?p pmifspmimstCE(pmif_sys_ckpmif_tmr_ckspmimst_clk_muxH$X+pmic@6mediatek,mt6315-regulator?regulatorsvbuck1Vbcpu7 * pmic@7mediatek,mt6315-regulator?regulatorsvbuck1Vgpu7 *infra-iommu@10315000mediatek,mt8195-iommu-infra?1PPPBZmailbox@10320000mediatek,mt8195-gce?2@OCmailbox@10330000mediatek,mt8195-gce?3@OC|scp@10500000mediatek,mt8195-scp0?Prpsramcfgl1tcmokay[0imediatek/mt8195/scp.img}clock-controller@10720000mediatek,mt8195-scp_adsp?r61dsp@10803000mediatek,mt8195-dsp ?0 cfgsram,CXn1#Kadsp_selclk26m_ckaudio_local_busmainpll_d7_d2scp_adsp_audiodspaudio_hw2rxtx34okay[56mailbox@10816000mediatek,mt8195-adsp-mboxO?`3mailbox@10817000mediatek,mt8195-adsp-mboxO?p4mt8195-afe-pcm@10890000mediatek,mt8195-audio?w267 audiosysCg"#neabcd21clk26mapll1_ckapll2_ckapll12_div0apll12_div1apll12_div2apll12_div3apll12_div9a1sys_hp_selaud_intbus_selaudio_h_selaudio_local_bus_seldptx_m_seli2so1_m_seli2so2_m_seli2si1_m_seli2si2_m_selinfra_ao_audio_26m_bscp_adsp_audiodspokay[8serial@11001100*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbusokay9defaultserial@11001200*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbusokay:defaultserial@11001300*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabledserial@11001400*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled serial@11001500*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled serial@11001600*mediatek,mt8195-uartmediatek,mt6577-uart? C baudbus disabled auxadc@11002000.mediatek,mt8195-auxadcmediatek,mt8173-auxadc? Cmain disabled syscon@11003000"mediatek,mt8195-pericfg_aosyscon?06.spi@1100a000(mediatek,mt8195-spimediatek,mt6765-spi+?Cparent-clksel-clkspi-clk disabled thermal-sensor@1100b000mediatek,mt8195-lvts-ap? C;<$lvts-calib-data-1lvts-calib-data-2svs@1100bc00mediatek,mt8195-svs?Cmain=;(svs-calibration-datat-calibration-datasvs_rstpwm@1100e0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?w2C*0mainmm disabledpwm@1100f0002mediatek,mt8195-disp-pwmmediatek,mt8183-disp-pwm?C+Nmainmm disabledspi@11010000(mediatek,mt8195-spimediatek,mt6765-spi+?C3parent-clksel-clkspi-clkokay>defaultspi@11012000(mediatek,mt8195-spimediatek,mt6765-spi+? C4parent-clksel-clkspi-clkokay?defaultspi@11013000(mediatek,mt8195-spimediatek,mt6765-spi+?0C5parent-clksel-clkspi-clk disabledspi@11018000(mediatek,mt8195-spimediatek,mt6765-spi+?C<parent-clksel-clkspi-clk disabledspi@11019000(mediatek,mt8195-spimediatek,mt6765-spi+?C=parent-clksel-clkspi-clk disabledspi@1101d000mediatek,mt8195-spi-slave?CRspiHX disabledspi@1101e000mediatek,mt8195-spi-slave?CSspiHX disabledethernet@11021000&mediatek,mt8195-gmacsnps,dwmac-5.10a?@macirq.axiapbmac_mainptp_refrmii_internalmac_cg0C..RST. HRSTXw2/@?ARBep{okay rgmii-rxidCdefaultsleepDE ] N mdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-id001c.c916?Cstmmac-axi-config@rx-queues-config1Aqueue0BUqueue1BUqueue2BUqueue3BUtx-queues-configmBqueue0Bqueue1Bqueue2Bqueue3Busb@11201000#mediatek,mt8195-mtu3mediatek,mtu3 ? - > macippc ?+C/Bsys_ckref_ckmcu_ckFG HgokaydefaultIhost Jusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH,-X$C/B$sys_ckref_ckmcu_ckdma_ckxhci_ckokay Kportendpoint Lfmmc@11230000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?#Csourcehclksource_cgokaydefaultstate_uhsMN , 6  DL S e v     O Pmmc@11240000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?$C$sourcehclksource_cgHXokaydefaultstate_uhsQRQ , 6        S Tmmc@11250000(mediatek,mt8195-mmcmediatek,mt8183-mmc ?%C Isourcehclksource_cgH X disabledthermal-sensor@11278000mediatek,mt8195-lvts-mcu?'C;<$lvts-calib-data-1lvts-calib-data-2usb@11290000'mediatek,mt8195-xhcimediatek,mtk-xhci ?))> macippcUH./X$C..$sys_ckref_ckmcu_ckdma_ckxhci_ck Hhokay  J V usb@112a1000#mediatek,mt8195-mtu3mediatek,mtu3 ?*-*> macippc*?+H0XC..sys_ckref_ckmcu_ckW HiokaydefaultX Jusb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH1XC.sys_ckokay Vusb@112b1000#mediatek,mt8195-mtu3mediatek,mtu3 ?+-+> macippc+?+H2XC.. sys_ckref_ckmcu_ckY Hj disabled usb@0'mediatek,mt8195-xhcimediatek,mtk-xhci?macH3XC. sys_ck disabled!pcie@112f0000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/@ pcie-mac +8  5Z ?0CV#&+K./pl_250mtl_26mtl_96mtl_32kperi_26mperi_memHGX[ Npcie-phyw2mac X` k\\\\okaydefault]"interrupt-controller\pcie@112f8000*mediatek,mt8195-pciemediatek,mt8192-pcie3pci+?/@ pcie-mac +8$$ $ $  5Z ?(CWXQ./pl_250mtl_26mtl_96mtl_32kperi_26mperi_memHHX^ Npcie-phyw2 X` k____okaydefault`#interrupt-controller_spi@1132c000(mediatek,mt8195-normediatek,mt8173-nor?29Co.. spisfaxi+ disabled$efuse@11c10000%mediatek,mt8195-efusemediatek,efuse?+%usb3-tx-imp@184,1? yrusb3-rx-imp@184,2? yqusb3-intr@185? ypusb3-tx-imp@186,1? yousb3-rx-imp@186,2? ynusb3-intr@187? ymusb2-intr-p0@188,1? y&usb2-intr-p1@188,2? y'usb2-intr-p2@189,1? y(usb2-intr-p3@189,2? y)pciephy-rx-ln1@190,1? yypciephy-tx-ln1-nmos@190,2? yxpciephy-tx-ln1-pmos@191,1? ywpciephy-rx-ln0@191,2? yvpciephy-tx-ln0-nmos@192,1? yupciephy-tx-ln0-pmos@192,2? ytpciephy-glb-intr@193? ysdp-data@1ac?lvts1-calib@1bc?;lvts2-calib@1d0?8<svs-calib@580?d=socinfo-data1@7a0?t-phy@11c40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+okay*usb-phy@0?Cref ~Wt-phy@11c50000.mediatek,mt8195-tphymediatek,generic-tphy-v3+ disabled+usb-phy@0?Cref ~Ydsi-phy@11c800000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?C _mipi_tx0_pll6 ~ disableddsi-phy@11c900000mediatek,mt8195-mipi-txmediatek,mt8183-mipi-tx?C _mipi_tx1_pll6 ~ disabledi2c@11d00000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCa; maindma+ disabled,i2c@11d01000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCa; maindma+okayebdefault-pmic@34mediatek,mt6360?4 eIRQBc.chargermediatek,mt6360-chg @usb-otg-vbus-regulator usb-otg-vbusC(XKregulatormediatek,mt6360-regulator d ebuck1 emi_vdd2  */buck2 emi_vddq  *eldo1 ext_lcd_3v32Z2Z*0ldo2 panel1_p1v8w@w@*1ldo3vmc_pmuO6*Tldo5 vmch_pmu2Z2Z*Sldo6 mt6360_ldo6  *2ldo7 emi_vmddr_en  *3typecmediatek,mt6360-tcpc dPD_IRQBconnectorusb-c-connector USB-C dual  dual sink "d ",ports+port@0?endpoint fLport@2?endpoint gki2c@11d02000(mediatek,mt8195-i2cmediatek,mt8192-i2c ? "JCa; maindma+ disabled4clock-controller@11d03000mediatek,mt8195-imp_iic_wrap_s?06ai2c@11e00000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCh; maindma+ disabled5i2c@11e01000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?"JCh; maindma+ disabled6i2c@11e02000(mediatek,mt8195-i2cmediatek,mt8192-i2c ? "JCh; maindma+okayeidefault7typec-mux@48 ite,it5205?H   3jportendpoint kgi2c@11e03000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?0"JCh; maindma+ disabled8i2c@11e04000(mediatek,mt8195-i2cmediatek,mt8192-i2c ?@"JCh; maindma+okayeldefault9clock-controller@11e05000mediatek,mt8195-imp_iic_wrap_w?P6ht-phy@11e30000.mediatek,mt8195-tphymediatek,generic-tphy-v3+w2okay:usb-phy@0? C refda_ref ~Uusb-phy@700?C refda_ref mnointrrx_imptx_imp ~^t-phy@11e40000.mediatek,mt8195-tphymediatek,generic-tphy-v3+okay;usb-phy@0? C refda_ref ~Fusb-phy@700?C refda_ref pqrintrrx_imptx_imp ~Gphy@11e80000mediatek,mt8195-pcie-phy?sifstuvwxyGglb_intrtx_ln0_pmostx_ln0_nmosrx_ln0tx_ln1_pmostx_ln1_nmosrx_ln1w2 ~okay[ufs-phy@11fa0000.mediatek,mt8195-ufsphymediatek,mt8183-ufsphy?C unipromp ~ disabled<gpu@13000000>mediatek,mt8195-malimediatek,mt8192-maliarm,mali-valhall-jm?@Cz0 jobmmugpu >{(w2 2 2 2 2 Rcore0core1core2core3core4okay e=clock-controller@13fbf000mediatek,mt8195-mfgcfg?6zsyscon@14000000mediatek,mt8195-vppsys0syscon?6 q|!dma-controller@14001000mediatek,mt8195-mdp3-rdma? q|   }w2 ~C!<| | ||| display@14002000mediatek,mt8195-mdp3-fg?  q| C!display@14003000mediatek,mt8195-mdp3-stitch?0 q|0C!display@14004000mediatek,mt8195-mdp3-hdr?@ q|@C!"display@14005000mediatek,mt8195-mdp3-aal?PF q|PC! w2display@140060002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?` q|` %C! display@14007000mediatek,mt8195-mdp3-tdshp?p q|pC!#display@14008000mediatek,mt8195-mdp3-color?I q|C!$w2display@14009000mediatek,mt8195-mdp3-ovl?J q|C!%w2 ~display@1400a000mediatek,mt8195-mdp3-padding? q|C!w2display@1400b000mediatek,mt8195-mdp3-tcc? q|C!dma-controller@1400c0004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot? q|  +C! ~w2 mutex@1400f000mediatek,mt8195-vpp-mutex?P q|C!w2smi@14010000mediatek,mt8195-smi-sub-common?C!!!apbsmigals0 w2smi@14011000mediatek,mt8195-smi-sub-common?C!!!apbsmigals0 w2smi@14012000mediatek,mt8195-smi-common-vpp?  C!!!!apbsmigals0gals1w2larb@14013000mediatek,mt8195-smi-larb?0  C!!apbsmiw2iommu@14018000mediatek,mt8195-iommu-vpp?8 RC!bclkBw2~clock-controller@14e00000mediatek,mt8195-wpesys?6$clock-controller@14e02000mediatek,mt8195-wpesys_vpp0? 6>clock-controller@14e03000mediatek,mt8195-wpesys_vpp1?06?larb@14e04000mediatek,mt8195-smi-larb?@  C$$apbsmiw2larb@14e05000mediatek,mt8195-smi-larb?P  C$$! apbsmigalsw2syscon@14f00000mediatek,mt8195-vppsys1syscon?6 q| #mutex@14f01000mediatek,mt8195-vpp-mutex?{ q| C#'w2larb@14f02000mediatek,mt8195-smi-larb?   C##! apbsmigalsw2larb@14f03000mediatek,mt8195-smi-larb?0  C##! apbsmigalsw2display@14f06000mediatek,mt8195-mdp3-split?` q| `C##+#,w2display@14f07000mediatek,mt8195-mdp3-tcc?p q| pC#dma-controller@14f08000mediatek,mt8195-mdp3-rdma? q|  C# w2 dma-controller@14f09000mediatek,mt8195-mdp3-rdma? q|  C#  w2 dma-controller@14f0a000mediatek,mt8195-mdp3-rdma? q|  C#  ~w2 display@14f0b000mediatek,mt8195-mdp3-fg? q| C# display@14f0c000mediatek,mt8195-mdp3-fg? q| C# display@14f0d000mediatek,mt8195-mdp3-fg? q| C# display@14f0e000mediatek,mt8195-mdp3-hdr? q| C#display@14f0f000mediatek,mt8195-mdp3-hdr? q| C#display@14f10000mediatek,mt8195-mdp3-hdr? q| C# display@14f11000mediatek,mt8195-mdp3-aal?i q| C#w2display@14f12000mediatek,mt8195-mdp3-aal? j q| C#w2display@14f13000mediatek,mt8195-mdp3-aal?0k q| 0C#!w2display@14f140002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?@ q| @ C#display@14f150002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?P q| P C#$display@14f160002mediatek,mt8195-mdp3-rszmediatek,mt8183-mdp3-rsz?` q| ` C#%display@14f17000mediatek,mt8195-mdp3-tdshp?p q| pC#display@14f18000mediatek,mt8195-mdp3-tdshp? q| C#(display@14f19000mediatek,mt8195-mdp3-tdshp? q| C#)display@14f1a000mediatek,mt8195-mdp3-merge? q| C#w2display@14f1b000mediatek,mt8195-mdp3-merge? q| C#w2display@14f1c000mediatek,mt8195-mdp3-color?t q| C#w2display@14f1d000mediatek,mt8195-mdp3-color? q| uC#w2display@14f1e000mediatek,mt8195-mdp3-color?v q| C#w2display@14f1f000mediatek,mt8195-mdp3-ovl?w q| C#w2 display@14f20000mediatek,mt8195-mdp3-padding? q| C#w2display@14f21000mediatek,mt8195-mdp3-padding? q| C#w2display@14f22000mediatek,mt8195-mdp3-padding?  q| C#w2dma-controller@14f230004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?0 q| 0 C# w2 dma-controller@14f240004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?@ q| @ C# w2 dma-controller@14f250004mediatek,mt8195-mdp3-wrotmediatek,mt8183-mdp3-wrot?P q| P C# ~w2 clock-controller@15000000mediatek,mt8195-imgsys?6+larb@15001000mediatek,mt8195-smi-larb?  C+++  apbsmigalsw2smi@15002000mediatek,mt8195-smi-sub-common? C++!apbsmigals0 w2smi@15003000mediatek,mt8195-smi-sub-common?0C+++ apbsmigals0 w2clock-controller@15110000 mediatek,mt8195-imgsys1_dip_top?6larb@15120000mediatek,mt8195-smi-larb?  C+apbsmiw2clock-controller@15130000mediatek,mt8195-imgsys1_dip_nr?6@clock-controller@15220000mediatek,mt8195-imgsys1_wpe?"6larb@15230000mediatek,mt8195-smi-larb?#  C+apbsmiw2clock-controller@15330000mediatek,mt8195-ipesys?36,larb@15340000mediatek,mt8195-smi-larb?4  C,,apbsmiw2clock-controller@16000000mediatek,mt8195-camsys?6-larb@16001000mediatek,mt8195-smi-larb?  C--- apbsmigalsw2larb@16002000mediatek,mt8195-smi-larb?   C--apbsmiw2smi@16004000mediatek,mt8195-smi-sub-common?@C---apbsmigals0 w2smi@16005000mediatek,mt8195-smi-sub-common?PC--!apbsmigals0 w2larb@16012000mediatek,mt8195-smi-larb?   Capbsmiw2 larb@16013000mediatek,mt8195-smi-larb?0  Capbsmiw2 larb@16014000mediatek,mt8195-smi-larb?@  Capbsmiw2!larb@16015000mediatek,mt8195-smi-larb?P  Capbsmiw2!clock-controller@1604f000mediatek,mt8195-camsys_rawa?6clock-controller@1606f000mediatek,mt8195-camsys_yuva?6clock-controller@1608f000mediatek,mt8195-camsys_rawb?6clock-controller@160af000mediatek,mt8195-camsys_yuvb? 6clock-controller@16140000mediatek,mt8195-camsys_mraw?6larb@16141000mediatek,mt8195-smi-larb?  C-- apbsmigalsw2"larb@16142000mediatek,mt8195-smi-larb?   Capbsmiw2"clock-controller@17200000mediatek,mt8195-ccusys? 6larb@17201000mediatek,mt8195-smi-larb?   Capbsmiw2video-codec@18000000mediatek,mt8195-vcodec-dec } + ?@`video-codec@2000mediatek,mtk-vcodec-lat-soc?  ~~ CA%%selvdeclattopHAXw2video-codec@10000mediatek,mtk-vcodec-lat?0  CA%%selvdeclattopHAXw2video-codec@25000mediatek,mtk-vcodec-core?PP  CA&&selvdeclattopHAXw2larb@1800d000mediatek,mt8195-smi-larb?  C%%apbsmiw2larb@1800e000mediatek,mt8195-smi-larb?  C!%apbsmiw2clock-controller@1800f000mediatek,mt8195-vdecsys_soc?6%larb@1802e000mediatek,mt8195-smi-larb?  C&&apbsmiw2clock-controller@1802f000mediatek,mt8195-vdecsys?6&larb@1803e000mediatek,mt8195-smi-larb?  C!'apbsmiw2clock-controller@1803f000mediatek,mt8195-vdecsys_core1?6'clock-controller@190f3000mediatek,mt8195-apusys_pll?06Aclock-controller@1a000000mediatek,mt8195-vencsys?6(larb@1a010000mediatek,mt8195-smi-larb?  C((apbsmiw2video-codec@1a020000mediatek,mt8195-vcodec-enc?H `abcdvwxyU }C( venc_selH@Xw2+Bjpgdec-mastermediatek,mt8195-jpgdecw20 mnrstu+jpgdec@1a040000mediatek,mt8195-jpgdec-hw?0 mnrstuWC(jpgdecw2jpgdec@1a050000mediatek,mt8195-jpgdec-hw?0 mnrstuXC(jpgdecw2jpgdec@1b040000mediatek,mt8195-jpgdec-hw?0 ~~~~~~\C)jpgdecw2clock-controller@1b000000mediatek,mt8195-vencsys_core1?6)syscon@1c01a0005mediatek,mt8195-vdosys0mediatek,mt8195-mmsyssyscon? 6 q"jpgenc-mastermediatek,mt8195-jpgencw2 ~~~~+jpgenc@1a030000mediatek,mt8195-jpgenc-hw? ghilVC(jpgencw2jpgenc@1b030000mediatek,mt8195-jpgenc-hw? ~~~~[C)jpgencw2larb@1b010000mediatek,mt8195-smi-larb?  C))!  apbsmigalsw2ovl@1c000000mediatek,mt8195-disp-ovl?|w2C"  qCports+port@0?endpointDport@1?endpoint rdma@1c002000mediatek,mt8195-disp-rdma? ~w2C"  q Eports+port@0?endpoint port@1?endpoint color@1c0030006mediatek,mt8195-disp-colormediatek,mt8173-disp-color?0w2C" q0Fports+port@0?endpoint port@1?endpoint ccorr@1c0040006mediatek,mt8195-disp-ccorrmediatek,mt8192-disp-ccorr?@w2C" q@Gports+port@0?endpoint port@1?endpoint aal@1c0050002mediatek,mt8195-disp-aalmediatek,mt8183-disp-aal?Pw2C" qPHports+port@0?endpoint port@1?endpoint gamma@1c0060006mediatek,mt8195-disp-gammamediatek,mt8183-disp-gamma?`w2C" q`Iports+port@0?endpoint port@1?endpoint dither@1c0070008mediatek,mt8195-disp-dithermediatek,mt8183-disp-dither?pw2C"  qpJports+port@0?endpoint port@1?endpoint dsi@1c008000(mediatek,mt8195-dsimediatek,mt8183-dsi?w2C""*enginedigitalhs Ndphy disabled+Kports+port@0?endpoint port@1?endpointLdsc@1c009000mediatek,mt8195-disp-dsc?w2C" qMdsi@1c012000(mediatek,mt8195-dsimediatek,mt8183-dsi? w2C""+enginedigitalhs Ndphy disabledNmerge@1c014000mediatek,mt8195-disp-merge?@w2C" q@Odp-intf@1c015000mediatek,mt8195-dp-intf?Pw2C","pixelenginepll disabledPmutex@1c016000mediatek,mt8195-disp-mutex?`w2C" q` UQlarb@1c018000mediatek,mt8195-smi-larb?  C"("(!  apbsmigalsw2larb@1c019000mediatek,mt8195-smi-larb?  C"(! ! apbsmigalsw2syscon@1c100000mediatek,mt8195-vdosys1syscon?  q6*smi@1c01b000mediatek,mt8195-smi-common-vdo? C"%"&")"$apbsmigals0gals1w2iommu@1c01f000mediatek,mt8195-iommu-vdo?8 BC"'bclkw2mutex@1c101000mediatek,mt8195-disp-mutex?w2C* q Rlarb@1c102000mediatek,mt8195-smi-larb?   C*** apbsmigalsw2larb@1c103000mediatek,mt8195-smi-larb?0  C**!  apbsmigalsw2dma-controller@1c104000mediatek,mt8195-vdo1-rdma?@C*w2 @ q@ Sdma-controller@1c105000mediatek,mt8195-vdo1-rdma?PC*w2 ~` qP Tdma-controller@1c106000mediatek,mt8195-vdo1-rdma?`C*w2 A q` Udma-controller@1c107000mediatek,mt8195-vdo1-rdma?pC*w2 ~a qp Vdma-controller@1c108000mediatek,mt8195-vdo1-rdma?C*w2 B q Wdma-controller@1c109000mediatek,mt8195-vdo1-rdma?C*w2 ~b q Xdma-controller@1c10a000mediatek,mt8195-vdo1-rdma?C*w2 C q Ydma-controller@1c10b000mediatek,mt8195-vdo1-rdma?C*w2 ~c q Zvpp-merge@1c10c000mediatek,mt8195-disp-merge?C* *mergemerge_asyncw2 q *[vpp-merge@1c10d000mediatek,mt8195-disp-merge?C* *mergemerge_asyncw2 q *\vpp-merge@1c10e000mediatek,mt8195-disp-merge?C* *mergemerge_asyncw2 q *]vpp-merge@1c10f000mediatek,mt8195-disp-merge?C* *mergemerge_asyncw2 q *^vpp-merge@1c110000mediatek,mt8195-disp-merge?C* *mergemerge_asyncw2 q *_dp-intf@1c113000mediatek,mt8195-dp-intf?0w2C*/*pixelenginepll disabled`hdr-engine@1c114000mediatek,mt8195-disp-ethdrp?@Pp4mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsp q@PphC*%* *#*!*$*"*1*&*'*(*)**mixervdo_fe0vdo_fe1gfx_fe0gfx_fe1vdo_beadl_dsvdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncethdr_topw2 ~d~e(*3*4*5*6*7Evdo_fe0_asyncvdo_fe1_asyncgfx_fe0_asyncgfx_fe1_asyncvdo_be_asyncaedp-tx@1c500000mediatek,mt8195-edp-tx?Pdp_calibration_dataw2  disabledbdp-tx@1c600000mediatek,mt8195-dp-tx?`dp_calibration_dataw2  disabledcthermal-zonesdcpu0-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalecooling-mapsmap0 p0 u cpu1-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalfcooling-mapsmap0 p0 u cpu2-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalgcooling-mapsmap0 p0 u cpu3-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalhcooling-mapsmap0 p0 u cpu4-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalicooling-mapsmap0 p0 ucpu5-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticaljcooling-mapsmap0 p0 ucpu6-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticalkcooling-mapsmap0 p0 ucpu7-thermal % 3 Itripstrip-alert YL eEpassivetrip-crit Y e Ecriticallcooling-mapsmap0 p0 uvpu0-thermal % 3 Itripstrip-alert YL eEpassivemtrip-crit Y e Ecriticalnvpu1-thermal % 3 I tripstrip-alert YL eEpassiveotrip-crit Y e Ecriticalpgpu-thermal % 3 I tripstrip-alert YL eEpassiveqtrip-crit Y e Ecriticalrgpu1-thermal % 3 I tripstrip-alert YL eEpassivestrip-crit Y e Ecriticaltvdec-thermal % 3 I tripstrip-alert YL eEpassiveutrip-crit Y e Ecriticalvimg-thermal % 3 I tripstrip-alert YL eEpassivewtrip-crit Y e Ecriticalxinfra-thermal % 3 Itripstrip-alert YL eEpassiveytrip-crit Y e Ecriticalzcam0-thermal % 3 Itripstrip-alert YL eEpassive{trip-crit Y e Ecritical|cam1-thermal % 3 Itripstrip-alert YL eEpassive}trip-crit Y e Ecritical~chosen serial0:921600n8firmwareopteelinaro,optee-tzJsmcmemory@400000003memory?@backlightpwm-backlight  @ k default   disabledregulator-wifi-3v3-enregulator-fixed wifi_3v3_en2Z2Z  Cdefault Vregulator-vsysregulator-fixedvsys LK@LK@ Vregulator-vsys-buckregulator-fixed vsys_buck LK@LK@ dregulator-vcc5v0-sysregulator-fixed vcc5v0_sys reserved-memory+optee@43200000?C  memory@50000000shared-dma-pool?P 0memory@53000000shared-dma-pool?S@memory@54600000?T`  memory@60000000shared-dma-pool?` 6memory@60f00000shared-dma-pool?` 8memory@61000000shared-dma-pool?a 5memory@62000000shared-dma-pool?b@__symbols__ /cpus/cpu@0 /cpus/cpu@100 %/cpus/cpu@200 */cpus/cpu@300 //cpus/cpu@400 4/cpus/cpu@500 9/cpus/cpu@600 >/cpus/cpu@700" C/cpus/idle-states/cpu-retention-l" M/cpus/idle-states/cpu-retention-b W/cpus/idle-states/cpu-off-l a/cpus/idle-states/cpu-off-b k/cpus/l2-cache0 p/cpus/l2-cache1 u/cpus/l3-cache z/dmic-codec /mt8195-sound /fixed-factor-clock-13m /oscillator-26m /oscillator-32k /performance-controller@11bc10 /opp-table-gpu /timer" /soc/interrupt-controller@c000000G /soc/interrupt-controller@c000000/ppi-partitions/interrupt-partition-0G /soc/interrupt-controller@c000000/ppi-partitions/interrupt-partition-1/soc/syscon@10000000 /soc/syscon@10001000'/soc/syscon@10003000/soc/pinctrl@10005000) /soc/pinctrl@10005000/audio-default-pins* /soc/pinctrl@10005000/dsi0-backlight-pins'/soc/pinctrl@10005000/eth-default-pins%"/soc/pinctrl@10005000/eth-sleep-pins 1/soc/pinctrl@10005000/i2c2-pins ;/soc/pinctrl@10005000/i2c4-pins E/soc/pinctrl@10005000/i2c6-pins(O/soc/pinctrl@10005000/mmc0-default-pins$a/soc/pinctrl@10005000/mmc0-uhs-pins(o/soc/pinctrl@10005000/mmc1-default-pins'/soc/pinctrl@10005000/mmc1-detect-pins"/soc/pinctrl@10005000/mt6360-pins!/soc/pinctrl@10005000/panel-pins)/soc/pinctrl@10005000/pcie0-default-pins)/soc/pinctrl@10005000/pcie1-default-pins /soc/pinctrl@10005000/pwm0-pins(/soc/pinctrl@10005000/spi1-default-pins(/soc/pinctrl@10005000/spi2-default-pins!/soc/pinctrl@10005000/touch-pins!/soc/pinctrl@10005000/uart0-pins!/soc/pinctrl@10005000/uart1-pins*/soc/pinctrl@10005000/usb3p0-default-pins*./soc/pinctrl@10005000/usb2p0-default-pins%>/soc/pinctrl@10005000/wifi-vreg-pinsM/soc/syscon@10006000&T/soc/syscon@10006000/power-controller5X/soc/syscon@10006000/power-controller/power-domain@8D]/soc/syscon@10006000/power-controller/power-domain@8/power-domain@9b/soc/watchdog@10007000k/soc/syscon@1000c000v/soc/timer@10017000/soc/pwrap@10024000/soc/pwrap@10024000/pmic/soc/pwrap@10024000/pmic/adc%/soc/pwrap@10024000/pmic/audio-codec-/soc/pwrap@10024000/pmic/regulators/buck_vs10/soc/pwrap@10024000/pmic/regulators/buck_vgpu110/soc/pwrap@10024000/pmic/regulators/buck_vmodem-/soc/pwrap@10024000/pmic/regulators/buck_vpu//soc/pwrap@10024000/pmic/regulators/buck_vcore- /soc/pwrap@10024000/pmic/regulators/buck_vs2-/soc/pwrap@10024000/pmic/regulators/buck_vpa03/soc/pwrap@10024000/pmic/regulators/buck_vproc20J/soc/pwrap@10024000/pmic/regulators/buck_vproc15a/soc/pwrap@10024000/pmic/regulators/buck_vcore_sshub6}/soc/pwrap@10024000/pmic/regulators/buck_vgpu11_sshub//soc/pwrap@10024000/pmic/regulators/ldo_vaud18./soc/pwrap@10024000/pmic/regulators/ldo_vsim1-/soc/pwrap@10024000/pmic/regulators/ldo_vibr./soc/pwrap@10024000/pmic/regulators/ldo_vrf12-/soc/pwrap@10024000/pmic/regulators/ldo_vusb4/soc/pwrap@10024000/pmic/regulators/ldo_vsram_proc2./soc/pwrap@10024000/pmic/regulators/ldo_vio18/2/soc/pwrap@10024000/pmic/regulators/ldo_vcamio.H/soc/pwrap@10024000/pmic/regulators/ldo_vcn18.]/soc/pwrap@10024000/pmic/regulators/ldo_vfe28.r/soc/pwrap@10024000/pmic/regulators/ldo_vcn133/soc/pwrap@10024000/pmic/regulators/ldo_vcn33_1_bt5/soc/pwrap@10024000/pmic/regulators/ldo_vcn33_1_wifi//soc/pwrap@10024000/pmic/regulators/ldo_vaux185/soc/pwrap@10024000/pmic/regulators/ldo_vsram_others//soc/pwrap@10024000/pmic/regulators/ldo_vefuse./soc/pwrap@10024000/pmic/regulators/ldo_vxo22./soc/pwrap@10024000/pmic/regulators/ldo_vrfck0//soc/pwrap@10024000/pmic/regulators/ldo_vrfck_1/F/soc/pwrap@10024000/pmic/regulators/ldo_vbif28.\/soc/pwrap@10024000/pmic/regulators/ldo_vio28-q/soc/pwrap@10024000/pmic/regulators/ldo_vemc//soc/pwrap@10024000/pmic/regulators/ldo_vemc_13/soc/pwrap@10024000/pmic/regulators/ldo_vcn33_2_bt5/soc/pwrap@10024000/pmic/regulators/ldo_vcn33_2_wifi-/soc/pwrap@10024000/pmic/regulators/ldo_va12-/soc/pwrap@10024000/pmic/regulators/ldo_va09./soc/pwrap@10024000/pmic/regulators/ldo_vrf181/soc/pwrap@10024000/pmic/regulators/ldo_vsram_md-&/soc/pwrap@10024000/pmic/regulators/ldo_vufs-:/soc/pwrap@10024000/pmic/regulators/ldo_vm18.N/soc/pwrap@10024000/pmic/regulators/ldo_vbbck4c/soc/pwrap@10024000/pmic/regulators/ldo_vsram_proc1.~/soc/pwrap@10024000/pmic/regulators/ldo_vsim2;/soc/pwrap@10024000/pmic/regulators/ldo_vsram_others_sshub/soc/pwrap@10024000/pmic/rtc/soc/spmi@10027000/soc/spmi@10027000/pmic@6,/soc/spmi@10027000/pmic@6/regulators/vbuck1/soc/spmi@10027000/pmic@7,/soc/spmi@10027000/pmic@7/regulators/vbuck1/soc/infra-iommu@10315000\/soc/mailbox@10320000a/soc/mailbox@10330000 /soc/scp@10500000/soc/clock-controller@10720000/soc/dsp@10803000/soc/mailbox@10816000/soc/mailbox@10817000#/soc/mt8195-afe-pcm@10890000'/soc/serial@11001100-/soc/serial@110012003/soc/serial@110013009/soc/serial@11001400?/soc/serial@11001500E/soc/serial@11001600K/soc/auxadc@11002000R/soc/syscon@11003000)/soc/spi@1100a000]/soc/thermal-sensor@1100b000e/soc/svs@1100bc00i/soc/pwm@1100e000s/soc/pwm@1100f000./soc/spi@11010000}/soc/spi@11012000/soc/spi@11013000/soc/spi@11018000/soc/spi@11019000/soc/spi@1101d000/soc/spi@1101e000/soc/ethernet@11021000+/soc/ethernet@11021000/mdio/ethernet-phy@1)/soc/ethernet@11021000/stmmac-axi-config(/soc/ethernet@11021000/rx-queues-config(/soc/ethernet@11021000/tx-queues-config/soc/usb@11201000/soc/usb@11201000/usb@0 /soc/usb@11201000/port/endpoint/soc/mmc@11230000/soc/mmc@11240000/soc/mmc@11250000/soc/thermal-sensor@11278000 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/thermal-zones/cam0-thermal/trips/trip-alert,/thermal-zones/cam0-thermal/trips/trip-crit- /thermal-zones/cam1-thermal/trips/trip-alert,+/thermal-zones/cam1-thermal/trips/trip-crit 5/backlight?/regulator-wifi-3v3-enI/regulator-vsysN/regulator-vsys-buckX/regulator-vcc5v0-sys d/reserved-memory/optee@43200000!s/reserved-memory/memory@50000000!{/reserved-memory/memory@53000000!/reserved-memory/memory@54600000!/reserved-memory/memory@60000000!/reserved-memory/memory@60f00000!/reserved-memory/memory@61000000!/reserved-memory/memory@62000000 compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typedp-intf0dp-intf1gce0gce1ethdr0mutex0mutex1merge1merge2merge3merge4merge5vdo1-rdma0vdo1-rdma1vdo1-rdma2vdo1-rdma3vdo1-rdma4vdo1-rdma5vdo1-rdma6vdo1-rdma7i2c0i2c1i2c2i2c3i2c4ethernet0serial0serial1spi0spi1device_typeregenable-methodperformance-domainsclock-frequencycapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellscpu-supplyphandlecpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterruptscpusstatusnum-channelswakeup-delay-msmediatek,platformpinctrl-namespinctrl-0audio-routingmediatek,adsplink-namesound-dai#clock-cellsclocksclock-divclock-multclock-output-names#performance-domain-cellsopp-sharedopp-hzopp-microvoltrangesdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesmediatek,rsel-resistance-in-si-unitpinmuxoutput-highdrive-strengthinput-enablebias-disableinput-disablebias-pull-updrive-strength-microampbias-pull-downoutput-low#power-domain-cellsdomain-supplyclock-namesmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parents#sound-dai-cellsinterrupts-extended#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modes#iommu-cells#mbox-cellsmemory-regionfirmware-namepower-domainsmbox-namesmboxesmediatek,topckgenresetsreset-namesnvmem-cellsnvmem-cell-names#thermal-sensor-cells#pwm-cellsmediatek,pad-selectinterrupt-namesmediatek,pericfgsnps,axi-configsnps,mtl-rx-configsnps,mtl-tx-configsnps,txpblsnps,rxpblsnps,clk-csrphy-modephy-handlepinctrl-1mediatek,tx-delay-psmediatek,mac-wolsnps,reset-gpiosnps,reset-delays-ussnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blensnps,rx-queues-to-usesnps,rx-sched-spsnps,dcb-algorithmsnps,map-to-dma-channelsnps,tx-queues-to-usesnps,tx-sched-wrrsnps,weightsnps,priorityphyswakeup-sourcemediatek,syscon-wakeuprole-switch-default-modeusb-role-switchvusb33-supplyvbus-supplyremote-endpointbus-widthmax-frequencyhs400-ds-delaycap-mmc-highspeedcap-mmc-hw-resetmmc-hs200-1_8vmmc-hs400-1_8vno-sdiono-sdnon-removablevmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiosno-mmcsd-uhs-sdr50sd-uhs-sdr104usb2-lpm-disablemediatek,u3p-dis-mskbus-rangeiommu-mapiommu-map-maskphy-namesinterrupt-map-maskinterrupt-mapbits#phy-cellsrichtek,vinovp-microvoltLDO_VIN1-supplyLDO_VIN3-supplylabeldata-roleop-sink-microwattpower-roletry-power-rolesource-pdossink-pdosmode-switchorientation-switchvcc-supplyoperating-points-v2power-domain-namesmali-supplymediatek,gce-client-regmediatek,gce-eventsmediatek,scpiommus#dma-cellsmediatek,smimediatek,larb-idmediatek,larbsmediatek,merge-mutemediatek,merge-fifo-enmax-linkrate-mhzpolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathbrightness-levelsdefault-brightness-levelenable-gpiosnum-interpolated-stepspwmsenable-active-highvin-supplyregulator-boot-onno-mapcpu0cpu1cpu2cpu3cpu4cpu5cpu6cpu7cpu_ret_lcpu_ret_bcpu_off_lcpu_off_bl2_0l2_1l3_0dmic_codecsoundclk13mclk26mclk32kperformancegpu_opp_tabletimergicppi_cluster0ppi_cluster1infracfg_aoaudio_default_pinsdsi0_backlight_pinseth_default_pinseth_sleep_pinsi2c2_pinsi2c4_pinsi2c6_pinsmmc0_default_pinsmmc0_uhs_pinsmmc1_default_pinsmmc1_pins_detectmt6360_pinspanel_default_pinspcie0_default_pinspcie1_default_pinspwm0_default_pinsspi1_pinsspi2_pinstouch_pinsuart0_pinsuart1_pinsusb3_port0_pinsusb2_port0_pinswifi_vreg_pinsscpsysspmmfg0mfg1watchdogapmixedsyssystimerpwrappmicpmic_adcmt6359codecmt6359_vs1_buck_regmt6359_vgpu11_buck_regmt6359_vmodem_buck_regmt6359_vpu_buck_regmt6359_vcore_buck_regmt6359_vs2_buck_regmt6359_vpa_buck_regmt6359_vproc2_buck_regmt6359_vproc1_buck_regmt6359_vcore_sshub_buck_regmt6359_vgpu11_sshub_buck_regmt6359_vaud18_ldo_regmt6359_vsim1_ldo_regmt6359_vibr_ldo_regmt6359_vrf12_ldo_regmt6359_vusb_ldo_regmt6359_vsram_proc2_ldo_regmt6359_vio18_ldo_regmt6359_vcamio_ldo_regmt6359_vcn18_ldo_regmt6359_vfe28_ldo_regmt6359_vcn13_ldo_regmt6359_vcn33_1_bt_ldo_regmt6359_vcn33_1_wifi_ldo_regmt6359_vaux18_ldo_regmt6359_vsram_others_ldo_regmt6359_vefuse_ldo_regmt6359_vxo22_ldo_regmt6359_vrfck_ldo_regmt6359_vrfck_1_ldo_regmt6359_vbif28_ldo_regmt6359_vio28_ldo_regmt6359_vemc_ldo_regmt6359_vemc_1_ldo_regmt6359_vcn33_2_bt_ldo_regmt6359_vcn33_2_wifi_ldo_regmt6359_va12_ldo_regmt6359_va09_ldo_regmt6359_vrf18_ldo_regmt6359_vsram_md_ldo_regmt6359_vufs_ldo_regmt6359_vm18_ldo_regmt6359_vbbck_ldo_regmt6359_vsram_proc1_ldo_regmt6359_vsim2_ldo_regmt6359_vsram_others_sshub_ldomt6359rtcspmimt6315_6mt6315_6_vbuck1mt6315_7mt6315_7_vbuck1iommu_infrascp_adspadsp_mailbox0adsp_mailbox1afeuart0uart1uart2uart3uart4uart5auxadcpericfg_aolvts_apsvsdisp_pwm0disp_pwm1spi2spi3spi4spi5spis0spis1ethrgmii_phystmmac_axi_setupmtl_rx_setupmtl_tx_setupssusb0xhci0mtu3_hs0_role_swmmc0mmc1mmc2lvts_mcuxhc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