     8     (            	                                                                     (   ,Qualcomm Technologies, Inc. QCS615 Ride          2qcom,qcs615-ride qcom,qcs615          	   =embedded       cpus                                 cpu@0            Jcpu          2arm,cortex-a55           V                 Zpsci             h            vpsci                            d                                       l2-cache             2cache                                                          cpu@100          Jcpu          2arm,cortex-a55           V                Zpsci             h            vpsci                            d                           l2-cache             2cache                                                          cpu@200          Jcpu          2arm,cortex-a55           V                Zpsci             h            vpsci                            d                           l2-cache             2cache                                                          cpu@300          Jcpu          2arm,cortex-a55           V                Zpsci             h   	         vpsci                            d            
               l2-cache             2cache                                                 
         cpu@400          Jcpu          2arm,cortex-a55           V                Zpsci             h            vpsci                            d                           l2-cache             2cache                                                          cpu@500          Jcpu          2arm,cortex-a55           V                Zpsci             h            vpsci                            d                           l2-cache             2cache                                                          cpu@600          Jcpu          2arm,cortex-a76           V                Zpsci             h            vpsci                                                                 l2-cache             2cache                                                          cpu@700          Jcpu          2arm,cortex-a76           V                Zpsci             h            vpsci                                                     l2-cache             2cache                                                          cpu-map    cluster0       core0                     core1                     core2                     core3                     core4                     core5                     core6                     core7                           l3-cache             2cache                                              dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint                                           idle-states         psci       cpu-sleep-0-0            2arm,idle-state          silver-power-collapse           )@          @  %        Q          a           r            "      cpu-sleep-0-1            2arm,idle-state          silver-rail-power-collapse          )@          @          Q          a           r            #      cpu-sleep-1-0            2arm,idle-state          gold-power-collapse         )@          @          Q          a           r            $      cpu-sleep-1-1            2arm,idle-state          gold-rail-power-collapse            )@          @          Q  >        a           r            %         domain-idle-states     cluster-sleep-0          2domain-idle-state           )A  D        @  
        Q          a              &      cluster-sleep-1          2domain-idle-state           )A D        @          Q          a  !            '      cluster-sleep-2          2domain-idle-state           )A D        @  6        Q          a  &b            (         memory@80000000          Jmemory           V                     firmware       scm          2qcom,scm-qcs615 qcom,scm                0          interconnect-0           2qcom,qcs615-camnoc-virt                             interconnect-1           2qcom,qcs615-ipa-virt                                interconnect-2           2qcom,qcs615-mc-virt                                   1      opp-table-qup            2operating-points-v2                      I   opp-75000000                xh                 opp-100000000                                 opp-128000000                                      psci             2arm,psci-1.0             asmc    power-domain-cpu0                        h   !           "   #                  power-domain-cpu1                        h   !           "   #                  power-domain-cpu2                        h   !           "   #                  power-domain-cpu3                        h   !           "   #            	      power-domain-cpu4                        h   !           "   #                  power-domain-cpu5                        h   !           "   #                  power-domain-cpu6                        h   !           $   %                  power-domain-cpu7                        h   !           $   %                  power-domain-cluster                           &   '   (            !         reserved-memory                                      aop-cmd-db@85f20000          2qcom,cmd-db          V                            smem@86000000         
   2qcom,smem            V                                   )            soc@0            2simple-bus                                                                                            clock-controller@100000          2qcom,qcs615-gcc          V                                 ,                      9   *       *      +            ,      efuse@780000             2qcom,qcs615-qfprom qcom,qfprom           V     x        p                             hstx-trim@1f8            V             @                           rng@793000           2qcom,qcs615-trng qcom,trng           V     y0              mmc@7c4000        $   2qcom,qcs615-sdhci qcom,sdhci-msm-v5       0   V     |@             |P             |                Ehc cqhci ice            O                          Zhc_irq pwr_irq           9   ,   k   ,   l   *       ,   n        jiface core xo ice           v   ,            h   -            }   .           /            0     0         1         2         3              sdhc-ddr cpu-sdhc            d,        ɀh                          okay               4           5        default sleep                       &         3         B         Q        k   6        w   7                              opp-table            2operating-points-v2             .   opp-50000000                                 opp-100000000                                 opp-200000000                           8      opp-384000000               `                         dma-controller@800000         (   2qcom,qcs615-gpi-dma qcom,sdm845-gpi-dma          V                               `  O                                                                                                                 /             	  disabled                <      geniqup@8c0000           2qcom,geni-se-qup             V             `                  9   ,   e   ,   f        jm-ahb s-ahb            /                                        okay       serial@880000            2qcom,geni-debug-uart             V             @         9   ,   K        jse             9   :        default         O      Y         0     0         1         2         3              qup-core qup-config          h   -            okay          i2c@884000           2qcom,geni-i2c            V     @       @                                   O      Z           9   ,   M        jse             ;        default       H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                <             <                 tx rx         	  disabled          i2c@888000           2qcom,geni-i2c            V            @                                   O      [           9   ,   O        jse             =        default       H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                <             <                 tx rx         	  disabled          spi@888000           2qcom,geni-spi            V            @         O      [           9   ,   O        jse             >   ?        default       0     0         1         2         3              qup-core qup-config          h   -                <             <                 tx rx                                   	  disabled          serial@888000            2qcom,geni-uart           V            @         O      [           9   ,   O        jse             @   A   B   C        default       0     0         1         2         3              qup-core qup-config          h   -          	  disabled          i2c@88c000           2qcom,geni-i2c            V            @                                   O      \           9   ,   Q        jse             D        default       H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                <             <                 tx rx         	  disabled             dma-controller@a00000         (   2qcom,qcs615-gpi-dma qcom,sdm845-gpi-dma          V                               `  O                                                            %         &                                    /  v          	  disabled                F      geniqup@ac0000           2qcom,geni-se-qup             V                                9   ,   g   ,   h        jm-ahb s-ahb            /  c                                   	  disabled       i2c@a80000           2qcom,geni-i2c            V             @         9   ,   Y        jse             E        default         O      a                                   H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                           F              F                  tx rx         	  disabled          spi@a80000           2qcom,geni-spi            V             @         9   ,   Y        jse             G   H        default         O      a                                   0     0         1         2         3              qup-core qup-config          h   -            }   I            F              F                  tx rx         	  disabled          serial@a80000            2qcom,geni-uart           V             @         9   ,   Y        jse             J   K   L   M        default         O      a         0     0         1         2         3              qup-core qup-config          h   -            }   I      	  disabled          i2c@a84000           2qcom,geni-i2c            V     @       @         9   ,   [        jse             N        default         O      b                                   H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                           F             F                 tx rx         	  disabled          i2c@a88000           2qcom,geni-i2c            V            @         9   ,   ]        jse             O        default         O      c                                   H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                           F             F                 tx rx         	  disabled          spi@a88000           2qcom,geni-spi            V            @         9   ,   ]        jse             P   Q        default         O      c                                   0     0         1         2         3              qup-core qup-config          h   -            }   I            F             F                 tx rx         	  disabled          serial@a88000            2qcom,geni-uart           V            @         9   ,   ]        jse             R   S   T   U        default         O      c         0     0         1         2         3              qup-core qup-config          h   -            }   I      	  disabled          i2c@a8c000           2qcom,geni-i2c            V            @         9   ,   _        jse             V        default         O      d                                   H     0         1         2         3         0         1              qup-core qup-config qup-memory           h   -                           F             F                 tx rx         	  disabled          spi@a8c000           2qcom,geni-spi            V            @         9   ,   _        jse             W   X        default         O      d                                   0     0         1         2         3              qup-core qup-config          h   -            }   I            F             F                 tx rx         	  disabled          serial@a8c000            2qcom,geni-uart           V            @         9   ,   _        jse             Y   Z   [   \        default         O      d         0     0         1         2         3              qup-core qup-config          h   -            }   I      	  disabled             interconnect@1500000             V    P        P         2qcom,qcs615-config-noc                                    3      interconnect@1620000             V    b                 2qcom,qcs615-system-noc                              interconnect@1700000             V    p                 2qcom,qcs615-aggre1-noc                                    0      interconnect@1740000             V    t                 2qcom,qcs615-mmss-noc                                ufshc@1d84000         +   2qcom,qcs615-ufshc qcom,ufshc jedec,ufs-2.0            V    @       0                      Estd ice         O      	         @  9   ,   ~   ,   
   ,   }   ,      ,      *       ,      ,         i  jcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk ice_core_clk            v   ,           rst         }   ]      0     0         1         2         3   %           ufs-ddr cpu-ufs          h   ,              /                                      ^        ufsphy          ,           okay               _   {              6         	'        /   7        < 	'            `   opp-table            2operating-points-v2             ]   opp-50000000          @                          <4`                            xh                 opp-100000000         @                           xh                            р                 opp-200000000         @                           р                                                     phy@1d87000       0   2qcom,qcs615-qmp-ufs-phy qcom,sm6115-qmp-ufs-phy          V    p                9   *       ,      ,   |        jref ref_aux qref             h   ,           v   `            ufsphy                     O            okay            Z   a        j   b            ^      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          V    @      @         O                            z                                              /                 c      crypto@1dfa000        )   2qcom,qcs615-qce qcom,sm8150-qce qcom,qce             V    ߠ       `            c      c           rx tx              /                0         1              memory        hwlock@1f40000           2qcom,tcsr-mutex          V                                    )      syscon@1fc0000           2qcom,qcs615-tcsr syscon          V                               pinctrl@3100000          2qcom,qcs615-tlmm          0   V           0      P       0             0          Eeast west south         O                     _           |                                                    d            _   qup-i2c1-data-clk-state         gpio4 gpio5         $qup0                ;      qup-i2c2-data-clk-state         gpio0 gpio1         $qup0                =      qup-i2c3-data-clk-state         gpio18 gpio19           $qup0                D      qup-i2c4-data-clk-state         gpio20 gpio21           $qup1                E      qup-i2c5-data-clk-state         gpio14 gpio15           $qup1                N      qup-i2c6-data-clk-state         gpio6 gpio7         $qup1                O      qup-i2c7-data-clk-state         gpio10 gpio11           $qup1                V      qup-spi2-data-clk-state         gpio0 gpio1 gpio2           $qup0                >      qup-spi2-cs-state           gpio3           $qup0                ?      qup-spi2-cs-gpio-state          gpio3           $gpio          qup-spi4-data-clk-state         gpio20 gpio21 gpio22            $qup1                G      qup-spi4-cs-state           gpio23          $qup1                H      qup-spi4-cs-gpio-state          gpio23          $gpio          qup-spi6-data-clk-state         gpio6 gpio7 gpio8           $qup1                P      qup-spi6-cs-state           gpio9           $qup1                Q      qup-spi6-cs-gpio-state          gpio9           $gpio          qup-spi7-data-clk-state         gpio10 gpio11 gpio12            $qup1                W      qup-spi7-cs-state           gpio13          $qup1                X      qup-spi7-cs-gpio-state          gpio13          $gpio          qup-uart0-tx-state          gpio16          $qup0                9      qup-uart0-rx-state          gpio17          $qup0                :      qup-uart2-cts-state         gpio0           $qup0                @      qup-uart2-rts-state         gpio1           $qup0                A      qup-uart2-tx-state          gpio2           $qup0                B      qup-uart2-rx-state          gpio3           $qup0                C      qup-uart4-cts-state         gpio20          $qup1                J      qup-uart4-rts-state         gpio21          $qup1                K      qup-uart4-tx-state          gpio22          $qup1                L      qup-uart4-rx-state          gpio23          $qup1                M      qup-uart6-cts-state         gpio6           $qup1                R      qup-uart6-rts-state         gpio7           $qup1                S      qup-uart6-tx-state          gpio8           $qup1                T      qup-uart6-rx-state          gpio9           $qup1                U      qup-uart7-cts-state         gpio10          $qup1                Y      qup-uart7-rts-state         gpio11          $qup1                Z      qup-uart7-tx-state          gpio12          $qup1                [      qup-uart7-rx-state          gpio13          $qup1                \      sdc1-on-state               4   clk-pins          	  sdc1_clk             -        :         cmd-pins          	  sdc1_cmd             I        :   
      data-pins         
  sdc1_data            I        :   
      rclk-pins         
  sdc1_rclk            V         sdc1-off-state              5   clk-pins          	  sdc1_clk             -        :         cmd-pins          	  sdc1_cmd             I        :         data-pins         
  sdc1_data            I        :         rclk-pins         
  sdc1_rclk            V         sdc2-on-state                  clk-pins          	  sdc2_clk             -        :         cmd-pins          	  sdc2_cmd             I        :   
      data-pins         
  sdc2_data            I        :   
         sdc2-off-state                 clk-pins          	  sdc2_clk             -        :         cmd-pins          	  sdc2_cmd             I        :         data-pins         
  sdc2_data            I        :               stm@6002000           2arm,coresight-stm arm,primecell           V                  (                 Estm-base stm-stimulus-base          9   e      	  japb_pclk       out-ports      port       endpoint                f            u               tpda@6004000          "   2qcom,coresight-tpda arm,primecell            V     @                9   e      	  japb_pclk       in-ports                                 port@0           V       endpoint                g                     port@4           V      endpoint                h                     port@5           V      endpoint                i                     port@6           V      endpoint                j                     port@7           V      endpoint                k                     port@8           V      endpoint                l                     port@9           V   	   endpoint                m                     port@b           V      endpoint                n                     port@c           V      endpoint                o                     port@d           V      endpoint                p                        out-ports      port       endpoint                q            r               funnel@6005000        +   2arm,coresight-dynamic-funnel arm,primecell           V     P                9   e      	  japb_pclk       in-ports       port       endpoint                r            q            out-ports      port       endpoint                s            t               cti@6010000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@6011000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@6012000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@6013000           2arm,coresight-cti arm,primecell          V    0                9   e      	  japb_pclk          cti@6014000           2arm,coresight-cti arm,primecell          V    @                9   e      	  japb_pclk          cti@6015000           2arm,coresight-cti arm,primecell          V    P                9   e      	  japb_pclk          cti@6016000           2arm,coresight-cti arm,primecell          V    `                9   e      	  japb_pclk          cti@6017000           2arm,coresight-cti arm,primecell          V    p                9   e      	  japb_pclk          cti@6018000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@6019000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601a000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601b000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601c000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601d000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601e000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@601f000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          funnel@6041000        +   2arm,coresight-dynamic-funnel arm,primecell           V                    9   e      	  japb_pclk       in-ports                                 port@6           V      endpoint                t            s         port@7           V      endpoint                u            f            out-ports      port       endpoint                v            {               funnel@6042000        +   2arm,coresight-dynamic-funnel arm,primecell           V                     9   e      	  japb_pclk       in-ports                                 port@3           V      endpoint                w                     port@4           V      endpoint                x                     port@7           V      endpoint                y                        out-ports      port       endpoint                z            |               funnel@6045000        +   2arm,coresight-dynamic-funnel arm,primecell           V    P                9   e      	  japb_pclk       in-ports                                 port@0           V       endpoint                {            v         port@1           V      endpoint                |            z            out-ports      port       endpoint                }                           replicator@6046000        /   2arm,coresight-dynamic-replicator arm,primecell           V    `                9   e      	  japb_pclk       in-ports       port       endpoint                ~                        out-ports                                port@1           V      endpoint                                           tmc@6047000           2arm,coresight-tmc arm,primecell          V    p                9   e      	  japb_pclk       in-ports       port       endpoint                            }            out-ports      port       endpoint                            ~               replicator@604a000        /   2arm,coresight-dynamic-replicator arm,primecell           V                    9   e      	  japb_pclk          	  disabled       in-ports       port       endpoint                                        out-ports      port       endpoint                                           cti@683b000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          tpdm@6840000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e   @        {          	  disabled       out-ports      port       endpoint                            k               tpdm@684c000          "   2qcom,coresight-tpdm arm,primecell            V                    9   e      	  japb_pclk            e            {       out-ports      port       endpoint                            m               tpdm@6850000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e   @        {                               out-ports      port       endpoint                            p               tpdm@6860000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk                               out-ports      port       endpoint                                           funnel@6861000        +   2arm,coresight-dynamic-funnel arm,primecell           V                    9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                            j               cti@6867000           2arm,coresight-cti arm,primecell          V    p                9   e      	  japb_pclk          tpdm@6870000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e            {          	  disabled       out-ports      port       endpoint                            l               tpdm@699c000          "   2qcom,coresight-tpdm arm,primecell            V                    9   e      	  japb_pclk            e            {                                  	  disabled       out-ports      port       endpoint                            x               tpdm@69c0000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk                               out-ports      port       endpoint                                           funnel@69c3000        +   2arm,coresight-dynamic-funnel arm,primecell           V    0                9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                            h               tpdm@69d0000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk                                  	  disabled       out-ports      port       endpoint                            n               tpdm@6a00000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk                                  	  disabled       out-ports      port       endpoint                                           cti@6a02000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@6a03000           2arm,coresight-cti arm,primecell          V    0                9   e      	  japb_pclk          cti@6a10000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@6a11000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          funnel@6a05000        +   2arm,coresight-dynamic-funnel arm,primecell           V    P                9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                            i               tpda@6b01000          "   2qcom,coresight-tpda arm,primecell            V                    9   e      	  japb_pclk       in-ports                                 port@0           V       endpoint                                     port@1           V      endpoint                                        out-ports      port       endpoint                                           tpdm@6b02000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e   @        {          	  disabled       out-ports      port       endpoint                                           tpdm@6b03000          "   2qcom,coresight-tpdm arm,primecell            V    0                9   e      	  japb_pclk                                  	  disabled       out-ports      port       endpoint                                           cti@6b04000           2arm,coresight-cti arm,primecell          V    @                9   e      	  japb_pclk          cti@6b05000           2arm,coresight-cti arm,primecell          V    P                9   e      	  japb_pclk          cti@6b06000           2arm,coresight-cti arm,primecell          V    `                9   e      	  japb_pclk          cti@6b07000           2arm,coresight-cti arm,primecell          V    p                9   e      	  japb_pclk          funnel@6b08000        +   2arm,coresight-dynamic-funnel arm,primecell           V                    9   e      	  japb_pclk       in-ports                                 port@6           V      endpoint                                     port@7           V      endpoint                                        out-ports      port       endpoint                                           tmc@6b09000           2arm,coresight-tmc arm,primecell          V                    9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           replicator@6b0a000        /   2arm,coresight-dynamic-replicator arm,primecell           V                    9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports                                port@0           V       endpoint                            w         port@1           V      endpoint                                           cti@6b21000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          tpdm@6b48000          "   2qcom,coresight-tpdm arm,primecell            V                    9   e      	  japb_pclk                               out-ports      port       endpoint                            o               cti@6c13000           2arm,coresight-cti arm,primecell          V    0                9   e      	  japb_pclk            fail          cti@6c20000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          	  disabled          tpdm@6c28000          "   2qcom,coresight-tpdm arm,primecell            V                    9   e      	  japb_pclk                               out-ports      port       endpoint                            g               cti@6c29000           2arm,coresight-cti arm,primecell          V                    9   e      	  japb_pclk          cti@6c2a000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@7020000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          etm@7040000          2arm,primecell            V                                 9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7120000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          etm@7140000          2arm,primecell            V                                 9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7220000           2arm,coresight-cti arm,primecell          V    "                 9   e      	  japb_pclk          etm@7240000          2arm,primecell            V    $                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7320000           2arm,coresight-cti arm,primecell          V    2                 9   e      	  japb_pclk          etm@7340000          2arm,primecell            V    4                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7420000           2arm,coresight-cti arm,primecell          V    B                 9   e      	  japb_pclk          etm@7440000          2arm,primecell            V    D                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7520000           2arm,coresight-cti arm,primecell          V    R                 9   e      	  japb_pclk          etm@7540000          2arm,primecell            V    T                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7620000           2arm,coresight-cti arm,primecell          V    b                 9   e      	  japb_pclk          etm@7640000          2arm,primecell            V    d                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           cti@7720000           2arm,coresight-cti arm,primecell          V    r                 9   e      	  japb_pclk          etm@7740000          2arm,primecell            V    t                             9   e      	  japb_pclk                         out-ports      port       endpoint                                           funnel@7800000        +   2arm,coresight-dynamic-funnel arm,primecell           V                     9   e      	  japb_pclk       in-ports                                 port@0           V       endpoint                                     port@1           V      endpoint                                     port@2           V      endpoint                                     port@3           V      endpoint                                     port@4           V      endpoint                                     port@5           V      endpoint                                     port@6           V      endpoint                                     port@7           V      endpoint                                        out-ports      port       endpoint                                           funnel@7810000        +   2arm,coresight-dynamic-funnel arm,primecell           V                     9   e      	  japb_pclk       in-ports                                 port@0           V       endpoint                                     port@2           V      endpoint                                     port@3           V      endpoint                                     port@4           V      endpoint                                     port@5           V      endpoint                                        out-ports      port       endpoint                            y               tpdm@7830000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e   @        {       out-ports      port       endpoint                                           tpda@7832000          "   2qcom,coresight-tpda arm,primecell            V                     9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           tpdm@7860000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk                               out-ports      port       endpoint                                           tpda@7862000          "   2qcom,coresight-tpda arm,primecell            V                     9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           tpdm@78a0000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e            {       out-ports      port       endpoint                                           tpdm@78b0000          "   2qcom,coresight-tpdm arm,primecell            V                     9   e      	  japb_pclk            e            {       out-ports      port       endpoint                                           tpda@78c0000          "   2qcom,coresight-tpda arm,primecell            V                     9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           tpda@78d0000          "   2qcom,coresight-tpda arm,primecell            V                     9   e      	  japb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           cti@78e0000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@78f0000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          cti@7900000           2arm,coresight-cti arm,primecell          V                     9   e      	  japb_pclk          pmu@90b6300       (   2qcom,qcs615-cpu-bwmon qcom,sdm845-bwmon          V    	c                O      E              2         2              }      opp-table            2operating-points-v2                opp-0                   opp-1            Ȁ            pmu@90cd000       .   2qcom,qcs615-llcc-bwmon qcom,sc7280-llcc-bwmon            V    	                O                    1         1              }      opp-table            2operating-points-v2                opp-0            5       opp-1            O      opp-2                   opp-3            !f       opp-4            )       opp-5            .       opp-6            >       opp-7            R       opp-8            ^             mmc@8804000       $   2qcom,qcs615-sdhci qcom,sdhci-msm-v5          V    @                Ehc          O                            Zhc_irq pwr_irq          9   ,   p   ,   q   *            jiface core xo            h   -            }              /              v   ,         0     0         1         2         3              sdhc-ddr cpu-sdhc            d,        ɀh                 okay                                  default sleep                         _   c           k           w   7   opp-table            2operating-points-v2                opp-50000000                                 opp-100000000                                 opp-202000000               
F                        interconnect@9160000             V    	        2          2qcom,qcs615-dc-noc                              system-cache-controller@9200000          2qcom,qcs615-llcc              V    	              	`                 Ellcc0_base llcc_broadcast_base        interconnect@9680000             V    	h                 2qcom,qcs615-gem-noc                                   2      interrupt-controller@b220000             2qcom,qcs615-pdc qcom,pdc              V    "                     d      $           ^   ^  a      }   ?                                                 d      power-management@c300000          #   2qcom,qcs615-aoss-qmp qcom,aoss-qmp           V    0                 O                                                e      sram@c3f0000             2qcom,rpmh-stats          V    ?               iommu@15000000        /   2qcom,qcs615-smmu-500 qcom,smmu-500 arm,mmu-500           V                                 (                   O       A          ^          _          `          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U               /      spmi@c440000             2qcom,spmi-pmic-arb        P   V    D             `             `             p       
      @      `         Ecore chnls obsrvr intr cnfg         ;   d              Zperiph_irq                                                         O            z       pmic@0           2qcom,pm8150 qcom,spmi-pmic           V                                     pon@800          2qcom,pm8998-pon          V      pwrkey           2qcom,pm8941-pwrkey          O                      \  =	         I        e   t        okay          resin            2qcom,pm8941-resin           O                     \  =	         I        okay            e   r         temp-alarm@2400          2qcom,spmi-temp-alarm             V  $         O       $               p              |thermal                               adc@3100             2qcom,spmi-adc5           V  1                                              O       1                      channel@0            V                          ref_gnd       channel@1            V                       
  vref_1p25         channel@6            V                       	  die_temp             adc-tm@3500          2qcom,spmi-adc-tm5            V  5         O       5                                                  	  disabled          rtc@6000             2qcom,pm8941-rtc          V  `   a       
  Ertc alarm           O       a             gpio@c000             2qcom,pm8150-gpio qcom,spmi-gpio          V                                  
                                               usb2-en-state           gpio10          $normal                                               pmic@1           2qcom,pm8150 qcom,spmi-pmic           V                                          interrupt-controller@17a00000            2arm,gic-v3            V                                  O      	                                                                    mailbox@17c00000          0   2qcom,qcs615-apss-shared qcom,sdm845-apss-shared          V                                          watchdog@17c10000         #   2qcom,apss-wdt-qcs615 qcom,kpss-wdt           V                     O                   9   +      timer@17c20000           2arm,armv7-timer-mem          V                                                                 frame@17c21000           V                             O                          frame@17c23000           V0                       O       	         	  disabled          frame@17c25000           VP                       O       
         	  disabled          frame@17c27000           Vp                       O                	  disabled          frame@17c29000           V                       O                	  disabled          frame@17c2b000           V°                       O                	  disabled          frame@17c2d000           V                       O                	  disabled             rsc@18200000             2qcom,rpmh-rsc         0   V                  !             "                 Edrv-0 drv-1 drv-2         $  O                                      ,           8            H                               	  apps_rsc             h   !   bcm-voter            2qcom,bcm-voter                    clock-controller             2qcom,qcs615-rpmh-clk            jxo                     9               *      power-controller             2qcom,qcs615-rpmhpd                     }               -   opp-table            2operating-points-v2                opp-0           X         opp-1           X   0      opp-2           X   @                  opp-3           X                     opp-4           X               8      opp-5           X                      opp-6           X  @      opp-7           X  P      opp-8           X        opp-9           X              regulators-0             2qcom,pm8150-rpmh-regulators         ba      smps3         	  ovreg_s3a            ~ 	'         	                 smps4         	  ovreg_s4a            ~ w@                                7      smps5         	  ovreg_s5a            ~ @                           smps6         	  ovreg_s6a            ~          l`                 ldo1          	  ovreg_l1a            ~ r@                                                   ldo2          	  ovreg_l2a            ~ -P         /M`                                        ldo3          	  ovreg_l3a            ~ B@                                                  ldo5          	  ovreg_l5a            ~ Y                                                       a      ldo7          	  ovreg_l7a            ~ w@                                                 ldo8          	  ovreg_l8a            ~ 0         p                                        ldo10         
  ovreg_l10a           ~ -p         2                                                    ldo11         
  ovreg_l11a           ~ ̀         9                                        ldo12         
  ovreg_l12a           ~ w@                                                       b      ldo13         
  ovreg_l13a           ~ -         1I0                                                    ldo15         
  ovreg_l15a           ~ w@                                                 ldo16         
  ovreg_l16a           ~ -         2                                        ldo17         
  ovreg_l17a           ~ -p         2                       6            phy@88e2000          2qcom,qcs615-qusb2-phy            V                    9   ,      *            jcfg_ahb ref         v   ,                      O            okay               a        j   b                             phy@88e3000          2qcom,qcs615-qusb2-phy            V    0               9   ,      *            jcfg_ahb ref         v   ,           O            okay               a        j   b                             phy@88e6000          2qcom,qcs615-qmp-usb3-phy             V    `                 9   ,      ,      ,      ,           jaux ref cfg_ahb pipe            v   ,      ,           phy phy_phy         "     D        0usb3_phy_pipe_clk_src                       O            okay            Z   a        j   b                  usb@a6f8800          2qcom,qcs615-dwc3 qcom,dwc3           V    
o              0  9   ,      ,      ,      ,      ,      ,         &  jcfg_noc core iface sleep mock_utmi xo           C   ,      ,           S$        D  ;                             d   	      d         d            <  Zpwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq          h   ,                       v   ,                                             okay       usb@a600000       
   2snps,dwc3            V    
`                    /  @            O                                usb2-phy usb3-phy            h                                                                 	        	!peripheral           usb@a8f8800          2qcom,qcs615-dwc3 qcom,dwc3           V    
              0  9   ,      ,      ,      ,      ,      ,         &  jcfg_noc core iface sleep mock_utmi xo           C   ,      ,           S$        8  ;                           d         d   
         1  Zpwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq             h   ,                       v   ,            	)                                          okay       usb@a800000       
   2snps,dwc3            V    
                    /               O                          	  usb2-phy                                                           	Fhigh-speed          	!host                timer            2arm,armv8-timer       0  O                                       thermal-zones      pm8150-thermal          	T   d        	j      trips      trip0           	z s        	             Epassive       trip1           	z 8        	             Ehot       trip2           	z 6h        	          	   Ecritical                   aliases         	/soc@0/mmc@7c4000           	/soc@0/mmc@8804000        $  	/soc@0/geniqup@8c0000/serial@880000       chosen          	serial0:115200n8          clocks     sleep-clk            2fixed-clock         	  }                         +      xo-board-clk             2fixed-clock         	I                                  regulator-usb2-vbus          2regulator-fixed       
  oUSB2_VBUS           	      
                       default          	         	         	interrupt-parent #address-cells #size-cells model compatible chassis-type device_type reg enable-method power-domains power-domain-names capacity-dmips-mhz dynamic-power-coefficient next-level-cache #cooling-cells phandle cache-level cache-unified cpu remote-endpoint entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode #interconnect-cells qcom,bcm-voters opp-shared opp-hz required-opps #power-domain-cells domain-idle-states ranges no-map hwlocks dma-ranges #clock-cells #reset-cells clocks bits reg-names interrupts interrupt-names clock-names resets operating-points-v2 iommus interconnects interconnect-names qcom,dll-config qcom,ddr-config supports-cqe dma-coherent status pinctrl-0 pinctrl-1 pinctrl-names bus-width mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe vmmc-supply vqmmc-supply non-removable no-sd no-sdio #dma-cells dma-channels dma-channel-mask dmas dma-names reset-names lanes-per-direction phys phy-names reset-gpios vcc-supply vcc-max-microamp vccq2-supply vccq2-max-microamp #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,controlled-remotely num-channels qcom,num-ees #hwlock-cells gpio-ranges gpio-controller #gpio-cells interrupt-controller #interrupt-cells wakeup-parent pins function bias-disable drive-strength bias-pull-up bias-pull-down qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num arm,coresight-loses-context-with-cpu qcom,skip-power-up opp-peak-kBps cd-gpios qcom,pdc-ranges mboxes #iommu-cells #global-interrupts interrupts-extended qcom,channel debounce linux,code io-channels io-channel-names #thermal-sensor-cells #io-channel-cells qcom,pre-scaling label output-enable power-source #redistributor-regions redistributor-stride #mbox-cells frame-number qcom,drv-id qcom,tcs-offset qcom,tcs-config opp-level qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes nvmem-cells vdd-supply vdda-phy-dpdm-supply qcom,tcsr-reg clock-output-names assigned-clocks assigned-clock-rates snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk snps,dis_enblslpm_quirk snps,has-lpm-erratum snps,hird-threshold snps,usb3_lpm_capable dr_mode qcom,select-utmi-as-pipe-clk maximum-speed polling-delay-passive thermal-sensors temperature hysteresis mmc0 mmc1 serial0 stdout-path clock-frequency gpio enable-active-high regulator-always-on 