    8    (                                                                                0   ,Qualcomm Technologies, Inc. QCS8550 AIM300 AIOT       F   2qcom,qcs8550-aim300-aiot qcom,qcs8550-aim300 qcom,qcs8550 qcom,sm8550      chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I             V          f         sleep-clk            2fixed-clock          I             V           f   ,      bi-tcxo-div2-clk             I             2fixed-factor-clock           n                u                        f   +      bi-tcxo-ao-div2-clk          I             2fixed-factor-clock           n               u                        f            cpus                                 cpu@0            cpu          2arm,cortex-a510                           n                psci                                     psci                                            d                    f      l2-cache             2cache           '            3                     f      l3-cache             2cache           '            3         f               cpu@100          cpu          2arm,cortex-a510                          n                psci                                     psci                                            d                    f      l2-cache             2cache           '            3                     f            cpu@200          cpu          2arm,cortex-a510                          n                psci                	            
         psci                                            d                    f      l2-cache             2cache           '            3                     f   	         cpu@300          cpu          2arm,cortex-a715                          n               psci                                     psci                                                              f      l2-cache             2cache           '            3                     f            cpu@400          cpu          2arm,cortex-a715                          n               psci                                     psci                                                              f      l2-cache             2cache           '            3                     f            cpu@500          cpu          2arm,cortex-a710                          n               psci                                     psci                                                              f      l2-cache             2cache           '            3                     f            cpu@600          cpu          2arm,cortex-a710                          n               psci                                     psci                                                              f      l2-cache             2cache           '            3                     f            cpu@700          cpu          2arm,cortex-x3                            n               psci                                     psci                              f           L                    f      l2-cache             2cache           '            3                     f            cpu-map    cluster0       core0           A         core1           A         core2           A         core3           A         core4           A         core5           A         core6           A         core7           A               idle-states         Epsci       cpu-sleep-0-0            2arm,idle-state          Rsilver-rail-power-collapse          b@          y  &                    ,                  f   $      cpu-sleep-1-0            2arm,idle-state          Rgold-rail-power-collapse            b@          y  X                                      f   %      cpu-sleep-2-0            2arm,idle-state          Rgoldplus-rail-power-collapse            b@          y            F          8                  f   &         domain-idle-states     cluster-sleep-0          2domain-idle-state           bA  D        y            	.          #         f   '      cluster-sleep-1          2domain-idle-state           bA D        y  
          0          '         f   (            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                    interconnect-0           2qcom,sm8550-clk-virt                                    f   4      interconnect-1           2qcom,sm8550-mc-virt                                 f         opp-table-qup100mhz          2operating-points-v2          f   O   opp-75000000                xh           !      opp-100000000                           "         opp-table-qup120mhz          2operating-points-v2          f   9   opp-75000000                xh           !      opp-120000000               '            "         opp-table-qup125mhz          2operating-points-v2          f   M   opp-75000000                xh           !      opp-125000000               sY@           "         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                        pmu-a710             2arm,cortex-a710-pmu                        pmu-a715             2arm,cortex-a715-pmu                        pmu-x3           2arm,cortex-x3-pmu                          psci             2arm,psci-1.0             smc    power-domain-cpu0                           #        2   $         f         power-domain-cpu1                           #        2   $         f         power-domain-cpu2                           #        2   $         f   
      power-domain-cpu3                           #        2   %         f         power-domain-cpu4                           #        2   %         f         power-domain-cpu5                           #        2   %         f         power-domain-cpu6                           #        2   %         f         power-domain-cpu7                           #        2   &         f         power-domain-cluster                        2   '   (         f   #         reserved-memory                                   E   aop-cmd-db-region@81c60000           2qcom,cmd-db                                L      adsp-mhi-region@81f00000                                   L      mpss-region@8a800000                                  L         f         q6-mpss-dtb-region@9b000000                                 L         f         ipa-fw-region@9b080000                                 L      ipa-gsi-region@9b090000              	                  L      gpu-micro-code-region@9b09a000               	                  L         f         spss-region@9b100000                                   L      camera-region@9b300000               0                  L      video-region@9bb00000                       p           L         f         cvp-region@9c200000                      p           L      cdsp-region@9c900000                                   L         f         q6-cdsp-dtb-region@9e900000                                L         f         q6-adsp-dtb-region@9e980000                                L         f         adspslpi-region@9ea00000                                  L         f         mpss-dsm-region@d4d00000                       0           L         f         aop-image-region@81c00000                                  L      aop-config-region@81c80000           L                            smem-region@81d00000          
   2qcom,smem                                  S   )            L      spu-secure-shared-memory-region@9b280000                 (                  L         smp2p-adsp           2qcom,smp2p          [            e   *                 y   *                                master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-cdsp           2qcom,smp2p          [   ^          e   *                 y   *                                master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-modem          2qcom,smp2p          [            e   *                 y   *                                master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f         ipa-ap-to-modem         ipa                     f         ipa-modem-to-ap         ipa                              f            soc@0            2simple-bus          E                                                                                  clock-controller@100000          2qcom,sm8550-gcc                      B          I                               <   n   +   ,   -   .       .      /       /      /      0             f   2      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                                  f   *      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma                                                 L         M         N         O         P         Q         R         S         T         U         V         W                      (   >        9   1  6             @      	  Mdisabled             f   7      geniqup@8c0000           2qcom,geni-se-qup                                     E        Tm-ahb s-ahb          n   2      2           9   1  #             @                               	  Mdisabled       i2c@880000           2qcom,geni-i2c                         @         Tse           n   2   o        `default         n   3              u                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7              7                  tx rx               8               9      	  Mdisabled          spi@880000           2qcom,geni-spi                         @         Tse           n   2   o              u           `default         n   :   ;      H     4         4         5         6                                xqup-core qup-config qup-memory              7              7                  tx rx               8               9                                	  Mdisabled          i2c@884000           2qcom,geni-i2c                 @       @         Tse           n   2   q        `default         n   <              G                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9      	  Mdisabled          spi@884000           2qcom,geni-spi                 @       @         Tse           n   2   q              G           `default         n   =   >      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  Mdisabled          i2c@888000           2qcom,geni-i2c                        @         Tse           n   2   s        `default         n   ?              H                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9      	  Mdisabled          spi@888000           2qcom,geni-spi                        @         Tse           n   2   s              H           `default         n   @   A      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  Mdisabled          i2c@88c000           2qcom,geni-i2c                        @         Tse           n   2   u        `default         n   B              I                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9      	  Mdisabled          spi@88c000           2qcom,geni-spi                        @         Tse           n   2   u              I           `default         n   C   D      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  Mdisabled          i2c@890000           2qcom,geni-i2c                         @         Tse           n   2   w        `default         n   E              J                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9      	  Mdisabled          spi@890000           2qcom,geni-spi                         @         Tse           n   2   w              J           `default         n   F   G      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  Mdisabled          i2c@894000           2qcom,geni-i2c                 @       @         Tse           n   2   y        `default         n   H              K                                   H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9      	  Mdisabled          spi@894000           2qcom,geni-spi                 @       @         Tse           n   2   y              K           `default         n   I   J      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  Mdisabled          serial@898000            2qcom,geni-uart                       @         Tse           n   2   {        `default         n   K   L                       0     4         4         5         6              xqup-core qup-config             8               M      	  Mdisabled          i2c@89c000           2qcom,geni-i2c                        @         Tse           n   2   }        `default         n   N                                                 H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               O      	  Mdisabled          spi@89c000           2qcom,geni-spi                        @         Tse           n   2   }                         `default         n   P   Q      H     4         4         5         6                                xqup-core qup-config qup-memory              7             7                 tx rx               8               O                                	  Mdisabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 Ts-ahb            n   2   Z                                  E      	  Mdisabled       i2c@980000           2qcom,geni-i2c-master-hub                          @         Tse core          n   2   F   2   E        `default         n   R                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         Tse core          n   2   H   2   E        `default         n   S                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         Tse core          n   2   J   2   E        `default         n   T                                                 0     4          4         5         6              xqup-core qup-config             8               !        Mokay       typec-mux@42             2fcs,fsa4480             B           U                     port       endpoint               V         f              typec-retimer@1c             2onnn,nb7vpq904m                        W                     ports                                port@0                  endpoint               X         f           port@1                 endpoint                                    Y         f                     i2c@98c000           2qcom,geni-i2c-master-hub                         @         Tse core          n   2   L   2   E        `default         n   Z                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         Tse core          n   2   N   2   E        `default         n   [                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         Tse core          n   2   P   2   E        `default         n   \                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         Tse core          n   2   R   2   E        `default         n   ]                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         Tse core          n   2   T   2   E        `default         n   ^                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         Tse core          n   2   V   2   E        `default         n   _                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         Tse core          n   2   X   2   E        `default         n   `                                                 0     4          4         5         6              xqup-core qup-config             8               !      	  Mdisabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma                                                                                                       %         &         '         (         )         *                      (           9   1                @      	  Mdisabled             f   c      geniqup@ac0000           2qcom,geni-se-qup                                     E        Tm-ahb s-ahb          n   2      2           9   1                  4         4            	  xqup-core             @                                 Mokay       i2c@a80000           2qcom,geni-i2c                         @         Tse           n   2   ]        `default         n   a              a                                   H     4         4         5         6         b                       xqup-core qup-config qup-memory              c              c                  tx rx               8               9      	  Mdisabled          spi@a80000           2qcom,geni-spi                         @         Tse           n   2   ]              a           `default         n   d   e      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c              c                  tx rx               8               9                                	  Mdisabled          i2c@a84000           2qcom,geni-i2c                 @       @         Tse           n   2   _        `default         n   f              b                                   H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               9      	  Mdisabled          spi@a84000           2qcom,geni-spi                 @       @         Tse           n   2   _              b           `default         n   g   h      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               9                                	  Mdisabled          i2c@a88000           2qcom,geni-i2c                        @         Tse           n   2   a        `default         n   i              c                                   H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O      	  Mdisabled          spi@a88000           2qcom,geni-spi                        @         Tse           n   2   a              c           `default         n   j   k      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          i2c@a8c000           2qcom,geni-i2c                        @         Tse           n   2   c        `default         n   l              d                                   H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O      	  Mdisabled          spi@a8c000           2qcom,geni-spi                        @         Tse           n   2   c              d           `default         n   m   n      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          i2c@a90000           2qcom,geni-i2c                         @         Tse           n   2   e        `default         n   o              e                                   H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O      	  Mdisabled          spi@a90000           2qcom,geni-spi                         @         Tse           n   2   e              e           `default         n   p   q      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          i2c@a94000           2qcom,geni-i2c                 @       @         Tse           n   2   g        `default         n   r              f         H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          spi@a94000           2qcom,geni-spi                 @       @         Tse           n   2   g              f           `default         n   s   t      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          i2c@a98000           2qcom,geni-i2c                        @         Tse           n   2   i        `default         n   u              k         H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          spi@a98000           2qcom,geni-spi                        @         Tse           n   2   i              k           `default         n   v   w      H     4         4         5         6         b                       xqup-core qup-config qup-memory              c             c                 tx rx               8               O                                	  Mdisabled          serial@a9c000            2qcom,geni-debug-uart                         @         Tse           n   2   k        `default         n   x              C           xqup-core qup-config       0     4         4         5         6                  8               O        Mokay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                f   z      interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 f   6      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     n   2       2   
                     f   y      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     n   2      2                        f   b      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            n                           f         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        f         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  E               `                 `0      `0                                @                    '         l                                                                                                  /  1msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     A                       T                                                                                                                                                      8   n   2   "   2   $   2   %   2   *   2   +   2      2          =  Taux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     y                  5         z              xpcie-mem cpu-pcie            b       {            {              j       1            1             t   2           {pci             2               -        pciephy            |        Mokay               }   ^              }   `            n   ~        `default    opp-table            2operating-points-v2          f   |   opp-2500000              &%           !         А         opp-5000000              LK@           !                   opp-10000000                            !         B@         opp-8000000              z                              opp-16000000                 $                     h            pcie@0           pci                                                                              E         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   n   2   "   2   $          2   &   2   (        Taux cfg_ahb ref rchng pipe          t   2           {phy            2   &                     2            I            pcie0_pipe_clk                      Mokay                                   f   -      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  E               @                 @0      @0                                @                   '         l        3         4         5         8         9         :         v         w         2         /  1msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     A                       T                                                                                                                                                  @   n   2   ,   2   .   2   /   2   6   2   7   2      2       2         I  Taux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               2   ,        $       0     y                  5         z   	           xpcie-mem cpu-pcie            b       {           {              j       1           1             t   2      2   	        {pci link_down               2              .        pciephy                    Mokay               }   a              }   c            n           `default    opp-table            2operating-points-v2          f      opp-2500000              &%           !         А         opp-5000000              LK@           !                   opp-10000000                            !         B@         opp-8000000              z                              opp-16000000                 $                     h         opp-32000000                H                     <            pcie@0           pci                                                                              E         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   n   2   0   2   .         2   2   2   4        Taux cfg_ahb ref rchng pipe          t   2      2   
        {phy phy_nocsr              2   2                     2            I           pcie1_pipe_clk                      Mokay                                              f   .      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                           /            7           D            Q        9   1         1               f         crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `                             rx tx           9   1         1                                        xmemory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 n          2                 Tref ref_aux qref                2           t               {ufsphy           I                       Mokay                                   f   /      ufshc@1d84000         +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	              /        ufsphy          j                      t   2           {rst             2                      9   1   `             @                 0     b                  5         6   #           xufs-ddr cpu-ufs       n  Tcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   n   2      2      2      2            2      2      2           ~           Mokay               }                                               O                    f      opp-table            2operating-points-v2          f      opp-75000000          @      xh                    xh                                           !      opp-150000000         @      р                    р                                           "      opp-300000000         @                                                                                   crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                n   2            f         hwlock@1f40000           2qcom,tcsr-mutex                                           f   )      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                n                I                       f         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           9                                                                 5                       xgfx-mem       	  Mdisabled             f      zap-shader                   opp-table            2operating-points-v2          f      opp-680000000               (                            opp-615000000               $'                          opp-550000000                U                          opp-475000000               O           P         \j      opp-401000000               @           @         \j      opp-348000000                           <         \j      opp-295000000               W           8         \j      opp-220000000                           4                      gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           1hfi gmu       8   n                      2      2                      !  Tahb gmu cxo axi memnoc hub demet                                   cx gx           9                                          f      opp-table            2operating-points-v2          f      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  n   +   2      2            I                                  f         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                               	                   8                                                                                                                                      >         ?         @         A                                                                                     n         2       2   !               Thlos bus iface ahb                           @         f         ipa@3f40000          2qcom,sm8550-ipa         9   1         1            0                            P     @               ipa-reg ipa-shared gsi        8  e                                                 (  1ipa gsi ipa-clock-query ipa-setup-ready          n              Tcore          0                       5         6              xmemory config                       )                   *  :ipa-clock-enabled-valid ipa-clock-enabled         	  Mdisabled          remoteproc@4080000           2qcom,sm8550-mpss-pas                                L  e                                                                0  1wdog fatal ready handover stop-ack shutdown-ack          n               Txo              8       8            cx mss                                                                  )               :stop          	  Mdisabled       glink-edge          e   *                  y   *               Pmpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <  e                                                    #  1wdog fatal ready handover stop-ack           n               Txo              8      8            lcx lmx                                                              )               :stop            Mokay          0  Vqcom/qcs8550/adsp.mbn qcom/qcs8550/adsp_dtb.mbn    glink-edge          e   *                  y   *               Plpass                 fastrpc          2qcom,fastrpc            dfastrpcglink-apps-dsp           Padsp             x                             compute-cb@3             2qcom,fastrpc-compute-cb                     9   1        1  c             @      compute-cb@4             2qcom,fastrpc-compute-cb                     9   1        1  d             @      compute-cb@5             2qcom,fastrpc-compute-cb                     9   1        1  e             @      compute-cb@6             2qcom,fastrpc-compute-cb                     9   1        1  f             @      compute-cb@7             2qcom,fastrpc-compute-cb                     9   1        1  g             @         gpr       	   2qcom,gpr          
  dadsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd    dais             2qcom,q6apm-dais         9   1        1  a          bedais           2qcom,q6apm-lpass-dais                       service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          I            f                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   n      D         f         g              Tmclk macro dcodec fsgen          I          
  wsa2-mclk                       f         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    n           Tiface           PWSA2            n           `default                       	           ?   ?                                       *           <           M           d                                                                           	  Mdisabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   n      @         f         g              Tmclk macro dcodec fsgen          I            mclk                        f         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    n           Tiface           PRX          n           `default                                 ?                                           *        <        M        d                                                                      Mokay          codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   n      9         f         g              Tmclk macro dcodec fsgen          I            mclk                        f         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   n      B         f         g              Tmclk macro dcodec fsgen          I            mclk                        f         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    n           Tiface           PWSA         n           `default                       	           ?   ?                                       *           <           M           d                                                                           	  Mdisabled          soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           1core wakeup          n           Tiface           PTX          n           `default                                                              *        <        M        d                                                               Mokay          codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   n      9         f         g           Tmclk macro dcodec            I            fsgen                       f         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                                                            n      f         g           Tcore audio           f      tx-swr-active-state          f      clk-pins            gpio0           swr_tx_clk                                       data-pins           gpio1 gpio2 gpio14          swr_tx_data                                )         rx-swr-active-state          f      clk-pins            gpio3           swr_rx_clk                                       data-pins           gpio4 gpio5         swr_rx_data                                )         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk                       7      data-pins           gpio7           dmic1_data                      C         dmic23-default-state       clk-pins            gpio8         
  dmic2_clk                       7      data-pins           gpio9           dmic2_data                      C         wsa-swr-active-state             f      clk-pins            gpio10          wsa_swr_clk                                      data-pins           gpio11          wsa_swr_data                                   )         wsa2-swr-active-state            f      clk-pins            gpio15          wsa2_swr_clk                                         data-pins           gpio16          wsa2_swr_data                                  )            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        f         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                            1hc_irq pwr_irq           n   2      2                  Tiface core xo           9   1  @            P d,        `h            8                     0                       5         6              xsdhc-ddr cpu-sdhc           p            @        z             	  Mdisabled       opp-table            2operating-points-v2          f      opp-19200000                $                  opp-50000000                           !      opp-100000000                           "      opp-202000000               
F                       video-codec@aa00000          2qcom,sm8550-iris                 
                                                     8   
   8            venus vcodec0 mxc mmcx                      n   2                        Tiface core vcodec0_core       0     5         6   %                             xcpu-cfg video-mem                      t   2   !        {bus         9   1  @       1  G             @      	  Mdisabled       opp-table            2operating-points-v2          f      opp-240000000               N            "   !      opp-338000000               %x           "   "      opp-366000000               з                    opp-444000000               v                     opp-533333334               V                          clock-controller@aaf0000             2qcom,sm8550-videocc              
                  n   +   2               8              !         I                                  f         cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                 n                          Tcamnoc_axi cpas_ahb cci         n                            `default sleep         	  Mdisabled                                 i2c-bus@0                         V B@                                i2c-bus@1                        V B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                 n                  
        Tcamnoc_axi cpas_ahb cci         n                      `default sleep         	  Mdisabled                                 i2c-bus@0                         V B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                 n                          Tcamnoc_axi cpas_ahb cci         n                            `default sleep         	  Mdisabled                                 i2c-bus@0                         V B@                                i2c-bus@1                        V B@                                   clock-controller@ade0000             2qcom,sm8550-camcc                
                  n   2      +      ,            8              !         I                                  f         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                   S                                 n         2      2         =        t                             0                       5         6              xmdp0-mem cpu-cfg            9   1                                        E      	  Mdisabled             f      display-controller@ae01000           2qcom,sm8550-dpu               
           
        0       	  mdp vbif                                   0   n   2      2               @      =      I      !  Tbus nrt_bus iface lut core vsync                8                 I        $               ports                                port@0                  endpoint                        f            port@1                 endpoint                        f            port@2                 endpoint                        f               opp-table            2operating-points-v2          f      opp-200000000                           !      opp-325000000               _@           "      opp-375000000               Z                 opp-514000000                                      displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                      (   n                                    ;  Tcore_iface core_aux ctrl_link ctrl_link_iface stream_pixel                                 0      0              0           dp                                     8         	  Mdisabled       ports                                port@0                  endpoint                        f            port@1                 endpoint                        f               opp-table            2operating-points-v2          f      opp-162000000               	                 opp-270000000               ߀           !      opp-540000000                /                  opp-810000000               0G                       dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                  0   n                  B      8         2         $  Tbyte byte_intf pixel core iface bus             8                       C                                                   dsi                                   Mokay                  ports                                port@0                  endpoint                        f            port@1                 endpoint                                             f               opp-table            2operating-points-v2          f      opp-187500000               -           !      opp-300000000                           "      opp-358000000               V                    panel@0          2visionox,vtdr6130                        n                            `default sleep              }                                          port       endpoint                        f                  phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             n                   
  Tiface ref            I                       Mokay                        f         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                  0   n                  D      :         2         $  Tbyte byte_intf pixel core iface bus             8                 	      E                                                   dsi                                 	  Mdisabled       ports                                port@0                  endpoint                        f            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             n                   
  Tiface ref            I                     	  Mdisabled             f            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   n   +      2      ,                             0      0                                       8              !         I                                  f         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T                     n              Tref         t   2           Mokay                                              f         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           n   2             2      2           Taux ref com_aux usb3_pipe               2           t   2      2           {phy common           I                               Mokay                                   f   0   ports                                port@0                  endpoint                        f   Y         port@1                 endpoint                        f            port@2                 endpoint                        f                  usb@a6f8800          2qcom,sm8550-dwc3 qcom,dwc3               
o                                          E      0   n   2      2      2      2      2               &  Tcfg_noc core iface sleep mock_utmi xo              2      2           $        D  e                                                           <  1pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             2                      t   2         0     b                  5         6   $           xusb-ddr apps-usb            Mokay       usb@a600000       
   2snps,dwc3                
`                                   9   1   @                  0            usb2-phy usb3-phy                        	         	%         	>         	V         	n         	         	         	         	         	         @         	   ports                                port@0                  endpoint                        f           port@1                 endpoint                        f                     interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  	         ^   ^  a      }   ?      ~                                                        f         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                 
                                     1uplow critical          
            f         thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                
                                     1uplow critical          
            f         thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                
                                     1uplow critical          
            f         power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      *        e   *                   y   *                 I             f         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         1periph_irq          e                 /            
2            
?                                                     pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                                    f      volume-up-n-state           gpio6           normal          
K            
X         C         f           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  Mdisabled          pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
e         	  Mdisabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                                                                                       f         phy@fd00             2qcom,pm8550b-eusb2-repeater                                 
p   W        
}            f            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                                      f            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f  	      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f  
      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              
   t        Mokay          resin            2qcom,pmk8350-resin                               Mokay            
   r         rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b            nvram@7100           2qcom,spmi-sdam             q                                  E      q       reboot-reason@48                H           
               f           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                                       f            pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
             f           pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
             f           pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                 temp-alarm@a00           2qcom,spmi-temp-alarm               
            
   
               
             f        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                                                                                       f            pmic@b           2qcom,pmr735d qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                                                                                       f               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                                                       }                   
           
                f   }   cci0-0-default-state             f      sda-pins            gpio110         cci_i2c_sda                    
X        scl-pins            gpio111         cci_i2c_scl                    
X           cci0-0-sleep-state           f      sda-pins            gpio110         cci_i2c_sda                     
      scl-pins            gpio111         cci_i2c_scl                     
         cci0-1-default-state             f      sda-pins            gpio112         cci_i2c_sda                    
X        scl-pins            gpio113         cci_i2c_scl                    
X           cci0-1-sleep-state           f      sda-pins            gpio112         cci_i2c_sda                     
      scl-pins            gpio113         cci_i2c_scl                     
         cci1-0-default-state             f      sda-pins            gpio114         cci_i2c_sda                    
X        scl-pins            gpio115         cci_i2c_scl                    
X           cci1-0-sleep-state           f      sda-pins            gpio114         cci_i2c_sda                     
      scl-pins            gpio115         cci_i2c_scl                     
         cci2-0-default-state             f      sda-pins            gpio74          cci_i2c_sda                    
X        scl-pins            gpio75          cci_i2c_scl                    
X           cci2-0-sleep-state           f      sda-pins            gpio74          cci_i2c_sda                     
      scl-pins            gpio75          cci_i2c_scl                     
         cci2-1-default-state             f      sda-pins            gpio0           cci_i2c_sda                    
X        scl-pins            gpio1           cci_i2c_scl                    
X           cci2-1-sleep-state           f      sda-pins            gpio0           cci_i2c_sda                     
      scl-pins            gpio1           cci_i2c_scl                     
         hub-i2c0-data-clk-state         gpio16 gpio17           i2chub0_se0                     
X         f   R      hub-i2c1-data-clk-state         gpio18 gpio19           i2chub0_se1                     
X         f   S      hub-i2c2-data-clk-state         gpio20 gpio21           i2chub0_se2                     
X         f   T      hub-i2c3-data-clk-state         gpio22 gpio23           i2chub0_se3                     
X         f   Z      hub-i2c4-data-clk-state         gpio4 gpio5         i2chub0_se4                     
X         f   [      hub-i2c5-data-clk-state         gpio6 gpio7         i2chub0_se5                     
X         f   \      hub-i2c6-data-clk-state         gpio8 gpio9         i2chub0_se6                     
X         f   ]      hub-i2c7-data-clk-state         gpio10 gpio11           i2chub0_se7                     
X         f   ^      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8                     
X         f   _      hub-i2c9-data-clk-state         gpio84 gpio85           i2chub0_se9                     
X         f   `      pcie0-default-state          f   ~   perst-pins          gpio94          gpio                        
      clkreq-pins         gpio95          pcie0_clk_req_n                     
X      wake-pins           gpio96          gpio                        
X         pcie1-default-state          f      perst-pins          gpio97          gpio                        
      clkreq-pins         gpio98          pcie1_clk_req_n                     
X      wake-pins           gpio99          gpio                        
X         qup-i2c0-data-clk-state         gpio28 gpio29         	  qup1_se0                       
X           f   a      qup-i2c1-data-clk-state         gpio32 gpio33         	  qup1_se1                       
X           f   f      qup-i2c2-data-clk-state         gpio36 gpio37         	  qup1_se2                       
X           f   i      qup-i2c3-data-clk-state         gpio40 gpio41         	  qup1_se3                       
X           f   l      qup-i2c4-data-clk-state         gpio44 gpio45         	  qup1_se4                       
X           f   o      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5                       
X           f   r      qup-i2c6-data-clk-state         gpio48 gpio49         	  qup1_se6                       
X           f   u      qup-i2c8-data-clk-state          f   3   scl-pins            gpio57          qup2_se0_l1_mira                       
X        sda-pins            gpio56          qup2_se0_l0_mira                       
X           qup-i2c9-data-clk-state         gpio60 gpio61         	  qup2_se1                       
X           f   <      qup-i2c10-data-clk-state            gpio64 gpio65         	  qup2_se2                       
X           f   ?      qup-i2c11-data-clk-state            gpio68 gpio69         	  qup2_se3                       
X           f   B      qup-i2c12-data-clk-state            gpio2 gpio3       	  qup2_se4                       
X           f   E      qup-i2c13-data-clk-state            gpio80 gpio81         	  qup2_se5                       
X           f   H      qup-i2c15-data-clk-state            gpio72 gpio106        	  qup2_se7                       
X           f   N      qup-spi0-cs-state           gpio31        	  qup1_se0                                 f   e      qup-spi0-data-clk-state         gpio28 gpio29 gpio30          	  qup1_se0                                 f   d      qup-spi1-cs-state           gpio35        	  qup1_se1                                 f   h      qup-spi1-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se1                                 f   g      qup-spi2-cs-state           gpio39        	  qup1_se2                                 f   k      qup-spi2-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se2                                 f   j      qup-spi3-cs-state           gpio43        	  qup1_se3                                 f   n      qup-spi3-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se3                                 f   m      qup-spi4-cs-state           gpio47        	  qup1_se4                                 f   q      qup-spi4-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se4                                 f   p      qup-spi5-cs-state           gpio55        	  qup1_se5                                 f   t      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5                                 f   s      qup-spi6-cs-state           gpio51        	  qup1_se6                                 f   w      qup-spi6-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se6                                 f   v      qup-spi8-cs-state           gpio59          qup2_se0_l3_mira                                 f   ;      qup-spi8-data-clk-state         gpio56 gpio57 gpio58            qup2_se0_l2_mira                                 f   :      qup-spi9-cs-state           gpio63        	  qup2_se1                                 f   >      qup-spi9-data-clk-state         gpio60 gpio61 gpio62          	  qup2_se1                                 f   =      qup-spi10-cs-state          gpio67        	  qup2_se2                                 f   A      qup-spi10-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se2                                 f   @      qup-spi11-cs-state          gpio71        	  qup2_se3                                 f   D      qup-spi11-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se3                                 f   C      qup-spi12-cs-state          gpio119       	  qup2_se4                                 f   G      qup-spi12-data-clk-state            gpio2 gpio3 gpio118       	  qup2_se4                                 f   F      qup-spi13-cs-state          gpio83        	  qup2_se5                                 f   J      qup-spi13-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se5                                 f   I      qup-spi15-cs-state          gpio75        	  qup2_se7                                 f   Q      qup-spi15-data-clk-state            gpio72 gpio106 gpio74         	  qup2_se7                                 f   P      qup-uart7-default-state         gpio26 gpio27         	  qup1_se7                                 f   x      qup-uart14-default-state            gpio78 gpio79         	  qup2_se6                        
X         f   K      qup-uart14-cts-rts-state            gpio76 gpio77         	  qup2_se6                        
         f   L      sdc2-sleep-state       clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             
X                 data-pins         
  sdc2_data            
X                    sdc2-default-state     clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             
X           
      data-pins         
  sdc2_data            
X           
         dsi-active-state            gpio133         gpio                                 f         dsi-suspend-state           gpio133         gpio                        
         f         te-default-state            gpio86        
  mdp_vsync                       
         f            iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                 	                            A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   @         f   1      interrupt-controller@17100000            2arm,gic-v3                                                E                            
           
                     	                                     f      msi-controller@17140000          2arm,gic-v3-its                                 
                    f   {         timer@17420000           2arm,armv7-timer-mem              B                 E                                            frame@17421000           B    B                                                   frame@17423000           B0                              	         	  Mdisabled          frame@17425000           BP                              
         	  Mdisabled          frame@17427000           Bp                                       	  Mdisabled          frame@17429000           B                                       	  Mdisabled          frame@1742b000           B                                       	  Mdisabled          frame@1742d000           B                                       	  Mdisabled             rsc@17a00000          	  Papps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       $                                                   .            :                                      #   bcm-voter            2qcom,bcm-voter           f          clock-controller             2qcom,sm8550-rpmh-clk             I           Txo           n            f         power-controller             2qcom,sm8550-rpmhpd                                 f   8   opp-table            2operating-points-v2          f      opp-16                   opp-48             0         f         opp-52             4      opp-56             8         f         opp-60             <      opp-64             @         f   !      opp-80             P      opp-128                     f   "      opp-144                  opp-192                     f         opp-256                     f         opp-320           @      opp-336           P      opp-384                    f         opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         Jb           W           l   U                      U           U           U                                                                      bob1          
   vreg_bob1           / 2K         G <l        _            f   U      bob2          
   vreg_bob2           / )         G <l        _            f         ldo1             vreg_l1b_1p8            / w@        G w@        _         ldo2             vreg_l2b_3p0            / -         G -         _         ldo5             vreg_l5b_3p1            / /]         G /]         _            f         ldo6             vreg_l6b_1p8            / w@        G -         _         ldo7             vreg_l7b_1p8            / w@        G -         _         ldo8             vreg_l8b_1p8            / w@        G -         _         ldo9             vreg_l9b_2p9            / -*        G -         _         ldo11            vreg_l11b_1p2           / O        G          _            f         ldo12            vreg_l12b_1p8           / w@        G w@        _            f         ldo13            vreg_l13b_3p0           / -        G -        _            f         ldo14            vreg_l14b_3p2           / 0         G 0         _         ldo15            vreg_l15b_1p8           / w@        G w@        _            f   W      ldo16            vreg_l16b_2p8           / *        G *        _         ldo17            vreg_l17b_2p5           / &5@        G &5@        _            f            regulators-1             2qcom,pm8550vs-rpmh-regulators           Jc           v                            ldo3             vreg_l3c_0p9            / m        G         _            f            regulators-2             2qcom,pm8550vs-rpmh-regulators           Jd           v                            ldo1             vreg_l1d_0p88           / m        G 	        _            f            regulators-3             2qcom,pm8550vs-rpmh-regulators           Je           v                                                  smps4            vreg_s4e_0p95           / @        G         _            f         smps5            vreg_s5e_1p08           / iP        G          _         ldo1             vreg_l1e_0p88           / m        G         _            f         ldo2             vreg_l2e_0p9            / Fp        G         _         ldo3             vreg_l3e_1p2            / O        G O        _            f            regulators-4             2qcom,pm8550ve-rpmh-regulators           Jf           v                                       smps4            vreg_s4f_0p5            /         G 
`        _         ldo1             vreg_l1f_0p9            / m        G         _         ldo2             vreg_l2f_0p88           / m        G         _         ldo3             vreg_l3f_0p88           / m        G         _            f            regulators-5             2qcom,pm8550vs-rpmh-regulators           Jg           v                                                                                              smps1            vreg_s1g_1p25           / O        G          _         smps2            vreg_s2g_0p85           /          G         _         smps3            vreg_s3g_0p8            /         G Q        _         smps4            vreg_s4g_1p25           / *@        G |         _            f         smps5            vreg_s5g_0p85           /          G Q        _         smps6            vreg_s6g_1p86           / w@        G         _            f         ldo1             vreg_l1g_1p2            / 6@        G h        _            f         ldo2             vreg_l2g_1p2            /         G O        _         ldo3             vreg_l3g_1p2            / O        G O        _            f               cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           n   +   2           Txo alternate          $                                      $  1dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     I            f         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                            opp-table            2operating-points-v2          f      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                      E              5         5                    opp-table            2operating-points-v2          f      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        f   5      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        f         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               @  e         B                                              #  1wdog fatal ready handover stop-ack           n               Txo              8       8   
   8            cx mxc nsp                                                               )               :stop            Mokay          0  Vqcom/qcs8550/cdsp.mbn qcom/qcs8550/cdsp_dtb.mbn    glink-edge          e   *                  y   *               Pcdsp                  fastrpc          2qcom,fastrpc            dfastrpcglink-apps-dsp           Pcdsp             x                             compute-cb@1             2qcom,fastrpc-compute-cb                   $  9   1  a       1         1              @      compute-cb@2             2qcom,fastrpc-compute-cb                   $  9   1  b       1         1              @      compute-cb@3             2qcom,fastrpc-compute-cb                   $  9   1  c       1         1              @      compute-cb@4             2qcom,fastrpc-compute-cb                   $  9   1  d       1         1              @      compute-cb@5             2qcom,fastrpc-compute-cb                   $  9   1  e       1         1              @      compute-cb@6             2qcom,fastrpc-compute-cb                   $  9   1  f       1         1              @      compute-cb@7             2qcom,fastrpc-compute-cb                   $  9   1  g       1         1              @      compute-cb@8             2qcom,fastrpc-compute-cb                   $  9   1  h       1         1              @                  thermal-zones      aoss0-thermal                     trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpuss0-thermal                   trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpuss1-thermal                   trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpuss2-thermal                   trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpuss3-thermal                   trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpu3-top-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu3-bottom-thermal                  trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu4-top-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu4-bottom-thermal                  trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu5-top-thermal                  	   trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu5-bottom-thermal               
   trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu6-top-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu6-bottom-thermal                  trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu7-top-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu7-middle-thermal                  trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu7-bottom-thermal                  trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                aoss1-thermal                     trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             cpu0-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu1-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cpu2-thermal                     trips      trip-point0         	 _                   passive       trip-point1         	 s                   passive       cpu-critical            	                 	   critical                cdsp0-thermal               
                 trips      thermal-engine-config           	 H                   passive       thermal-hal-config          	 H                   passive       reset-mon-config            	 8                   passive       junction-config         	 s                   passive             cdsp1-thermal               
                 trips      thermal-engine-config           	 H                   passive       thermal-hal-config          	 H                   passive       reset-mon-config            	 8                   passive       junction-config         	 s                   passive             cdsp2-thermal               
                 trips      thermal-engine-config           	 H                   passive       thermal-hal-config          	 H                   passive       reset-mon-config            	 8                   passive       junction-config         	 s                   passive             cdsp3-thermal               
                 trips      thermal-engine-config           	 H                   passive       thermal-hal-config          	 H                   passive       reset-mon-config            	 8                   passive       junction-config         	 s                   passive             video-thermal                    trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             mem-thermal             
              	   trips      thermal-engine-config           	 H                   passive       ddr0-config         	 _                   passive       reset-mon-config            	 8                   passive             modem0-thermal                
   trips      thermal-engine-config           	 H                   passive       mdmss0-config0          	 p                   passive       mdmss0-config1          	 (                   passive       reset-mon-config            	 8                   passive             modem1-thermal                   trips      thermal-engine-config           	 H                   passive       mdmss1-config0          	 p                   passive       mdmss1-config1          	 (                   passive       reset-mon-config            	 8                   passive             modem2-thermal                   trips      thermal-engine-config           	 H                   passive       mdmss2-config0          	 p                   passive       mdmss2-config1          	 (                   passive       reset-mon-config            	 8                   passive             modem3-thermal                   trips      thermal-engine-config           	 H                   passive       mdmss3-config0          	 p                   passive       mdmss3-config1          	 (                   passive       reset-mon-config            	 8                   passive             camera0-thermal                  trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             camera1-thermal                  trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             aoss2-thermal                     trips      thermal-engine-config           	 H                   passive       reset-mon-config            	 8                   passive             gpuss-0-thermal             
                 cooling-maps       map0            6           ;            trips      trip-point0         	 L                   passive          f         trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-1-thermal             
                 cooling-maps       map0            6           ;            trips      trip-point0         	 L                   passive          f         trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-2-thermal             
                 cooling-maps       map0            6           ;            trips      trip-point0         	 L                   passive          f         trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-3-thermal             
                 cooling-maps       map0            6           ;            trips      trip-point0         	 L                   passive          f         trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-4-thermal             
                 cooling-maps       map0            6           ;            trips      trip-point0         	 L                   passive          f         trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-5-thermal             
                 cooling-maps       map0            6          ;            trips      trip-point0         	 L                   passive          f        trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-6-thermal             
                 cooling-maps       map0            6          ;            trips      trip-point0         	 L                   passive          f        trip-point1         	 _                   hot       trip-point2         	                 	   critical                gpuss-7-thermal             
                 cooling-maps       map0            6          ;            trips      trip-point0         	 L                   passive          f        trip-point1         	 _                   hot       trip-point2         	                 	   critical                pm8550-thermal              d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550b-thermal             d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550ve-thermal                d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550vs-c-thermal              d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550vs-d-thermal              d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550vs-e-thermal              d          	   trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8550vs-g-thermal              d          
   trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8010-m-thermal                d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pm8010-n-thermal                d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pmr735d-k-thermal               d             trips      trip0           	 s                     passive       trip1           	 8                     hot             pmr735d-l-thermal               d             trips      trip0           	 s                     passive       trip1           	 8                     hot                timer            2arm,armv8-timer       0                                
        reboot-mode          2nvmem-reboot-mode           J          Vreboot-mode         g           u         aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       gpio-keys         
   2gpio-keys           n          `default    key-volume-up         
  PVolume Up                                       
   s                           pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink                                       }          connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                       f            port@1                 endpoint                       f   X         port@2                 endpoint                       f   V                  regulator-vph-pwr            2regulator-fixed          vph_pwr         / 8u         G 8u                            f            	interrupt-parent #address-cells #size-cells model compatible stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters opp-hz required-opps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 vcc-supply mode-switch orientation-switch remote-endpoint retimer-switch data-lanes reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names perst-gpios wake-gpios opp-peak-kBps assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction qcom,ice reset-gpios vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply #hwlock-cells qcom,gmu memory-region opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label firmware-name qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,ports-sinterval-low gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width sdhci-caps-mask pinctrl-1 assigned-clock-parents vdda-supply vci-supply vdd-supply vddio-supply vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id power-source bias-pull-up #pwm-cells vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply vdd-bob1-supply vdd-bob2-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-supply vdd-l2-supply vdd-s4-supply vdd-s5-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s6-supply #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 debounce-interval linux,can-disable wakeup-source orientation-gpios power-role data-role regulator-always-on regulator-boot-on 