 `   8     (            `                                                                       ,Samsung Galaxy Z Fold5           2samsung,q5q qcom,sm8550          =handset    chosen                                     J   framebuffer@b8000000             2simple-framebuffer           Q                      U           [           b  "       	   ia8r8g8b8             clocks     xo-board             2fixed-clock          p             }                   sleep-clk            2fixed-clock          p             }              ,      bi-tcxo-div2-clk             p             2fixed-factor-clock                                                      +      bi-tcxo-ao-div2-clk          p             2fixed-factor-clock                                                              cpus                                 cpu@0            cpu          2arm,cortex-a510          Q                                 psci                                     psci                                       !   d        ;                  l2-cache             2cache           J            V                           l3-cache             2cache           J            V                        cpu@100          cpu          2arm,cortex-a510          Q                                psci                                     psci                                       !   d        ;                  l2-cache             2cache           J            V                                 cpu@200          cpu          2arm,cortex-a510          Q                                psci                	            
         psci                                       !   d        ;                  l2-cache             2cache           J            V                        	         cpu@300          cpu          2arm,cortex-a715          Q                               psci                                     psci                                      !          ;                  l2-cache             2cache           J            V                                 cpu@400          cpu          2arm,cortex-a715          Q                               psci                                     psci                                      !          ;                  l2-cache             2cache           J            V                                 cpu@500          cpu          2arm,cortex-a710          Q                               psci                                     psci                                      !          ;                  l2-cache             2cache           J            V                                 cpu@600          cpu          2arm,cortex-a710          Q                               psci                                     psci                                      !          ;                  l2-cache             2cache           J            V                                 cpu@700          cpu          2arm,cortex-x3            Q                               psci                                     psci                             f        !  L        ;                  l2-cache             2cache           J            V                                 cpu-map    cluster0       core0           d         core1           d         core2           d         core3           d         core4           d         core5           d         core6           d         core7           d               idle-states         hpsci       cpu-sleep-0-0            2arm,idle-state          usilver-rail-power-collapse          @            &                    ,                     $      cpu-sleep-1-0            2arm,idle-state          ugold-rail-power-collapse            @            X                                         %      cpu-sleep-2-0            2arm,idle-state          ugoldplus-rail-power-collapse            @                      F          8                     &         domain-idle-states     cluster-sleep-0          2domain-idle-state           A  D                    	.          #            '      cluster-sleep-1          2domain-idle-state           A D          
          0          '            (            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                    interconnect-0           2qcom,sm8550-clk-virt                                       4      interconnect-1           2qcom,sm8550-mc-virt                                          opp-table-qup100mhz          2operating-points-v2             O   opp-75000000            !    xh        (   !      opp-100000000           !             (   "         opp-table-qup120mhz          2operating-points-v2             9   opp-75000000            !    xh        (   !      opp-120000000           !    '         (   "         opp-table-qup125mhz          2operating-points-v2             M   opp-75000000            !    xh        (   !      opp-125000000           !    sY@        (   "         memory@a0000000          memory           Q                     pmu-a510             2arm,cortex-a510-pmu         6               pmu-a710             2arm,cortex-a710-pmu         6               pmu-a715             2arm,cortex-a715-pmu         6               pmu-x3           2arm,cortex-x3-pmu           6               psci             2arm,psci-1.0             smc    power-domain-cpu0           A                #        U   $                  power-domain-cpu1           A                #        U   $                  power-domain-cpu2           A                #        U   $            
      power-domain-cpu3           A                #        U   %                  power-domain-cpu4           A                #        U   %                  power-domain-cpu5           A                #        U   %                  power-domain-cpu6           A                #        U   %                  power-domain-cpu7           A                #        U   &                  power-domain-cluster            A            U   '   (            #         reserved-memory                                    J   hyp-region@80000000          Q                       h      cpusys-vm-region@80a00000            Q           @           h      hyp-tags-region@80e00000             Q           =           h      xbl-sc-region@d8100000           Q                      h      hyp-tags-reserved-region@811d0000            Q                      h      xbl-dt-log-merged-region@81a00000            Q           &           h      aop-cmd-db-region@81c60000           2qcom,cmd-db          Q                      h      aop-config-merged-region@81c80000            Q           @          h      smem@81d00000         
   2qcom,smem            Q                      o   )            h      adsp-mhi-region@81f00000             Q                      h      global-sync-region@82600000          Q    `                  h      tz-stat-region@82700000          Q    p                  h      cdsp-secure-heap-region@82800000             Q          `           h      q6-mpss-dtb-region@9b000000          Q                       h                  ipa-fw-region@9b080000           Q                      h      ipa-gsi-region@9b090000          Q    	                  h      gpu-micro-code-region@9b09a000           Q    	                  h                  spss-region@9b100000             Q                      h      spu-tz-shared-region@9b280000            Q    (                  h      spu-modem-shared-region@9b2e0000             Q    .                  h      camera-region@9b300000           Q    0                  h      video-region@9bb00000            Q           p           h                  cvp-region@9c200000          Q            p           h      cdsp-region@9c900000             Q                      h                  q6-cdsp-dtb-region@9e900000          Q                      h                  q6-adsp-dtb-region@9e980000          Q                      h                  rmtfs-region@d4a80000            Q    Ԩ       (           h      tz-reserved-region@d8000000          Q                       h      cpucp-fw-region@d8140000             Q                      h      qtee-region@d8300000             Q    0       P           h      ta-region@d8800000           Q    ؀                 h      tz-tags-region@e1200000          Q           t           h      hwfence-shbuf-region@e6440000            Q    D       '          h      trust-ui-vm-region@f3600000          Q    `                h      trust-ui-vm-dump-region@f80ee000             Q                     h      trust-ui-vm-qrt-region@f80ef000          Q                     h      trust-ui-vm-vblk0-ring-region@f80f8000           Q           @          h      trust-ui-vm-vblk1-ring-region@f80fc000           Q           @          h      trust-ui-vm-swiotlb-region@f8100000          Q                      h      oem-vm-region@f8400000           Q    @                 h      oem-vm-vblk0-ring-region@fcc00000            Q            @          h      oem-vm-swiotlb-region@fcc04000           Q    @                 h      hyp-ext-tags-region@fce00000             Q                     h      hyp-ext-reserved-region@ff700000             Q    p                  h      adspslpi@9ea00000            Q          @          h                  mpss-dsm@d4d00000            Q          0           h                  mpss@8b400000            Q    @                 h                  splash-region@b8000000           Q                      h         smp2p-adsp           2qcom,smp2p          w               *                    *                                master-kernel           master-kernel                                slave-kernel            slave-kernel                                             smp2p-cdsp           2qcom,smp2p          w   ^             *                    *                                master-kernel           master-kernel                                slave-kernel            slave-kernel                                             smp2p-modem          2qcom,smp2p          w               *                    *                                master-kernel           master-kernel                                slave-kernel            slave-kernel                                          ipa-ap-to-modem         ipa                              ipa-modem-to-ap         ipa                                          soc@0            2simple-bus           J                                                                                  clock-controller@100000          2qcom,sm8550-gcc          Q            B          p                      A         <      +   ,   -   .       .      /       /      /      0                2      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc           Q     @                6                                                      *      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         ,            Q                      6      L         M         N         O         P         Q         R         S         T         U         V         W           7           D   >        U   1  6             \      	  idisabled                7      geniqup@8c0000           2qcom,geni-se-qup             Q                         J        pm-ahb s-ahb             2      2           U   1  #             \                               	  idisabled       i2c@880000           2qcom,geni-i2c            Q             @         pse              2   o        |default            3        6      u                                   H     4         4         5         6                                qup-core qup-config qup-memory              7              7                  tx rx               8               9      	  idisabled          spi@880000           2qcom,geni-spi            Q             @         pse              2   o        6      u           |default            :   ;      H     4         4         5         6                                qup-core qup-config qup-memory              7              7                  tx rx               8               9                                	  idisabled          i2c@884000           2qcom,geni-i2c            Q     @       @         pse              2   q        |default            <        6      G                                   H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9      	  idisabled          spi@884000           2qcom,geni-spi            Q     @       @         pse              2   q        6      G           |default            =   >      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  idisabled          i2c@888000           2qcom,geni-i2c            Q            @         pse              2   s        |default            ?        6      H                                   H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9      	  idisabled          spi@888000           2qcom,geni-spi            Q            @         pse              2   s        6      H           |default            @   A      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  idisabled          i2c@88c000           2qcom,geni-i2c            Q            @         pse              2   u        |default            B        6      I                                   H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9      	  idisabled          spi@88c000           2qcom,geni-spi            Q            @         pse              2   u        6      I           |default            C   D      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  idisabled          i2c@890000           2qcom,geni-i2c            Q             @         pse              2   w        |default            E        6      J                                   H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9      	  idisabled          spi@890000           2qcom,geni-spi            Q             @         pse              2   w        6      J           |default            F   G      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  idisabled          i2c@894000           2qcom,geni-i2c            Q     @       @         pse              2   y        |default            H        6      K                                   H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9      	  idisabled          spi@894000           2qcom,geni-spi            Q     @       @         pse              2   y        6      K           |default            I   J      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               9                                	  idisabled          serial@898000            2qcom,geni-uart           Q            @         pse              2   {        |default            K   L        6               0     4         4         5         6              qup-core qup-config             8               M      	  idisabled          i2c@89c000           2qcom,geni-i2c            Q            @         pse              2   }        |default            N        6                                         H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               O      	  idisabled          spi@89c000           2qcom,geni-spi            Q            @         pse              2   }        6                 |default            P   Q      H     4         4         5         6                                qup-core qup-config qup-memory              7             7                 tx rx               8               O                                	  idisabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub          Q                       ps-ahb               2   Z                                   J        iokay       i2c@980000           2qcom,geni-i2c-master-hub             Q             @         pse core             2   F   2   E        |default            R        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@984000           2qcom,geni-i2c-master-hub             Q     @       @         pse core             2   H   2   E        |default            S        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@988000           2qcom,geni-i2c-master-hub             Q            @         pse core             2   J   2   E        |default            T        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@98c000           2qcom,geni-i2c-master-hub             Q            @         pse core             2   L   2   E        |default            U        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@990000           2qcom,geni-i2c-master-hub             Q             @         pse core             2   N   2   E        |default            V        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@994000           2qcom,geni-i2c-master-hub             Q     @       @         pse core             2   P   2   E        |default            W        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@998000           2qcom,geni-i2c-master-hub             Q            @         pse core             2   R   2   E        |default            X        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@99c000           2qcom,geni-i2c-master-hub             Q            @         pse core             2   T   2   E        |default            Y        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@9a0000           2qcom,geni-i2c-master-hub             Q             @         pse core             2   V   2   E        |default            Z        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled          i2c@9a4000           2qcom,geni-i2c-master-hub             Q     @       @         pse core             2   X   2   E        |default            [        6                                         0     4          4         5         6              qup-core qup-config             8            (   !      	  idisabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         ,            Q                      6                                                            %         &         '         (         )         *           7           D           U   1                \      	  idisabled                ^      geniqup@ac0000           2qcom,geni-se-qup             Q                         J        pm-ahb s-ahb             2      2           U   1                  4         4            	  qup-core             \                                 iokay       i2c@a80000           2qcom,geni-i2c            Q             @         pse              2   ]        |default            \        6      a                                   H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^              ^                  tx rx               8               9      	  idisabled          spi@a80000           2qcom,geni-spi            Q             @         pse              2   ]        6      a           |default            _   `      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^              ^                  tx rx               8               9                                	  idisabled          i2c@a84000           2qcom,geni-i2c            Q     @       @         pse              2   _        |default            a        6      b                                   H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               9      	  idisabled          spi@a84000           2qcom,geni-spi            Q     @       @         pse              2   _        6      b           |default            b   c      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               9                                	  idisabled          i2c@a88000           2qcom,geni-i2c            Q            @         pse              2   a        |default            d        6      c                                   H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O      	  idisabled          spi@a88000           2qcom,geni-spi            Q            @         pse              2   a        6      c           |default            e   f      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          i2c@a8c000           2qcom,geni-i2c            Q            @         pse              2   c        |default            g        6      d                                   H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O      	  idisabled          spi@a8c000           2qcom,geni-spi            Q            @         pse              2   c        6      d           |default            h   i      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          i2c@a90000           2qcom,geni-i2c            Q             @         pse              2   e        |default            j        6      e                                   H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O      	  idisabled          spi@a90000           2qcom,geni-spi            Q             @         pse              2   e        6      e           |default            k   l      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          i2c@a94000           2qcom,geni-i2c            Q     @       @         pse              2   g        |default            m        6      f         H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          spi@a94000           2qcom,geni-spi            Q     @       @         pse              2   g        6      f           |default            n   o      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          i2c@a98000           2qcom,geni-i2c            Q            @         pse              2   i        |default            p        6      k         H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          spi@a98000           2qcom,geni-spi            Q            @         pse              2   i        6      k           |default            q   r      H     4         4         5         6         ]                       qup-core qup-config qup-memory              ^             ^                 tx rx               8               O                                	  idisabled          serial@a9c000            2qcom,geni-debug-uart             Q            @         pse              2   k        |default            s        6      C           qup-core qup-config       0     4         4         5         6                  8               O      	  idisabled             interconnect@1500000             2qcom,sm8550-cnoc-main            Q    P       0                                   u      interconnect@1600000             2qcom,sm8550-config-noc           Q    `        b                                    6      interconnect@1680000             2qcom,sm8550-system-noc           Q    h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc            Q    l       "                        2       2   
                        t      interconnect@16e0000             2qcom,sm8550-aggre1-noc           Q    n       D                        2      2                           ]      interconnect@1700000             2qcom,sm8550-aggre2-noc           Q    p                                                                interconnect@1780000             2qcom,sm8550-mmss-noc             Q    x                                                 rng@10c3000          2qcom,sm8550-trng qcom,trng           Q    0              pcie@1c00000             pci          2qcom,pcie-sm8550          P   Q            0     `             `             `             `                 parf dbi elbi atu config                                   8   J               `                 `0      `0                                \                             l  6                                                                                                /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     	                                                                                                                                                                             8      2   "   2   $   2   %   2   *   2   +   2      2          =  paux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     t                  5         u              pcie-mem cpu-pcie            *       v            v              2       1            1             <   2           Cpci             2            O   -        Tpciephy            w        iokay            ^   x   `            i   x   ^              y        |default    opp-table            2operating-points-v2             w   opp-2500000         !     &%        (   !        u А         opp-5000000         !     LK@        (   !        u           opp-10000000            !             (   !        u B@         opp-8000000         !     z         (   z        u          opp-16000000            !     $         (   z        u h            pcie@0           pci          Q                                                                     J         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy          Q    `               (      2   "   2   $          2   &   2   (        paux cfg_ahb ref rchng pipe          <   2           Cphy            2   &                     2            p            pcie0_pipe_clk                      iokay               {           |            -      pcie@1c08000             pci          2qcom,pcie-sm8550          P   Q           0     @             @             @             @                 parf dbi elbi atu config                                   8   J               @                 @0      @0                                \                            l  6      3         4         5         8         9         :         v         w         2         /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     	                                                                                                                                                                         @      2   ,   2   .   2   /   2   6   2   7   2      2       2         I  paux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               2   ,        $       0     t                  5         u   	           pcie-mem cpu-pcie            *       v           v              2       1           1             <   2      2   	        Cpci link_down               2           O   .        Tpciephy            }      	  idisabled       opp-table            2operating-points-v2             }   opp-2500000         !     &%        (   !        u А         opp-5000000         !     LK@        (   !        u           opp-10000000            !             (   !        u B@         opp-8000000         !     z         (   z        u          opp-16000000            !     $         (   z        u h         opp-32000000            !    H         (   z        u <            pcie@0           pci          Q                                                                     J         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy          Q                   (      2   0   2   .         2   2   2   4        paux cfg_ahb ref rchng pipe          <   2      2   
        Cphy phy_nocsr              2   2                     2            p           pcie1_pipe_clk                    	  idisabled                .      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          Q    @               6                 ,                                                      U   1         1                  ~      crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce             Q    ߠ       `            ~      ~           rx tx           U   1         1                                        memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy          Q                                 2                 pref ref_aux qref                2           <               Cufsphy           p                       iokay                          |            /      ufshc@1d84000         +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0           Q    @       0         6      	           O   /        Tufsphy          !                      <   2           Crst             2           (   z        U   1   `             \                 0     ]                  5         6   #           ufs-ddr cpu-ufs       n  pcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @      2      2      2      2            2      2      2           5           iokay            >   x              J           U          f           r O                          opp-table            2operating-points-v2                opp-75000000          @  !    xh                    xh                                        (   !      opp-150000000         @  !    р                    р                                        (   "      opp-300000000         @  !                                                                  (   z            crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine           Q    ؀                   2                     hwlock@1f40000           2qcom,tcsr-mutex          Q                                    )      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon          Q                                      p                                gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0   Q                                           #  kgsl_3d0_reg_memory cx_mem cx_dbgc          6      ,           U                                                   ;              5                       gfx-mem       	  idisabled                   zap-shader                   opp-table            2operating-points-v2                opp-680000000           !    (                    u        opp-615000000           !    $'                   u       opp-550000000           !     U                   u       opp-475000000           !    O           P        u \j      opp-401000000           !    @           @        u \j      opp-348000000           !                <        u \j      opp-295000000           !    W           8        u \j      opp-220000000           !                4        u              gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0   Q    ֠      P                  (                 gmu rscc gmu_pdc            6      0         1           hfi gmu       8                         2      2                      !  pahb gmu cxo axi memnoc hub demet                                   cx gx           U                                               opp-table            2operating-points-v2                opp-500000000           !    e                  opp-200000000           !                @            clock-controller@3d90000             2qcom,sm8550-gpucc            Q                         +   2      2            p                      A                     iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500          Q                                        8  6                                                                                                                                    >         ?         @         A                                                                                              2       2   !               phlos bus iface ahb                           \                  ipa@3f40000          2qcom,sm8550-ipa         U   1         1            0   Q                         P     @               ipa-reg ipa-shared gsi        8                                                   (  ipa gsi ipa-clock-query ipa-setup-ready                        pcore          0                       5         6              memory config                                         *  ipa-clock-enabled-valid ipa-clock-enabled         	  idisabled          remoteproc@4080000           2qcom,sm8550-mpss-pas             Q                   L                                                                  0  wdog fatal ready handover stop-ack shutdown-ack                         pxo              8       8            cx mss                                                                                stop            iokay          0  qcom/sm8550/modem.mbn qcom/sm8550/modem_dtb.mbn    glink-edge             *                     *                mpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas             Q                   <                                                      #  wdog fatal ready handover stop-ack                          pxo              8      8            lcx lmx                                                                            stop            iokay          .  qcom/sm8550/adsp.mbn qcom/sm8550/adsp_dtb.mbn      glink-edge             *                     *                lpass                 fastrpc          2qcom,fastrpc            &fastrpcglink-apps-dsp            adsp             :                             compute-cb@3             2qcom,fastrpc-compute-cb          Q           U   1        1  c             \      compute-cb@4             2qcom,fastrpc-compute-cb          Q           U   1        1  d             \      compute-cb@5             2qcom,fastrpc-compute-cb          Q           U   1        1  e             \      compute-cb@6             2qcom,fastrpc-compute-cb          Q           U   1        1  f             \      compute-cb@7             2qcom,fastrpc-compute-cb          Q           U   1        1  g             \         gpr       	   2qcom,gpr          
  &adsp_apps           Q           ]                                   service@1            2qcom,q6apm           Q           j            {avs/audio msm/adsp/audio_pd    dais             2qcom,q6apm-dais         U   1        1  a          bedais           2qcom,q6apm-lpass-dais           j            service@2            2qcom,q6prm           Q           {avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          p                                 codec@6aa0000            2qcom,sm8550-lpass-wsa-macro          Q                   (         D         f         g              pmclk macro dcodec fsgen          p          
  wsa2-mclk           j                     soundwire@6ab0000            2qcom,soundwire-v2.0.0            Q                     6                              piface            WSA2                       |default                       	           ?   ?                                                                        &                  A           ^                                     j         	  idisabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro           Q                   (         @         f         g              pmclk macro dcodec fsgen          p            mclk            j                     soundwire@6ad0000            2qcom,soundwire-v2.0.0            Q                     6                              piface            RX                     |default                                 ?                                                                   &          A          ^                                       j         	  idisabled          codec@6ae0000            2qcom,sm8550-lpass-tx-macro           Q                   (         9         f         g              pmclk macro dcodec fsgen          p            mclk            j                     codec@6b00000            2qcom,sm8550-lpass-wsa-macro          Q                   (         B         f         g              pmclk macro dcodec fsgen          p            mclk            j                     soundwire@6b10000            2qcom,soundwire-v2.0.0            Q                     6                              piface            WSA                    |default                       	           ?   ?                                                                        &                  A           ^                                     j         	  idisabled          soundwire@6d30000            2qcom,soundwire-v2.0.0            Q                     6                          core wakeup                     piface            TX                     |default                                v                                                      &        A        ^                                    j         	  idisabled          codec@6d44000            2qcom,sm8550-lpass-va-macro           Q    @              $         9         f         g           pmclk macro dcodec            p            fsgen           j                     pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl             Q                 %                                                                  f         g           pcore audio                 tx-swr-active-state                clk-pins            gpio0           swr_tx_clk                                       data-pins           gpio1 gpio2 gpio14          swr_tx_data                                         rx-swr-active-state                clk-pins            gpio3           swr_rx_clk                                       data-pins           gpio4 gpio5         swr_rx_data                                         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk                             data-pins           gpio7           dmic1_data                               dmic23-default-state       clk-pins            gpio8         
  dmic2_clk                             data-pins           gpio9           dmic2_data                               wsa-swr-active-state                   clk-pins            gpio10          wsa_swr_clk                                      data-pins           gpio11          wsa_swr_data                                            wsa2-swr-active-state                  clk-pins            gpio15          wsa2_swr_clk                                         data-pins           gpio16          wsa2_swr_data                                              interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc             Q    @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc          Q    C                                                 interconnect@7e40000             2qcom,sm8550-lpass-ag-noc             Q                                         mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5          Q    @                6                            hc_irq pwr_irq              2      2                  piface core xo           U   1  @             d,        "h            8                     0                       5         6              sdhc-ddr cpu-sdhc           2            \        <             	  idisabled       opp-table            2operating-points-v2                opp-19200000            !    $         (         opp-50000000            !            (   !      opp-100000000           !             (   "      opp-202000000           !    
F        (               video-codec@aa00000          2qcom,sm8550-iris             Q    
                 6                                    8   
   8            venus vcodec0 mxc mmcx                         2                        piface core vcodec0_core       0     5         6   %                             cpu-cfg video-mem                      <   2   !        Cbus         U   1  @       1  G             \      	  idisabled       opp-table            2operating-points-v2                opp-240000000           !    N         (   "   !      opp-338000000           !    %x        (   "   "      opp-366000000           !    з        (            opp-444000000           !    v         (   z   z      opp-533333334           !    V        (                  clock-controller@aaf0000             2qcom,sm8550-videocc          Q    
                     +   2               8           (   !         p                      A                     cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci             Q    
P                6                                                           pcamnoc_axi cpas_ahb cci                       L              |default sleep         	  idisabled                                 i2c-bus@0            Q             } B@                                i2c-bus@1            Q            } B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci             Q    
`                6                                                   
        pcamnoc_axi cpas_ahb cci                    L           |default sleep         	  idisabled                                 i2c-bus@0            Q             } B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci             Q    
p                6                                                           pcamnoc_axi cpas_ahb cci                       L              |default sleep         	  idisabled                                 i2c-bus@0            Q             } B@                                i2c-bus@1            Q            } B@                                   clock-controller@ade0000             2qcom,sm8550-camcc            Q    
                     2      +      ,            8           (   !         p                      A                     display-subsystem@ae00000            2qcom,sm8550-mdss             Q    
                 mdss            6       S                                          2      2         =        <                             0                       5         6              mdp0-mem cpu-cfg            U   1                                         J      	  idisabled                   display-controller@ae01000           2qcom,sm8550-dpu           Q    
           
        0       	  mdp vbif                         6          0      2      2               @      =      I      !  pbus nrt_bus iface lut core vsync                8                 I        $               ports                                port@0           Q       endpoint            V                        port@1           Q      endpoint            V                        port@2           Q      endpoint            V                           opp-table            2operating-points-v2                opp-200000000           !             (   !      opp-325000000           !    _@        (   "      opp-375000000           !    Z        (         opp-514000000           !            (   z            displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P   Q    
             
            
            
            
                             6         (                                       ;  pcore_iface core_aux ctrl_link ctrl_link_iface stream_pixel                              f   0      0           O   0           Tdp          j                           8         	  idisabled       ports                                port@0           Q       endpoint            V                        port@1           Q      endpoint            V                           opp-table            2operating-points-v2                opp-162000000           !    	        (         opp-270000000           !    ߀        (   !      opp-540000000           !     /         (         opp-810000000           !    0G        (   z            dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl          Q    
@              	  dsi_ctrl                         6         0                     B      8         2         $  pbyte byte_intf pixel core iface bus             8                       C        f                                O           Tdsi                                 	  idisabled       ports                                port@0           Q       endpoint            V                        port@1           Q      endpoint                opp-table            2operating-points-v2                opp-187500000           !    -        (   !      opp-300000000           !             (   "      opp-358000000           !    V        (               phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0   Q    
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll                                
  piface ref            p                     	  idisabled                      dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl          Q    
`              	  dsi_ctrl                         6         0                     D      :         2         $  pbyte byte_intf pixel core iface bus             8                 	      E        f                                O           Tdsi                                 	  idisabled       ports                                port@0           Q       endpoint            V                        port@1           Q      endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0   Q    
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll                                
  piface ref            p                     	  idisabled                         clock-controller@af00000             2qcom,sm8550-dispcc           Q    
               \      +      2      ,                             0      0                                       8           (   !         p                      A         	  idisabled                      phy@88e3000          2qcom,sm8550-snps-eusb2-phy           Q    0       T                                   pref         <   2         	  idisabled                      phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy          Q           0              2             2      2           paux ref com_aux usb3_pipe               2           <   2      2           Cphy common           p                       }      	  idisabled                0   ports                                port@0           Q       endpoint             port@1           Q      endpoint            V                        port@2           Q      endpoint            V                              usb@a6f8800          2qcom,sm8550-dwc3 qcom,dwc3           Q    
o                                           J      0      2      2      2      2      2               &  pcfg_noc core iface sleep mock_utmi xo              2      2           $        D                                                             <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             2           (   z        <   2         0     ]                  5         6   $           usb-ddr apps-usb          	  idisabled       usb@a600000       
   2snps,dwc3            Q    
`                 6                  U   1   @            O      0            Tusb2-phy usb3-phy                                                            	
         	"         	:         	P         	f         	{         \         	   ports                                port@0           Q       endpoint             port@1           Q      endpoint            V                                 interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc              Q    "             @        d      <  	         ^   ^  a      }   ?      ~                                                                 thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2           Q    '            "                 	           6                          uplow critical          	                     thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2           Q    '             "0                	           6                          uplow critical          	                     thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2           Q    '0            "@                	           6                          uplow critical          	                     power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp           Q    0                      *           *                      *                 p                      sram@c3f0000             2qcom,rpmh-stats          Q    ?               spmi@c400000             2qcom,spmi-pmic-arb        P   Q    @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         periph_irq                                       	            	                                                     pmic@1           2qcom,pm8550 qcom,spmi-pmic           Q                                    temp-alarm@a00           2qcom,spmi-temp-alarm             Q  
         6      
               	                      gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio          Q                                                                                volume-up-n-state           gpio6           normal          	            	                              led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led            Q         	  idisabled          pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
         	  idisabled             pmic@2           2qcom,pm8550 qcom,spmi-pmic           Q                                    temp-alarm@a00           2qcom,spmi-temp-alarm             Q  
         6      
               	                      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio            Q                                                                                      pmic@3           2qcom,pm8550 qcom,spmi-pmic           Q                                    temp-alarm@a00           2qcom,spmi-temp-alarm             Q  
         6      
               	                      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio            Q                                                                                      pmic@4           2qcom,pm8550 qcom,spmi-pmic           Q                                    temp-alarm@a00           2qcom,spmi-temp-alarm             Q  
         6      
               	                      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio            Q                                                                                      pmic@6           2qcom,pm8550 qcom,spmi-pmic           Q                                    temp-alarm@a00           2qcom,spmi-temp-alarm             Q  
         6      
               	                      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio            Q                                                                                      pmic@0           2qcom,pm8550 qcom,spmi-pmic           Q                                     pon@1300             2qcom,pmk8350-pon             Q            	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey         6                     
   t        iokay          resin            2qcom,pmk8350-resin          6                     iokay            
   r         rtc@6100             2qcom,pmk8350-rtc             Q  a   b       
  rtc alarm           6       b            nvram@7100           2qcom,spmi-sdam           Q  q                                   J      q       reboot-reason@48             Q   H           
                           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio             Q                                                                                         pinctrl@f100000          2qcom,sm8550-tlmm             Q           0          6                                                             x                   
           
*   $      2               x   cci0-0-default-state                   sda-pins            gpio110         cci_i2c_sda                    	        scl-pins            gpio111         cci_i2c_scl                    	           cci0-0-sleep-state                 sda-pins            gpio110         cci_i2c_sda                     
?      scl-pins            gpio111         cci_i2c_scl                     
?         cci0-1-default-state                   sda-pins            gpio112         cci_i2c_sda                    	        scl-pins            gpio113         cci_i2c_scl                    	           cci0-1-sleep-state                 sda-pins            gpio112         cci_i2c_sda                     
?      scl-pins            gpio113         cci_i2c_scl                     
?         cci1-0-default-state                   sda-pins            gpio114         cci_i2c_sda                    	        scl-pins            gpio115         cci_i2c_scl                    	           cci1-0-sleep-state                 sda-pins            gpio114         cci_i2c_sda                     
?      scl-pins            gpio115         cci_i2c_scl                     
?         cci2-0-default-state                   sda-pins            gpio74          cci_i2c_sda                    	        scl-pins            gpio75          cci_i2c_scl                    	           cci2-0-sleep-state                 sda-pins            gpio74          cci_i2c_sda                     
?      scl-pins            gpio75          cci_i2c_scl                     
?         cci2-1-default-state                   sda-pins            gpio0           cci_i2c_sda                    	        scl-pins            gpio1           cci_i2c_scl                    	           cci2-1-sleep-state                 sda-pins            gpio0           cci_i2c_sda                     
?      scl-pins            gpio1           cci_i2c_scl                     
?         hub-i2c0-data-clk-state         gpio16 gpio17           i2chub0_se0                     	            R      hub-i2c1-data-clk-state         gpio18 gpio19           i2chub0_se1                     	            S      hub-i2c2-data-clk-state         gpio20 gpio21           i2chub0_se2                     	            T      hub-i2c3-data-clk-state         gpio22 gpio23           i2chub0_se3                     	            U      hub-i2c4-data-clk-state         gpio4 gpio5         i2chub0_se4                     	            V      hub-i2c5-data-clk-state         gpio6 gpio7         i2chub0_se5                     	            W      hub-i2c6-data-clk-state         gpio8 gpio9         i2chub0_se6                     	            X      hub-i2c7-data-clk-state         gpio10 gpio11           i2chub0_se7                     	            Y      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8                     	            Z      hub-i2c9-data-clk-state         gpio84 gpio85           i2chub0_se9                     	            [      pcie0-default-state             y   perst-pins          gpio94          gpio                        
?      clkreq-pins         gpio95          pcie0_clk_req_n                     	      wake-pins           gpio96          gpio                        	         pcie1-default-state    perst-pins          gpio97          gpio                        
?      clkreq-pins         gpio98          pcie1_clk_req_n                     	      wake-pins           gpio99          gpio                        	         qup-i2c0-data-clk-state         gpio28 gpio29         	  qup1_se0                       	              \      qup-i2c1-data-clk-state         gpio32 gpio33         	  qup1_se1                       	              a      qup-i2c2-data-clk-state         gpio36 gpio37         	  qup1_se2                       	              d      qup-i2c3-data-clk-state         gpio40 gpio41         	  qup1_se3                       	              g      qup-i2c4-data-clk-state         gpio44 gpio45         	  qup1_se4                       	              j      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5                       	              m      qup-i2c6-data-clk-state         gpio48 gpio49         	  qup1_se6                       	              p      qup-i2c8-data-clk-state             3   scl-pins            gpio57          qup2_se0_l1_mira                       	        sda-pins            gpio56          qup2_se0_l0_mira                       	           qup-i2c9-data-clk-state         gpio60 gpio61         	  qup2_se1                       	              <      qup-i2c10-data-clk-state            gpio64 gpio65         	  qup2_se2                       	              ?      qup-i2c11-data-clk-state            gpio68 gpio69         	  qup2_se3                       	              B      qup-i2c12-data-clk-state            gpio2 gpio3       	  qup2_se4                       	              E      qup-i2c13-data-clk-state            gpio80 gpio81         	  qup2_se5                       	              H      qup-i2c15-data-clk-state            gpio72 gpio106        	  qup2_se7                       	              N      qup-spi0-cs-state           gpio31        	  qup1_se0                                    `      qup-spi0-data-clk-state         gpio28 gpio29 gpio30          	  qup1_se0                                    _      qup-spi1-cs-state           gpio35        	  qup1_se1                                    c      qup-spi1-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se1                                    b      qup-spi2-cs-state           gpio39        	  qup1_se2                                    f      qup-spi2-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se2                                    e      qup-spi3-cs-state           gpio43        	  qup1_se3                                    i      qup-spi3-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se3                                    h      qup-spi4-cs-state           gpio47        	  qup1_se4                                    l      qup-spi4-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se4                                    k      qup-spi5-cs-state           gpio55        	  qup1_se5                                    o      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5                                    n      qup-spi6-cs-state           gpio51        	  qup1_se6                                    r      qup-spi6-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se6                                    q      qup-spi8-cs-state           gpio59          qup2_se0_l3_mira                                    ;      qup-spi8-data-clk-state         gpio56 gpio57 gpio58            qup2_se0_l2_mira                                    :      qup-spi9-cs-state           gpio63        	  qup2_se1                                    >      qup-spi9-data-clk-state         gpio60 gpio61 gpio62          	  qup2_se1                                    =      qup-spi10-cs-state          gpio67        	  qup2_se2                                    A      qup-spi10-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se2                                    @      qup-spi11-cs-state          gpio71        	  qup2_se3                                    D      qup-spi11-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se3                                    C      qup-spi12-cs-state          gpio119       	  qup2_se4                                    G      qup-spi12-data-clk-state            gpio2 gpio3 gpio118       	  qup2_se4                                    F      qup-spi13-cs-state          gpio83        	  qup2_se5                                    J      qup-spi13-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se5                                    I      qup-spi15-cs-state          gpio75        	  qup2_se7                                    Q      qup-spi15-data-clk-state            gpio72 gpio106 gpio74         	  qup2_se7                                    P      qup-uart7-default-state         gpio26 gpio27         	  qup1_se7                                    s      qup-uart14-default-state            gpio78 gpio79         	  qup2_se6                        	            K      qup-uart14-cts-rts-state            gpio76 gpio77         	  qup2_se6                        
?            L      sdc2-sleep-state       clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             	                 data-pins         
  sdc2_data            	                    sdc2-default-state     clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd             	           
      data-pins         
  sdc2_data            	           
            iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500           Q                                           6       A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   \            1      interrupt-controller@17100000            2arm,gic-v3            Q                                     J                            
N           
e               6      	                                           msi-controller@17140000          2arm,gic-v3-its           Q                      
z        
               v         timer@17420000           2arm,armv7-timer-mem          Q    B                  J                                            frame@17421000           QB    B             
            6                          frame@17423000           QB0            
           6       	         	  idisabled          frame@17425000           QBP            
           6       
         	  idisabled          frame@17427000           QBp            
           6                	  idisabled          frame@17429000           QB            
           6                	  idisabled          frame@1742b000           QB            
           6                	  idisabled          frame@1742d000           QB            
           6                	  idisabled             rsc@17a00000          	   apps_rsc             2qcom,rpmh-rsc         @   Q                                                            drv-0 drv-1 drv-2 drv-3       $  6                                      
           
            
                                      #   bcm-voter            2qcom,bcm-voter                     clock-controller             2qcom,sm8550-rpmh-clk             p           pxo                                power-controller             2qcom,sm8550-rpmhpd          A                          8   opp-table            2operating-points-v2                opp-16                   opp-48             0                  opp-52             4      opp-56             8                  opp-60             <      opp-64             @            !      opp-80             P      opp-128                        "      opp-144                  opp-192                              opp-256                        z      opp-320           @      opp-336           P      opp-384                             opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         
b      bob1          
  
vreg_bob1           
 2K          <l                 bob2          
  
vreg_bob2           
 )          <l                 ldo1            
vreg_l1b_1p8            
 w@         w@                 ldo2            
vreg_l2b_3p0            
 -          -                  ldo5            
vreg_l5b_3p1            
 /]          /]                  ldo6            
vreg_l6b_1p8            
 w@         -                  ldo7            
vreg_l7b_1p8            
 w@         -                  ldo8            
vreg_l8b_1p8            
 w@         -                  ldo9            
vreg_l9b_2p9            
 -*         -                  ldo11           
vreg_l11b_1p2           
 O                           ldo12           
vreg_l12b_1p8           
 w@         w@                 ldo13           
vreg_l13b_3p0           
 -         -                 ldo14           
vreg_l14b_3p2           
 0          0                  ldo15           
vreg_l15b_1p8           
 w@         w@                    0        I               a      ldo16           
vreg_l16b_2p8           
 *         *                 ldo17           
vreg_l17b_2p5           
 &5@         &5@                                regulators-1             2qcom,pm8550vs-rpmh-regulators           
c      ldo3            
vreg_l3c_0p9            
 m                             regulators-2             2qcom,pm8550vs-rpmh-regulators           
d      ldo1            
vreg_l1d_0p88           
 m         	                                regulators-3             2qcom,pm8550vs-rpmh-regulators           
e      smps4           
vreg_s4e_0p9            
 @                          smps5           
vreg_s5e_1p1            
 z                           ldo1            
vreg_l1e_0p88           
 m         m                       {      ldo2            
vreg_l2e_0p9            
 @                          ldo3            
vreg_l3e_1p2            
 O         O                       |         regulators-4             2qcom,pm8550ve-rpmh-regulators           
f      smps4           
vreg_s4f_0p5            
           
`                 ldo1            
vreg_l1f_0p9            
                           ldo2            
vreg_l2f_0p88           
 m                          ldo3            
vreg_l3f_0p91           
 m                             regulators-5             2qcom,pm8550vs-rpmh-regulators           
g      smps1           
vreg_s1g_1p2            
 O                           smps2           
vreg_s2g_0p8            
 5          B@                 smps3           
vreg_s3g_0p7            
          Q                 smps4           
vreg_s4g_1p3            
 O         @                 smps5           
vreg_s5g_0p8            
           Q                 smps6           
vreg_s6g_1p8            
 w@                          ldo1            
vreg_l1g_1p2            
 O         O                             ldo2            
vreg_l2g_1p2            
 O         O                 ldo3            
vreg_l3g_1p2            
 O         O                                regulators-6             2qcom,pm8010-rpmh-regulators         
m      ldo1            
vreg_l1m_1p056          
                             ldo2            
vreg_l2m_1p056          
                             ldo3            
vreg_l3m_2p8            
 *         *                 ldo4            
vreg_l4m_2p8            
 *         *                 ldo5            
vreg_l5m_1p8            
 w@         w@                 ldo6            
vreg_l6m_1p8            
 w@         w@                 ldo7            
vreg_l7m_2p9            
 *         ,O                    regulators-7             2qcom,pm8010-rpmh-regulators         
n      ldo1            
vreg_l1n_1p1            
 ؀         O                 ldo2            
vreg_l2n_1p1            
 ؀         O                 ldo3            
vreg_l3n_2p8            
 *         -                 ldo4            
vreg_l4n_2p8            
 *         2Z                 ldo5            
vreg_l5n_1p8            
 w@         w@                 ldo6            
vreg_l6n_3p3            
 *         2j@                 ldo7            
vreg_l7n_2p96           
 *         -*                       cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0   Q                             0              '  freq-domain0 freq-domain1 freq-domain2              +   2           pxo alternate          $  6                                    $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2         u            p                     pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon            Q    $	                6       Q                                            opp-table            2operating-points-v2                opp-0           u p      opp-1           u ,h      opp-2           u Z      opp-3           u ci8      opp-4           u y      opp-5           u A      opp-6           u H      opp-7           u ։      opp-8           u h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon          Q    $d                6      E              5         5                    opp-table            2operating-points-v2                opp-0           u E      opp-1           u l}p      opp-2           u       opp-3           u       opp-4           u 9`      opp-5           u /(            interconnect@24100000            2qcom,sm8550-gem-noc          Q    $                                           5      system-cache-controller@25000000             2qcom,sm8550-llcc          `   Q    %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base         6      
         interconnect@320c0000            2qcom,sm8550-nsp-noc          Q    2                                                 remoteproc@32300000          2qcom,sm8550-cdsp-pas             Q    20               @           B                                              #  wdog fatal ready handover stop-ack                          pxo              8       8   
   8            cx mxc nsp                                                                             stop            iokay          .  qcom/sm8550/cdsp.mbn qcom/sm8550/cdsp_dtb.mbn      glink-edge             *                     *                cdsp                  fastrpc          2qcom,fastrpc            &fastrpcglink-apps-dsp            cdsp             :                             compute-cb@1             2qcom,fastrpc-compute-cb          Q         $  U   1  a       1         1              \      compute-cb@2             2qcom,fastrpc-compute-cb          Q         $  U   1  b       1         1              \      compute-cb@3             2qcom,fastrpc-compute-cb          Q         $  U   1  c       1         1              \      compute-cb@4             2qcom,fastrpc-compute-cb          Q         $  U   1  d       1         1              \      compute-cb@5             2qcom,fastrpc-compute-cb          Q         $  U   1  e       1         1              \      compute-cb@6             2qcom,fastrpc-compute-cb          Q         $  U   1  f       1         1              \      compute-cb@7             2qcom,fastrpc-compute-cb          Q         $  U   1  g       1         1              \      compute-cb@8             2qcom,fastrpc-compute-cb          Q         $  U   1  h       1         1              \                  thermal-zones      aoss0-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss0-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss1-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss2-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss3-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu3-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu3-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-top-thermal                  	   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-bottom-thermal               
   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-middle-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                aoss1-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu0-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu1-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu2-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cdsp0-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp1-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp2-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp3-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             video-thermal                    trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             mem-thermal            
              	   trips      thermal-engine-config            H                   Epassive       ddr0-config          _                   Epassive       reset-mon-config             8                   Epassive             modem0-thermal                
   trips      thermal-engine-config            H                   Epassive       mdmss0-config0           p                   Epassive       mdmss0-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem1-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss1-config0           p                   Epassive       mdmss1-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem2-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss2-config0           p                   Epassive       mdmss2-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem3-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss3-config0           p                   Epassive       mdmss3-config1           (                   Epassive       reset-mon-config             8                   Epassive             camera0-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             camera1-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             aoss2-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             gpuss-0-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-1-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-2-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-3-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-4-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-5-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-6-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-7-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive                   trip-point1          _                   Ehot       trip-point2                          	   Ecritical                pm8550-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-c-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-d-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-e-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-g-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot                timer            2arm,armv8-timer       0  6                              
        reboot-mode          2nvmem-reboot-mode                      reboot-mode                             aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       gpio-keys         
   2gpio-keys                      |default    key-volume-up         
   Volume Up           
   s        c                             .         @         vph-pwr-regulator            2regulator-fixed         
vph_pwr         
 8u          8u          a         N         	interrupt-parent #address-cells #size-cells model compatible chassis-type ranges reg width height stride format #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters opp-hz required-opps interrupts #power-domain-cells domain-idle-states no-map hwlocks qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios opp-peak-kBps assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction qcom,ice reset-gpios vcc-supply vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply #hwlock-cells qcom,gmu memory-region opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names firmware-name label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,ports-sinterval-low gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width sdhci-caps-mask pinctrl-1 remote-endpoint assigned-clock-parents orientation-switch snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id power-source bias-pull-up #pwm-cells linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes regulator-always-on #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 debounce-interval linux,can-disable wakeup-source regulator-boot-on 