 v   8    (            1b                                                                    C   ,Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows        1   2qcom,x1e001de-devkit qcom,x1e001de qcom,x1e80100       chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I          Y             f        sleep-clk            2fixed-clock          I           Y             f   3      bi-tcxo-div2-clk             2fixed-factor-clock           Y             n                u                        f   2      bi-tcxo-ao-div2-clk          2fixed-factor-clock           Y             n               u                        f           cpus                                 cpu@0            cpu          2qcom,oryon                            psci                                         
   psci perf                        f      l2-cache             2cache                                  f            cpu@100          cpu          2qcom,oryon                           psci                                         
   psci perf                        f         cpu@200          cpu          2qcom,oryon                           psci                                         
   psci perf                        f         cpu@300          cpu          2qcom,oryon                           psci                            	             
   psci perf                        f         cpu@10000            cpu          2qcom,oryon                           psci                
                        
   psci perf                        f      l2-cache             2cache                                  f   
         cpu@10100            cpu          2qcom,oryon                          psci                
                        
   psci perf                        f         cpu@10200            cpu          2qcom,oryon                          psci                
                        
   psci perf                        f         cpu@10300            cpu          2qcom,oryon                          psci                
                        
   psci perf                        f         cpu@20000            cpu          2qcom,oryon                           psci                                        
   psci perf                        f      l2-cache             2cache                                  f            cpu@20100            cpu          2qcom,oryon                          psci                                        
   psci perf                        f         cpu@20200            cpu          2qcom,oryon                          psci                                        
   psci perf                        f         cpu@20300            cpu          2qcom,oryon                          psci                                        
   psci perf                        f         cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                    core2                    core3                       cluster2             f     core0                    core1                    core2                    core3                          idle-states         psci       cpu-sleep-0          2arm,idle-state          ret         %           <           M          ]  X         f            domain-idle-states     cluster-sleep-0          2domain-idle-state           %  D        <  ^        M          ]  	         f   +      cluster-sleep-1          2domain-idle-state           %  T        <          M          ]  X         f   ,            dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint            n             f  I               firmware       scm          2qcom,scm-x1e80100 qcom,scm          ~   !         "                 #           f        scmi          	   2arm,scmi               $       $           tx rx              %   &                             protocol@13                                 f               interconnect-0           2qcom,x1e80100-clk-virt                        '         f   >      interconnect-1           2qcom,x1e80100-mc-virt                         '         f   "      memory@80000000          memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                           (         f         power-domain-cpu1                           (         f         power-domain-cpu2                           (         f         power-domain-cpu3                           (         f   	      power-domain-cpu4                           )         f         power-domain-cpu5                           )         f         power-domain-cpu6                           )         f         power-domain-cpu7                           )         f         power-domain-cpu8                           *         f         power-domain-cpu9                           *         f         power-domain-cpu10                          *         f         power-domain-cpu11                          *         f         power-domain-cpu-cluster0                          +   ,            -         f   (      power-domain-cpu-cluster1                          +   ,            -         f   )      power-domain-cpu-cluster2                          +   ,            -         f   *      power-domain-system                      f   -         reserved-memory                                   
   gunyah-hyp@80000000                                          f        hyp-elf-package@80800000                                             f        ncc@80a00000                        @                    f        cpucp-log@80e00000                                          f        cpucp@80e40000                      T                    f        reserved-region@81380000                 8                        tags-region@81400000                 @                           f        xbl-dtlog@81a00000                                          f        xbl-ramdump@81a40000                                            f        aop-image@81c00000                                          f        aop-cmd-db@81c60000          2qcom,cmd-db                                         f        aop-config@81c80000                                         f        tme-crash-dump@81ca0000                                         f        tme-log@81ce0000                         @                   f        uefi-log@81ce4000                @                          f        secdata-apss@81cff000                                          f        pdp-ns-shared@81e00000                                          f        gpu-prr@81f00000                                            f        tpm-control@81f10000                                            f        usb-ucsi-shared@81f20000                                            f        pld-pep@81f30000                         `                   f        pld-gmu@81f36000                 `                          f        pld-pdp@81f37000                 p                          f        tz-stat@82700000                 p                           f        xbl-tmp-buffer@82800000                                         f        adsp-rpc-remote-heap@84b00000                                           f        spu-secure-shared-memory@85300000                0                           f        adsp-boot-dtb@866c0000               l                           f        spss-region@86700000                 p       @                    f        adsp-boot@86b00000                                          f        video@87700000               p       p                    f        adspslpi@87e00000                                          f         q6-adsp-dtb@8b800000                                            f         cdsp@8b900000                                           f        q6-cdsp-dtb@8d900000                                            f        gpu-microcode@8d9fe000                                          f         cvp@8da00000                        p                    f        camera@8e100000                                         f        av1-encoder@8e900000                        p                    f        reserved-region@8f000000                                          wpss@8fa00000                                          f        q6-wpss-dtb@91300000                 0                           f        xbl-sc@d8000000                                          f        reserved-region@d8040000                        
                 qtee@d80e0000                       R                    f        ta@d8600000              `                          f        tags@e1000000                       j                    f        llcc-lpi@ff800000                       `                    f        smem@ffe00000         
   2qcom,smem                                     .                     f        linux,cma            2shared-dma-pool                          %         .         opp-table-qup100mhz          2operating-points-v2          f   J   opp-75000000            @    xh        G   /      opp-100000000           @             G   0         opp-table-qup120mhz          2operating-points-v2          f   C   opp-75000000            @    xh        G   /      opp-120000000           @    '         G   0         smp2p-adsp           2qcom,smp2p          U   1                    1              i            s                  master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-cdsp           2qcom,smp2p          U   1                    1              i   ^          s                  master-kernel           master-kernel                       f        slave-kernel            slave-kernel                                 f           soc@0            2simple-bus                                                                  
                                f     clock-controller@100000          2qcom,x1e80100-gcc                                 4   n   2   3   4   5   6   7       8       9       :                ;             Y                                  f   =      mailbox@408000           2qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  f   1      dma-controller@800000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                    >        !           ,   <  6          	  3disabled             f   A      geniqup@8c0000           2qcom,geni-se-qup                                     n   =      =           :m-ahb s-ahb         ,   <  #                                      
        3okay             f     i2c@880000           2qcom,geni-i2c                         @               (            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A              A                  ^tx rx           h   B        rdefault                                 	  3disabled             f        spi@880000           2qcom,geni-spi                         @               (            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               C         Y   A              A                  ^tx rx           h   D   E        rdefault                                 	  3disabled             f        i2c@884000           2qcom,geni-i2c                 @       @               )            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   F        rdefault                                 	  3disabled             f        spi@884000           2qcom,geni-spi                 @       @               )            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               C         Y   A             A                 ^tx rx           h   G   H        rdefault                                 	  3disabled             f        i2c@888000           2qcom,geni-i2c                        @               *            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   I        rdefault                                 	  3disabled             f         spi@888000           2qcom,geni-spi                        @               *            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   K   L        rdefault                                 	  3disabled             f        i2c@88c000           2qcom,geni-i2c                        @               +            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   M        rdefault                                 	  3disabled             f        spi@88c000           2qcom,geni-spi                        @               +            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   N   O        rdefault                                 	  3disabled             f        i2c@890000           2qcom,geni-i2c                         @               ,            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   P        rdefault                                 	  3disabled             f        spi@890000           2qcom,geni-spi                         @               ,            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   Q   R        rdefault                                 	  3disabled             f        i2c@894000           2qcom,geni-i2c                 @       @               -            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   S        rdefault                                 	  3disabled             f        spi@894000           2qcom,geni-spi                 @       @               -            n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   T   U        rdefault                                 	  3disabled             f        serial@894000            2qcom,geni-debug-uart                  @       @               -            n   =           :se        0  ~   >         >         ?         @              Fqup-core qup-config             ;               J        h   V        rdefault         3okay             f        i2c@898000           2qcom,geni-i2c                        @                           n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   W        rdefault                                 	  3disabled             f  	      spi@898000           2qcom,geni-spi                        @                           n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   X   Y        rdefault                                 	  3disabled             f  
      i2c@89c000           2qcom,geni-i2c                        @                           n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;            G   /         Y   A             A                 ^tx rx           h   Z        rdefault                                 	  3disabled             f        spi@89c000           2qcom,geni-spi                        @                           n   =           :se        H  ~   >         >         ?         @         !         "              Fqup-core qup-config qup-memory              ;               J         Y   A             A                 ^tx rx           h   [   \        rdefault                                 	  3disabled             f           dma-controller@a00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                          >        !           ,   <  6          	  3disabled             f   ^      geniqup@ac0000           2qcom,geni-se-qup                                     n   =      =           :m-ahb s-ahb         ,   <  #                                      
        3okay             f     i2c@a80000           2qcom,geni-i2c                         @                            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^              ^                  ^tx rx           h   _        rdefault                                 	  3disabled             f        spi@a80000           2qcom,geni-spi                         @                            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               C         Y   ^              ^                  ^tx rx           h   `   a        rdefault                                 	  3disabled             f        i2c@a84000           2qcom,geni-i2c                 @       @               !            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   b        rdefault                                 	  3disabled             f        spi@a84000           2qcom,geni-spi                 @       @               !            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               C         Y   ^             ^                 ^tx rx           h   c   d        rdefault                                 	  3disabled             f        i2c@a88000           2qcom,geni-i2c                        @               "            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   e        rdefault                                 	  3disabled             f        spi@a88000           2qcom,geni-spi                        @               "            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   f   g        rdefault                                 	  3disabled             f        i2c@a8c000           2qcom,geni-i2c                        @               #            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   h        rdefault                                 	  3disabled             f        spi@a8c000           2qcom,geni-spi                        @               #            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   i   j        rdefault                                 	  3disabled             f        i2c@a90000           2qcom,geni-i2c                         @               $            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   k        rdefault                                 	  3disabled             f        spi@a90000           2qcom,geni-spi                         @               $            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   l   m        rdefault                                 	  3disabled             f        i2c@a94000           2qcom,geni-i2c                 @       @               %            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   n        rdefault                                 	  3disabled             f        spi@a94000           2qcom,geni-spi                 @       @               %            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   o   p        rdefault                                 	  3disabled             f        i2c@a98000           2qcom,geni-i2c                        @               &            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   q        rdefault                                 	  3disabled             f        spi@a98000           2qcom,geni-spi                        @               &            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   r   s        rdefault                                 	  3disabled             f        serial@a98000            2qcom,geni-uart                       @               &            n   =           :se        0  ~   >         >         ?         @              Fqup-core qup-config             ;               J        h   t        rdefault       	  3disabled             f        i2c@a9c000           2qcom,geni-i2c                        @               '            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;            G   /         Y   ^             ^                 ^tx rx           h   u        rdefault                                 	  3disabled             f        spi@a9c000           2qcom,geni-spi                        @               '            n   =           :se        H  ~   >         >         ?         @         ]         "              Fqup-core qup-config qup-memory              ;               J         Y   ^             ^                 ^tx rx           h   v   w        rdefault                                 	  3disabled             f           dma-controller@b00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                         >        !           ,   <  V          	  3disabled             f   x      geniqup@bc0000           2qcom,geni-se-qup                                     n   =      =           :m-ahb s-ahb         ,   <  C                                      
        3okay             f     i2c@b80000           2qcom,geni-i2c                         @               u            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x              x                  ^tx rx           h   y        rdefault                                 	  3disabled             f         spi@b80000           2qcom,geni-spi                         @               u            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               C         Y   x              x                  ^tx rx           h   z   {        rdefault                                 	  3disabled             f  !      i2c@b84000           2qcom,geni-i2c                 @       @               G            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h   |        rdefault                                   3okay             I          f  "   typec-mux@8          2parade,ps8830                        n                 }           ~           ~           }           }                                    h           rdefault                      ports                                port@0                  endpoint            n            f           port@1                 endpoint            n            f            port@2                 endpoint            n            f                    spi@b84000           2qcom,geni-spi                 @       @               G            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               C         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  #      i2c@b88000           2qcom,geni-i2c                        @               H            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                 	  3disabled             f  $      serial@b88000            2qcom,geni-uart                       @               H            n   =           :se        0  ~   >         >         ?         @              Fqup-core qup-config             ;               J        h           rdefault       	  3disabled             f  %      spi@b88000           2qcom,geni-spi                        @               H            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  &      i2c@b8c000           2qcom,geni-i2c                        @               I            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                   3okay             I          f  '   typec-mux@8          2parade,ps8830                        n      
                                                                                
           h           rdefault                      ports                                port@0                  endpoint            n            f           port@1                 endpoint            n            f            port@2                 endpoint            n            f                    spi@b8c000           2qcom,geni-spi                        @               I            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  (      i2c@b90000           2qcom,geni-i2c                         @               J            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                 	  3disabled             f  )      spi@b90000           2qcom,geni-spi                         @               J            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  *      i2c@b94000           2qcom,geni-i2c                 @       @               K            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                   3okay             I          f  +   redriver@47          2nxp,ptn3222             G                               +                            h           rdefault          f         redriver@4f          2nxp,ptn3222             O                               +                            h           rdefault          f            spi@b94000           2qcom,geni-spi                 @       @               K            n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  ,      i2c@b98000           2qcom,geni-i2c                        @                           n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                 	  3disabled             f  -      spi@b98000           2qcom,geni-spi                        @                           n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  .      i2c@b9c000           2qcom,geni-i2c                        @                           n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;            G   /         Y   x             x                 ^tx rx           h           rdefault                                   3okay             I          f  /   typec-mux@8          2parade,ps8830                        n                                                                                                 h           rdefault                      ports                                port@0                  endpoint            n            f           port@1                 endpoint            n            f            port@2                 endpoint            n            f                    spi@b9c000           2qcom,geni-spi                        @                           n   =           :se        H  ~   >         >         ?         @         !          "              Fqup-core qup-config qup-memory              ;               J         Y   x             x                 ^tx rx           h              rdefault                                 	  3disabled             f  0         thermal-sensor@c271000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 U                             9uplow critical          I           W            f        thermal-sensor@c272000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                U                             9uplow critical          I           W            f        thermal-sensor@c273000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                U                             9uplow critical          I           W            f        thermal-sensor@c274000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                U                             9uplow critical          I           W            f        phy@fd3000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T                     n   #           :ref         m   =   6        3okay                       t                       f         phy@fd5000           2qcom,x1e80100-qmp-usb3-dp-phy                 P       @           n   =            =     =          :aux ref com_aux usb3_pipe               =           m   =   D   =   O        phy common           Y                               3okay                                   f   8   ports                                port@0                  endpoint            n            f            port@1                 endpoint            n            f            port@2                 endpoint            n            f                 phy@fd9000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     n   #           :ref         m   =   7        3okay                       t                       f         phy@fda000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           n   =             =  "   =  #        :aux ref com_aux usb3_pipe               =           m   =   E   =   P        phy common           Y                               3okay                                   f   9   ports                                port@0                  endpoint            n            f            port@1                 endpoint            n            f           port@2                 endpoint            n            f                 phy@fde000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     n   #           :ref         m   =   8        3okay                       t                       f         phy@fdf000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           n   =  $          =  &   =  '        :aux ref com_aux usb3_pipe               =           m   =   F   =   Q        phy common           Y                               3okay                                   f   :   ports                                port@0                  endpoint            n            f            port@1                 endpoint            n            f            port@2                 endpoint            n            f                 interconnect@1500000             2qcom,x1e80100-cnoc-main              P       D            '                    f         interconnect@1600000             2qcom,x1e80100-cnoc-cfg               `        f            '                    f   @      interconnect@1680000             2qcom,x1e80100-system-noc                 h                  '                    f  1      interconnect@16c0000             2qcom,x1e80100-pcie-south-anoc                l        Ѐ           '                    f         interconnect@16d0000             2qcom,x1e80100-pcie-center-anoc               m        p            '                    f  2      interconnect@16e0000             2qcom,x1e80100-aggre1-noc                 n       D            '                    f   ]      interconnect@1700000             2qcom,x1e80100-aggre2-noc                 p                   '                    f   !      interconnect@1740000             2qcom,x1e80100-pcie-north-anoc                t                   '                    f         interconnect@1750000             2qcom,x1e80100-usb-center-anoc                u                    '                    f  3      interconnect@1760000             2qcom,x1e80100-usb-north-anoc                 v        p           '                    f         interconnect@1770000             2qcom,x1e80100-usb-south-anoc                 w                   '                    f         interconnect@1780000             2qcom,x1e80100-mmss-noc               x                   '                    f        pcie@1bd0000                                 1X      r               pci          2qcom,pcie-x1e80100        `               0     x              x @           x             x             0                parf dbi elbi atu config mhi                                   T  
               x                 x0      x0              @      @       @                                                       l                                     D                                                 y         /  9msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   n   =   T   =   V   =   W   =   ^   =   _   =      =   !      <  :aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   T         $       0  ~             "         ?                       Fpcie-mem cpu-pcie           m   =      =           pci link_down               =              4        5pciephy         ?UUUUUUUUUUUUUUUU        OUUUUUUUU                 	  3disabled             f  4   opp-table            2operating-points-v2          f      opp-2500000         @     &%        G   /        ` А         opp-5000000         @     LK@        G   /        `           opp-10000000            @             G   /        ` B@         opp-20000000            @    1-         G   /        `          opp-40000000            @    bZ         G   /        ` =	          opp-8000000         @     z         G   0        `          opp-16000000            @     $         G   0        ` h         opp-32000000            @    H         G   0        ` <         opp-64000000            @    А         G   0        ` x-         opp-128000000           @              G   0        ` _(               phy@1be0000       "   2qcom,x1e80100-qmp-gen4x8-pcie-phy                               0   n   =   X   =   V   #      =   Y   =   [   =   ]      $  :aux cfg_ahb ref rchng pipe pipediv2         m   =      =           phy phy_nocsr              =   Y                      =            Y            npcie3_pipe_clk                    	  3disabled             f   4      pci@1bf8000         1X      r               pci          2qcom,pcie-x1e80100        `              0     p              p @           p             p                             parf dbi elbi atu config mhi                                   8  
               p                 p0      p0                                                                                 `                          E         F         G         H         I         J         (  9msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                           K                                   L                                   M                                            8   n   =   v   =   x   =   y   =      =      =      =   "      <  :aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   v         $       0  ~            "         ?                       Fpcie-mem cpu-pcie           m   =   "   =   #        pci link_down               =   
        G              7        5pciephy         ?UUUUUUUU        OUUUU        3okay                                                         rdefault         h            f  5      phy@1bfc000       "   2qcom,x1e80100-qmp-gen4x4-pcie-phy                                             0   n   =   z   =   x   #   
   =   {   =   }   =         $  :aux cfg_ahb ref rchng pipe pipediv2         m   =   %   =   $        phy phy_nocsr              =   {                      =   	           #               Y            npcie6a_pipe_clk                     3okay                                   f   7      pci@1c00000                              1X      r               pci          2qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                parf dbi elbi atu config mhi                                   8  
               ~                 ~0      ~0                                                            `         ^          _          `          Y          V          R          M          N         (  9msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                            F                                    G                                    H                                    I         8   n   =   k   =   m   =   n   =   t   =   u   =      =   !      <  :aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   k         $       0  ~            "         ?                       Fpcie-mem cpu-pcie           m   =      =           pci link_down               =           G              6        5pciephy         ?UUUU        3okay                                                         h           rdefault          f  6      phy@1c06000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   n   =   k   =   m   #      =   o   =   q   =   s      $  :aux cfg_ahb ref rchng pipe pipediv2         m   =       =           phy phy_nocsr              =   o                      =            Y            npcie5_pipe_clk                      3okay                                   f   6      pci@1c08000         1X      r               pci          2qcom,pcie-x1e80100        `              0     |             | @           |             |                             parf dbi elbi atu config mhi                                   8  
               |                 |0      |0                                                                                 `                                                                                        (  9msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                                 8   n   =   `   =   b   =   c   =   i   =   j   =      =   !      <  :aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   `         $       0  ~            "         ?                       Fpcie-mem cpu-pcie           m   =      =           pci link_down               =           G              5        5pciephy         ?UUUU        3okay                                              h           rdefault          f  7   pcie@0           pci                                                                              
         f  8         phy@1c0e000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   n   =   `   =   b   #       =   d   =   f   =   h      $  :aux cfg_ahb ref rchng pipe pipediv2         m   =      =           phy phy_nocsr              =   d                      =            Y            npcie4_pipe_clk                      3okay                                   f   5      hwlock@1f40000           2qcom,tcsr-mutex                                           f   .      clock-controller@1fc0000             2qcom,x1e80100-tcsr syscon                                  n                Y                       f   #      gpu@3d00000       !   2qcom,adreno-43050c01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           ,                                                              ~   ?          "               Fgfx-mem         3okay             f     zap-shader        	  3disabled   3                 3  qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn           f  9      opp-table         /   2operating-points-v2-adreno operating-points-v2           f      opp-1250000000          @    J|                  `          *_      opp-1175000000          @    F	                  ` ۳        *_      opp-1100000000          @    A                   ` ۳        *_      opp-1000000000          @    ;                   ` ۳        +_      opp-925000000           @    7"a@          @        ` ۳        +_      opp-800000000           @    /                    `         ,_      opp-744000000           @    ,X                    `         ._      opp-687000000           @    (                   ` |c        ._      opp-550000000           @     U                   ` \k        (_      opp-390000000           @    >           @        ` -        (_      opp-300000000           @                8        `          +_            gmu@3d6a000       '   2qcom,adreno-gmu-x185.1 qcom,adreno-gmu        0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           9hfi gmu       8   n                      =   $   =   7                  !  :ahb gmu cxo axi memnoc hub demet                                   cx gx           ,                  $                       f      opp-table            2operating-points-v2          f      opp-550000000           @     U                 opp-220000000           @                @            clock-controller@3d90000             2qcom,x1e80100-gpucc                                n   2   =   5   =   6         Y                                  f         iommu@3da0000         B   2qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                 -           :        8                                                                                                                                      >         ?         @         A                                                                                     n         =   7   =   8               :hlos bus iface ahb                                    f         interconnect@26400000            2qcom,x1e80100-gem-noc                &@       1            '                    f   ?      interconnect@320c0000            2qcom,x1e80100-nsp-noc                2                   '                    f        remoteproc@6800000           2qcom,x1e80100-adsp-pas                              <  U                                                    #  9wdog fatal ready handover stop-ack           n               :xo              ;      ;            lcx lmx         ~             "                            $           M               ^stop            3okay          _  qcom/x1e80100/Thundercomm/DEVKIT/qcadsp8380.mbn qcom/x1e80100/Thundercomm/DEVKIT/adsp_dtbs.elf           f  :   glink-edge          U   1                     1               tlpass                 fastrpc          2qcom,fastrpc            zfastrpcglink-apps-dsp           tadsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                     ,   <        <  c                   compute-cb@4             2qcom,fastrpc-compute-cb                     ,   <        <  d                   compute-cb@5             2qcom,fastrpc-compute-cb                     ,   <        <  e                   compute-cb@6             2qcom,fastrpc-compute-cb                     ,   <        <  f                   compute-cb@7             2qcom,fastrpc-compute-cb                     ,   <        <  g                      gpr       	   2qcom,gpr          
  zadsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          f     bedais           2qcom,q6apm-lpass-dais                       f        dais             2qcom,q6apm-dais         ,   <        <  a             f  ;         service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd          f  <   clock-controller             2qcom,q6prm-lpass-clocks          Y            f                     codec@6aa0000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   n      D         f         g              :mclk macro dcodec fsgen          Y          
  nwsa2-mclk                      WSA2             f         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                  n           :iface                             tWSA2            h           rdefault         m              swr_audio_cgcr                        	           ?   ?                ,             ?           R           d           u                                                                                      	  3disabled             f  =      codec@6ac0000         8   2qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   n      @         f         g              :mclk macro dcodec fsgen          Y            nmclk                        f         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                  n           :iface                             tRX          h           rdefault         m               swr_audio_cgcr                                                     ,           ?            R         d        u                                                                         3okay             f     codec@0,4            2sdw20217010d00                                                  f           codec@6ae0000         8   2qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   n      9         f         g              :mclk macro dcodec fsgen          Y            nmclk                        f         codec@6b00000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   n      B         f         g              :mclk macro dcodec fsgen          Y            nmclk                       WSA          f         soundwire@6b10000            2qcom,soundwire-v2.0.0                                  n           :iface                             tWSA         h           rdefault         m              swr_audio_cgcr                        	           ?   ?                ,             ?           R           d           u                                                                                      	  3disabled             f  >      clock-controller@6b6c000          6   2qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 Y                       f         soundwire@6d30000            2qcom,soundwire-v2.0.0                                  n           :iface                                     9core wakeup         tTX          m               swr_audio_cgcr          h           rdefault                                            ,              ?               R           d           u                                                                                   3okay             f     codec@0,3            2sdw20217010d00                          
                     f           codec@6d44000         8   2qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   n      9         f         g           :mclk macro dcodec            Y            nfsgen                       f         pinctrl@6e80000       >   2qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  n      f         g           :core audio                   /           ;                       f      tx-swr-active-state          f      clk-pins            Ggpio0           Lswr_tx_clk          U           d            n      data-pins           Ggpio1 gpio2         Lswr_tx_data         U           d            {         rx-swr-active-state          f      clk-pins            Ggpio3           Lswr_rx_clk          U           d            n      data-pins           Ggpio4 gpio5         Lswr_rx_data         U           d            {         dmic01-default-state             f  ?   clk-pins            Ggpio6         
  Ldmic1_clk           U                  data-pins           Ggpio7           Ldmic1_data          U                     dmic23-default-state             f  @   clk-pins            Ggpio8         
  Ldmic2_clk           U                  data-pins           Ggpio9           Ldmic2_data          U                     wsa-swr-active-state             f      clk-pins            Ggpio10          Lwsa_swr_clk         U           d            n      data-pins           Ggpio11          Lwsa_swr_data            U           d            {         wsa2-swr-active-state            f      clk-pins            Ggpio15          Lwsa2_swr_clk            U           d            n      data-pins           Ggpio16          Lwsa2_swr_data           U           d            {            clock-controller@6ea0000          ,   2qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                Y                       f         interconnect@7e40000             2qcom,x1e80100-lpass-ag-noc                                  '                    f  A      interconnect@7400000             2qcom,x1e80100-lpass-lpiaon-noc               @                  '                    f  B      interconnect@7430000             2qcom,x1e80100-lpass-lpicx-noc                C                   '                    f         mmc@8804000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            9hc_irq pwr_irq           n   =      =                  :iface core xo           ,   <                d,        h            ;                     0  ~   !         "         ?         @              Fsdhc-ddr cpu-sdhc                               3okay                  G           h                            rdefault sleep                                           	          f  C   opp-table            2operating-points-v2          f      opp-19200000            @    $         G         opp-50000000            @            G   /      opp-100000000           @             G   0      opp-202000000           @    
F        G               mmc@8844000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           9hc_irq pwr_irq           n   =      =                  :iface core xo           ,   <  `             d,        h            ;                     0  ~   !         "         ?         @              Fsdhc-ddr cpu-sdhc                             	  3disabled             f  D   opp-table            2operating-points-v2          f      opp-19200000            @    $         G         opp-50000000            @            G   /      opp-100000000           @             G   0      opp-202000000           @    
F        G               phy@88e0000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     n   #   	        :ref         m   =   9      	  3disabled             f         phy@88e1000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T                     n   #           :ref         m   =   4        3okay                       t                       f         phy@88e2000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     n   #           :ref         m   =   5        3okay                       t                       f         phy@88e3000          2qcom,x1e80100-qmp-usb3-uni-phy               0                   n   =            =     =          :aux ref com_aux pipe            m   =   G   =   L        phy phy_phy             =            Y            nusb_mp_phy0_pipe_clk                        3okay                                   f         phy@88e5000          2qcom,x1e80100-qmp-usb3-uni-phy               P                   n   =            =     =          :aux ref com_aux pipe            m   =   H   =   M        phy phy_phy             =            Y            nusb_mp_phy1_pipe_clk                        3okay                                   f         usb@a0f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   n   =      =     =      =     =     =      =       =      =         R  :cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =           $        4  U         r         :         9         
         1  9pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           G           m   =   A      0  ~            "         ?         @   %           Fusb-ddr apps-usb             	                                  
        3okay             f  E   usb@a000000       
   2snps,dwc3                
                        a           ,   <                    :            5usb2-phy usb3-phy            	         	.         	F         	\         	t                 	host             f  F   ports                                port@0                  endpoint            n            f           port@1                 endpoint            n            f                     usb@a2f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
/                                          
      H   n   =      =      =      =      =      =      =       =      =         R  :cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =      =            $        (  U                   2         1         &  9pwr_event dp_hs_phy_irq dm_hs_phy_irq               =           G           m   =   =      0  ~             "         ?         @   "           Fusb-ddr apps-usb             	      	  3disabled             f  G   usb@a200000       
   2snps,dwc3                
                                    ,   <                       	  5usb2-phy            	high-speed           	\         	t                  f  H   ports                                port@0                  endpoint             f  I                  usb@a4f8800           2qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   n   =      =      =      =     =     =      =       =      =         R  :cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =            $          U         9            :            5            8         4         3         6         5         7         8         l  9pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             =           G           m   =   >      0  ~            "         ?         @   &           Fusb-ddr apps-usb             	                                  
        3okay             f  J   usb@a400000       
   2snps,dwc3                
@                       3           ,   <                                   5usb2-0 usb3-0 usb2-1 usb3-1         	host             	         	.         	F         	\         	t                  f  K         usb@a6f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   n   =      =     =      =  
   =     =      =      =      =         R  :cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =           $        4  U         s         =                           1  9pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           G           m   =   ?         	                                  
        3okay             f  L   usb@a600000       
   2snps,dwc3                
`                       c           ,   <                     8            5usb2-phy usb3-phy            	         	.         	F         	\         	t                 	otg          	         f  M   ports                                port@0                  endpoint            n            f           port@1                 endpoint            n            f                     usb@a8f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   n   =      =     =      =     =     =      =       =      =         R  :cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =           $        4  U         t         <                  /         1  9pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           G           m   =   @      0  ~            "         ?         @   $           Fusb-ddr apps-usb             	                                  
        3okay             f  N   usb@a800000       
   2snps,dwc3                
                       e           ,   <  `                  9            5usb2-phy usb3-phy            	         	.         	F         	\         	t                 	host             f  O   ports                                port@0                  endpoint            n            f           port@1                 endpoint            n           f                     display-subsystem@ae00000            2qcom,x1e80100-mdss               
                 mdss                   S            n        =   &     :        m            H  ~           ?         "          "         ?         @              Fmdp0-mem mdp1-mem cpu-cfg                          ,   <                                                            
        3okay             f     display-controller@ae01000           2qcom,x1e80100-dpu                 
           
               	  mdp vbif            U            (   n   =   &          =     :     F        :nrt_bus iface lut core vsync                          ;            f  P   ports                                port@0                  endpoint            n           f           port@4                 endpoint            n           f           port@5                 endpoint            n           f           port@6                 endpoint            n  	         f              opp-table            2operating-points-v2          f     opp-200000000           @             G   /      opp-325000000           @    _@        G   0      opp-375000000           @    Z        G         opp-514000000           @            G         opp-575000000           @    "E        G  
            displayport-controller@ae90000           2qcom,x1e80100-dp          P       
             
            
            
            
                U           (   n                               ;  :core_iface core_aux ctrl_link ctrl_link_iface stream_pixel                            	   8      8                         ;              8           5dp                      3okay             f  Q   ports                                port@0                  endpoint            n           f           port@1                 endpoint            n          	                	    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           @    	h         G   /      opp-270000000           @    ߀        G   0      opp-540000000           @     /         G         opp-810000000           @    0G        G               displayport-controller@ae98000           2qcom,x1e80100-dp          P       
            
            
            
            
                U           (   n                               ;  :core_iface core_aux ctrl_link ctrl_link_iface stream_pixel                            	   9      9                         ;              9           5dp                      3okay             f  R   ports                                port@0                  endpoint            n           f           port@1                 endpoint            n          	                	    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           @    	h         G   /      opp-270000000           @    ߀        G   0      opp-540000000           @     /         G         opp-810000000           @    0G        G               displayport-controller@ae9a000           2qcom,x1e80100-dp          P       
            
            
            
            
                U           (   n          "     $     '     (      ;  :core_iface core_aux ctrl_link ctrl_link_iface stream_pixel               %     )        	   :      :                         ;              :           5dp                      3okay             f  S   ports                                port@0                  endpoint            n           f  	         port@1                 endpoint            n          	                	    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           @    	h         G   /      opp-270000000           @    ߀        G   0      opp-540000000           @     /         G         opp-810000000           @    0G        G               displayport-controller@aea0000           2qcom,x1e80100-dp          P       
             
            
            
            
                U           (   n          -     /     2     3      ;  :core_iface core_aux ctrl_link ctrl_link_iface stream_pixel               0     4        	                                 ;                     5dp                    	  3disabled             f  T   ports                                port@0                  endpoint            n           f           port@1                       opp-table            2operating-points-v2          f     opp-160000000           @    	h         G   /      opp-270000000           @    ߀        G   0      opp-540000000           @     /         G         opp-810000000           @    0G        G                  phy@aec2a00          2qcom,x1e80100-dp-phy          @       
*           
"            
&            
                 n     "             :aux cfg_ahb             ;            Y                     	  3disabled             f  U      phy@aec5a00          2qcom,x1e80100-dp-phy          @       
Z           
R            
V            
P                n     -             :aux cfg_ahb             ;            Y                     	  3disabled             f        clock-controller@af00000             2qcom,x1e80100-dispcc                 
               d   n   2     =   %   3                   8      8      9      9      :      :                          ;           G   /         Y                                  f        interrupt-controller@b220000             2qcom,x1e80100-pdc qcom,pdc                "             @        d      H  	         *   *         /  
   4   c  a                 0                                             f         power-management@c300000          %   2qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      1        U   1                      1                 Y             f         sram@c3f0000             2qcom,rpmh-stats              ?               arbiter@c400000          2qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 core chnls obsrvr           	            	                                      
         f  V   spmi@c42d000                  B       @     L               
  cnfg intr           9periph_irq          U                                                                f  W   pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      f  X   pon@1300             2qcom,pmk8350-pon                         	  hlos pbs             f  Y   pwrkey           2qcom,pmk8350-pwrkey                              

   t         f  Z      resin            2qcom,pmk8350-resin                             	  3disabled             f  [         rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b               
         
#         f  \      nvram@7100           2qcom,spmi-sdam             q                                  
      q             f  ]   reboot-reason@48                H           
6               f  ^         gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                 ;                     /                                f        pwm          2qcom,pmk8550-pwm            
;         	  3disabled             f  _         pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     f  `   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                              ;                      /                                f      rtmr0-reset-n-active-state          Ggpio10          Lnormal          
F            n         
S         
a         f         usb0-3p3-reg-en-state           Ggpio11          Lnormal          
F            n         
S         
a         f           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  3disabled             f  a      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
;         	  3disabled             f  b         pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     f  c   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                ;                     /                                f           pmic@3           2qcom,pmc8380 qcom,spmi-pmic                                                    f  d   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                 ;             
        /                                f           pmic@4           2qcom,pmc8380 qcom,spmi-pmic                                                    f  e   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                 ;             
        /                                f           pmic@5           2qcom,pmc8380 qcom,spmi-pmic                                                    f  f   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                 ;             
        /                                f     usb0-pwr-1p15-en-state          Ggpio8           Lnormal          
F            n         
S         
a         f              pmic@6           2qcom,pmc8380 qcom,spmi-pmic                                                    f  g   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                 ;             
        /                                f           pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     f  h   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               W             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                ;                     /                                f           pmic@9           2qcom,pm8550 qcom,spmi-pmic              	                                       f  i   temp-alarm@a00           2qcom,spmi-temp-alarm               
            	   
               W             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                ;                     /                                f     usb0-1p8-reg-en-state           Ggpio8           Lnormal          
F            n         
S         
a         f              pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                     f  j   temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               W             f              spmi@c432000                  C        @     M               
  cnfg intr           9periph_irq          U                                                                f  k   pmic@7           2qcom,smb2360 qcom,spmi-pmic                                                   3okay             f  l   phy@fd00             2qcom,smb2360-eusb2-repeater                                 
o           
|  !         f            pmic@a           2qcom,smb2360 qcom,spmi-pmic             
                                      3okay             f  m   phy@fd00             2qcom,smb2360-eusb2-repeater                                 
o           
|  "         f            pmic@b           2qcom,smb2360 qcom,spmi-pmic                                                   3okay             f  n   phy@fd00             2qcom,smb2360-eusb2-repeater                                 
o           
|  #         f            pmic@c           2qcom,smb2360 qcom,spmi-pmic                                                 	  3disabled             f  o   phy@fd00             2qcom,smb2360-eusb2-repeater                                  f  p               pinctrl@f100000          2qcom,x1e80100-tlmm                                                           /                               ;                      
           
   ,            f      qup-i2c0-data-clk-state         Ggpio0 gpio1       	  Lqup0_se0            U           
           f   y      qup-i2c1-data-clk-state         Ggpio4 gpio5       	  Lqup0_se1            U           
           f   |      qup-i2c2-data-clk-state         Ggpio8 gpio9       	  Lqup0_se2            U           
           f         qup-i2c3-data-clk-state         Ggpio12 gpio13         	  Lqup0_se3            U           
           f         qup-i2c4-data-clk-state         Ggpio16 gpio17         	  Lqup0_se4            U           
           f         qup-i2c5-data-clk-state         Ggpio20 gpio21         	  Lqup0_se5            U           
           f         qup-i2c6-data-clk-state         Ggpio24 gpio25         	  Lqup0_se6            U           
           f         qup-i2c7-data-clk-state         Ggpio14 gpio15         	  Lqup0_se7            U           
           f         qup-i2c8-data-clk-state         Ggpio32 gpio33         	  Lqup1_se0            U           
           f   _      qup-i2c9-data-clk-state         Ggpio36 gpio37         	  Lqup1_se1            U           
           f   b      qup-i2c10-data-clk-state            Ggpio40 gpio41         	  Lqup1_se2            U           
           f   e      qup-i2c11-data-clk-state            Ggpio44 gpio45         	  Lqup1_se3            U           
           f   h      qup-i2c12-data-clk-state            Ggpio48 gpio49         	  Lqup1_se4            U           
           f   k      qup-i2c13-data-clk-state            Ggpio52 gpio53         	  Lqup1_se5            U           
           f   n      qup-i2c14-data-clk-state            Ggpio56 gpio57         	  Lqup1_se6            U           
           f   q      qup-i2c15-data-clk-state            Ggpio54 gpio55         	  Lqup1_se7            U           
           f   u      qup-i2c16-data-clk-state            Ggpio64 gpio65         	  Lqup2_se0            U           
           f   B      qup-i2c17-data-clk-state            Ggpio68 gpio69         	  Lqup2_se1            U           
           f   F      qup-i2c18-data-clk-state            Ggpio72 gpio73         	  Lqup2_se2            U           
           f   I      qup-i2c19-data-clk-state            Ggpio76 gpio77         	  Lqup2_se3            U           
           f   M      qup-i2c20-data-clk-state            Ggpio80 gpio81         	  Lqup2_se4            U           
           f   P      qup-i2c21-data-clk-state            Ggpio84 gpio85         	  Lqup2_se5            U           
           f   S      qup-i2c22-data-clk-state            Ggpio88 gpio89         	  Lqup2_se6            U           
           f   W      qup-i2c23-data-clk-state            Ggpio86 gpio87         	  Lqup2_se7            U           
           f   Z      qup-spi0-cs-state           Ggpio3         	  Lqup0_se0            U            n         f   {      qup-spi0-data-clk-state         Ggpio0 gpio1 gpio2         	  Lqup0_se0            U            n         f   z      qup-spi1-cs-state           Ggpio7         	  Lqup0_se1            U            n         f         qup-spi1-data-clk-state         Ggpio4 gpio5 gpio6         	  Lqup0_se1            U            n         f         qup-spi2-cs-state           Ggpio11        	  Lqup0_se2            U            n         f         qup-spi2-data-clk-state         Ggpio8 gpio9 gpio10        	  Lqup0_se2            U            n         f         qup-spi3-cs-state           Ggpio15        	  Lqup0_se3            U            n         f         qup-spi3-data-clk-state         Ggpio12 gpio13 gpio14          	  Lqup0_se3            U            n         f         qup-spi4-cs-state           Ggpio19        	  Lqup0_se4            U            n         f         qup-spi4-data-clk-state         Ggpio16 gpio17 gpio18          	  Lqup0_se4            U            n         f         qup-spi5-cs-state           Ggpio23        	  Lqup0_se5            U            n         f         qup-spi5-data-clk-state         Ggpio20 gpio21 gpio22          	  Lqup0_se5            U            n         f         qup-spi6-cs-state           Ggpio27        	  Lqup0_se6            U            n         f         qup-spi6-data-clk-state         Ggpio24 gpio25 gpio26          	  Lqup0_se6            U            n         f         qup-spi7-cs-state           Ggpio13        	  Lqup0_se7            U            n         f         qup-spi7-data-clk-state         Ggpio14 gpio15 gpio12          	  Lqup0_se7            U            n         f         qup-spi8-cs-state           Ggpio35        	  Lqup1_se0            U            n         f   a      qup-spi8-data-clk-state         Ggpio32 gpio33 gpio34          	  Lqup1_se0            U            n         f   `      qup-spi9-cs-state           Ggpio39        	  Lqup1_se1            U            n         f   d      qup-spi9-data-clk-state         Ggpio36 gpio37 gpio38          	  Lqup1_se1            U            n         f   c      qup-spi10-cs-state          Ggpio43        	  Lqup1_se2            U            n         f   g      qup-spi10-data-clk-state            Ggpio40 gpio41 gpio42          	  Lqup1_se2            U            n         f   f      qup-spi11-cs-state          Ggpio47        	  Lqup1_se3            U            n         f   j      qup-spi11-data-clk-state            Ggpio44 gpio45 gpio46          	  Lqup1_se3            U            n         f   i      qup-spi12-cs-state          Ggpio51        	  Lqup1_se4            U            n         f   m      qup-spi12-data-clk-state            Ggpio48 gpio49 gpio50          	  Lqup1_se4            U            n         f   l      qup-spi13-cs-state          Ggpio55        	  Lqup1_se5            U            n         f   p      qup-spi13-data-clk-state            Ggpio52 gpio53 gpio54          	  Lqup1_se5            U            n         f   o      qup-spi14-cs-state          Ggpio59        	  Lqup1_se6            U            n         f   s      qup-spi14-data-clk-state            Ggpio56 gpio57 gpio58          	  Lqup1_se6            U            n         f   r      qup-spi15-cs-state          Ggpio53        	  Lqup1_se7            U            n         f   w      qup-spi15-data-clk-state            Ggpio54 gpio55 gpio52          	  Lqup1_se7            U            n         f   v      qup-spi16-cs-state          Ggpio67        	  Lqup2_se0            U            n         f   E      qup-spi16-data-clk-state            Ggpio64 gpio65 gpio66          	  Lqup2_se0            U            n         f   D      qup-spi17-cs-state          Ggpio71        	  Lqup2_se1            U            n         f   H      qup-spi17-data-clk-state            Ggpio68 gpio69 gpio70          	  Lqup2_se1            U            n         f   G      qup-spi18-cs-state          Ggpio75        	  Lqup2_se2            U            n         f   L      qup-spi18-data-clk-state            Ggpio72 gpio73 gpio74          	  Lqup2_se2            U            n         f   K      qup-spi19-cs-state          Ggpio79        	  Lqup2_se3            U            n         f   O      qup-spi19-data-clk-state            Ggpio76 gpio77 gpio78          	  Lqup2_se3            U            n         f   N      qup-spi20-cs-state          Ggpio83        	  Lqup2_se4            U            n         f   R      qup-spi20-data-clk-state            Ggpio80 gpio81 gpio82          	  Lqup2_se4            U            n         f   Q      qup-spi21-cs-state          Ggpio87        	  Lqup2_se5            U            n         f   U      qup-spi21-data-clk-state            Ggpio84 gpio85 gpio86          	  Lqup2_se5            U            n         f   T      qup-spi22-cs-state          Ggpio91        	  Lqup2_se6            U            n         f   Y      qup-spi22-data-clk-state            Ggpio88 gpio89 gpio90          	  Lqup2_se6            U            n         f   X      qup-spi23-cs-state          Ggpio85        	  Lqup2_se7            U            n         f   \      qup-spi23-data-clk-state            Ggpio86 gpio87 gpio84          	  Lqup2_se7            U            n         f   [      qup-uart2-default-state          f      cts-pins            Ggpio8         	  Lqup0_se2            U            n      rts-pins            Ggpio9         	  Lqup0_se2            U            n      tx-pins         Ggpio10        	  Lqup0_se2            U            n      rx-pins         Ggpio11        	  Lqup0_se2            U            n         qup-uart14-default-state             f   t   cts-pins            Ggpio56        	  Lqup1_se6             {      rts-pins            Ggpio57        	  Lqup1_se6            U            n      tx-pins         Ggpio58        	  Lqup1_se6            U            n      rx-pins         Ggpio59        	  Lqup1_se6             
         qup-uart21-default-state             f   V   tx-pins         Ggpio86        	  Lqup2_se5            U            n      rx-pins         Ggpio87        	  Lqup2_se5            U            n         sdc2-default-state           f      clk-pins          	  Gsdc2_clk            U            n      cmd-pins          	  Gsdc2_cmd            U   
         
      data-pins         
  Gsdc2_data           U   
         
         sdc2-sleep-state             f      clk-pins          	  Gsdc2_clk            U            n      cmd-pins          	  Gsdc2_cmd            U            
      data-pins         
  Gsdc2_data           U            
         eusb3-reset-n-state         Ggpio6           Lgpio            U            n         
         f         eusb6-reset-n-state         Ggpio184         Lgpio            U            n         
         f         nvme-reg-en-state           Ggpio18          Lgpio            U            n         f        pcie4-default-state          f      clkreq-n-pins           Ggpio147       
  Lpcie4_clk           U            
      perst-n-pins            Ggpio146         Lgpio            U            n      wake-n-pins         Ggpio148         Lgpio            U            
         pcie5-default-state          f      clkreq-n-pins           Ggpio150       
  Lpcie5_clk           U            
      perst-n-pins            Ggpio149         Lgpio            U            n      wake-n-pins         Ggpio151         Lgpio            U            
         pcie6a-default-state             f      clkreq-n-pins           Ggpio153         Lpcie6a_clk          U            
      perst-n-pins            Ggpio152         Lgpio            U            n      wake-n-pins         Ggpio154         Lgpio            U            
         rtmr1-reset-n-active-state          Ggpio176         Lgpio            U            n         f         rtmr2-reset-n-active-state          Ggpio185         Lgpio            U            n         f         rtmr1-1p15-reg-en-state         Ggpio188         Lgpio            U            n         f        rtmr1-1p8-reg-en-state          Ggpio175         Lgpio            U            n         f        rtmr1-3p3-reg-en-state          Ggpio186         Lgpio            U            n         f        rtmr2-1p15-reg-en-state         Ggpio189         Lgpio            U            n         f        rtmr2-1p8-reg-en-state          Ggpio126         Lgpio            U            n         f        rtmr2-3p3-reg-en-state          Ggpio187         Lgpio            U            n         f        sdc2-card-det-state         Ggpio71          Lgpio            U            
         f         wcd-reset-n-active-state            Ggpio191         Lgpio            U            n         
         f        wwan-sw-en-state            Ggpio221         Lgpio            U            n         f           stm@10002000              2arm,coresight-stm arm,primecell                             (                 stm-base stm-stimulus-base           n         	  :apb_pclk       out-ports      port       endpoint            n  $         f  +               tpdm@10003000         "   2qcom,coresight-tpdm arm,primecell                 0                 n         	  :apb_pclk            
            
          	  3disabled       out-ports      port       endpoint            n  %         f  &               tpda@10004000         "   2qcom,coresight-tpda arm,primecell                 @                 n         	  :apb_pclk       in-ports                                 port@0                  endpoint            n  &         f  %         port@1                 endpoint            n  '         f  )            out-ports      port       endpoint            n  (         f  *               tpdm@1000f000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  )         f  '               funnel@10041000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  :apb_pclk       in-ports                                 port@6                 endpoint            n  *         f  (         port@7                 endpoint            n  +         f  $            out-ports      port       endpoint            n  ,         f  1               funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell                                 n         	  :apb_pclk       in-ports                                 port@2                 endpoint            n  -         f  w         port@5                 endpoint            n  .         f  A         port@6                 endpoint            n  /         f  i            out-ports      port       endpoint            n  0         f  2               funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  :apb_pclk       in-ports                                 port@0                  endpoint            n  1         f  ,         port@1                 endpoint            n  2         f  0            out-ports      port       endpoint            n  3         f  D               tpdm@10800000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  4         f  m               tpdm@1082c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
                   out-ports      port       endpoint            n  5         f  b               tpdm@10841000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  6         f  `               tpdm@10844000         "   2qcom,coresight-tpdm arm,primecell                @                 n         	  :apb_pclk            
                   out-ports      port       endpoint            n  7         f  8               funnel@10846000       +   2arm,coresight-dynamic-funnel arm,primecell               `                 n         	  :apb_pclk       in-ports       port       endpoint            n  8         f  7            out-ports      port       endpoint            n  9         f  _               cti@1098b000              2arm,coresight-cti arm,primecell                               n         	  :apb_pclk          tpdm@109d0000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  :apb_pclk            
                      	  3disabled       out-ports      port       endpoint            n  :         f  a               tpdm@10ac0000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  :apb_pclk            
                      	  3disabled       out-ports      port       endpoint            n  ;         f  =               tpdm@10ac1000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  <         f  >               tpda@10ac4000         "   2qcom,coresight-tpda arm,primecell                @                 n         	  :apb_pclk       in-ports                                 port@8                 endpoint            n  =         f  ;         port@9              	   endpoint            n  >         f  <            out-ports      port       endpoint            n  ?         f  @               funnel@10ac5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  :apb_pclk       in-ports       port       endpoint            n  @         f  ?            out-ports      port       endpoint            n  A         f  .               funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  :apb_pclk       in-ports                                 port@3                 endpoint            n  B         f  Y         port@6                 endpoint            n  C         f  O         port@7                 endpoint            n  D         f  3            out-ports      port       endpoint            n  E         f  F               tmc@10b05000              2arm,coresight-tmc arm,primecell              P                 n         	  :apb_pclk             f  q   in-ports       port       endpoint            n  F         f  E            out-ports      port       endpoint            n  G         f  H               replicator@10b06000       /   2arm,coresight-dynamic-replicator arm,primecell               `                 n         	  :apb_pclk       in-ports       port       endpoint            n  H         f  G            out-ports      port       endpoint            n  I         f                   tpda@10b08000         "   2qcom,coresight-tpda arm,primecell                                 n         	  :apb_pclk       in-ports                                 port@0                  endpoint            n  J         f  P         port@1                 endpoint            n  K         f  Q         port@2                 endpoint            n  L         f  R         port@3                 endpoint            n  M         f  S         port@4                 endpoint            n  N         f  T            out-ports      port       endpoint            n  O         f  C               tpdm@10b09000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  P         f  J               tpdm@10b0a000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  Q         f  K               tpdm@10b0b000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  R         f  L               tpdm@10b0c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  S         f  M               tpdm@10b0d000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
                   out-ports      port       endpoint            n  T         f  N               tpdm@10b20000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  :apb_pclk            
                      	  3disabled       out-ports      port       endpoint            n  U         f  V               tpda@10b23000         "   2qcom,coresight-tpda arm,primecell                0                 n         	  :apb_pclk          	  3disabled       in-ports       port       endpoint            n  V         f  U            out-ports      port       endpoint            n  W         f  X               funnel@10b24000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  :apb_pclk          	  3disabled       in-ports       port       endpoint            n  X         f  W            out-ports      port       endpoint            n  Y         f  B               tpdm@10c08000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
                   out-ports      port       endpoint            n  Z         f  [               funnel@10c0b000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  :apb_pclk       in-ports                                 port@4                 endpoint            n  [         f  Z            out-ports      port       endpoint            n  \         f  l               tpdm@10c28000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
                   out-ports      port       endpoint            n  ]         f  c               tpdm@10c29000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  ^         f  d               tpda@10c2b000         "   2qcom,coresight-tpda arm,primecell                °                 n         	  :apb_pclk       in-ports                                 port@4                 endpoint            n  _         f  9         port@13                endpoint            n  `         f  6         port@14                endpoint            n  a         f  :         port@15                endpoint            n  b         f  5         port@1a                endpoint            n  c         f  ]         port@1b                endpoint            n  d         f  ^            out-ports      port       endpoint            n  e         f  f               funnel@10c2c000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  :apb_pclk       in-ports                                 port@0                  endpoint            n  f         f  e         port@4                 endpoint            n  g         f  r         port@5                 endpoint            n  h         f  y            out-ports      port       endpoint            n  i         f  /               tpdm@10c38000         "   2qcom,coresight-tpdm arm,primecell                À                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  j         f  n               tpdm@10c39000         "   2qcom,coresight-tpdm arm,primecell                Ð                 n         	  :apb_pclk            
   @        
       out-ports      port       endpoint            n  k         f  o               tpda@10c3c000         "   2qcom,coresight-tpda arm,primecell                                 n         	  :apb_pclk       in-ports                                 port@4                 endpoint            n  l         f  \         port@f                 endpoint            n  m         f  4         port@10                endpoint            n  n         f  j         port@11                endpoint            n  o         f  k            out-ports      port       endpoint            n  p         f  q               funnel@10c3d000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  :apb_pclk       in-ports       port       endpoint            n  q         f  p            out-ports      port       endpoint            n  r         f  g               tpdm@10cc1000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
   @        
            
                      	  3disabled       out-ports      port       endpoint            n  s         f  t               tpda@10cc4000         "   2qcom,coresight-tpda arm,primecell                @                 n         	  :apb_pclk       in-ports                                 port@2                 endpoint            n  t         f  s            out-ports      port       endpoint            n  u         f  v               funnel@10cc5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  :apb_pclk       in-ports       port       endpoint            n  v         f  u            out-ports      port       endpoint            n  w         f  -               funnel@10d04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  :apb_pclk       in-ports                                 port@6                 endpoint            n  x         f              out-ports      port       endpoint            n  y         f  h               tpdm@10d08000         "   2qcom,coresight-tpdm arm,primecell                Ѐ                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  z         f                 tpdm@10d09000         "   2qcom,coresight-tpdm arm,primecell                А                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  {         f                 tpdm@10d0a000         "   2qcom,coresight-tpdm arm,primecell                Р                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  |         f                 tpdm@10d0b000         "   2qcom,coresight-tpdm arm,primecell                а                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  }         f                 tpdm@10d0c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n  ~         f                 tpdm@10d0d000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n           f                 tpdm@10d0e000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n           f                 tpdm@10d0f000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  :apb_pclk            
            
       out-ports      port       endpoint            n           f                 tpda@10d12000         "   2qcom,coresight-tpda arm,primecell                                  n         	  :apb_pclk       in-ports                                 port@0                  endpoint            n           f  z         port@1                 endpoint            n           f  {         port@2                 endpoint            n           f  |         port@3                 endpoint            n           f  }         port@4                 endpoint            n           f  ~         port@5                 endpoint            n           f           port@6                 endpoint            n           f           port@7                 endpoint            n           f              out-ports      port       endpoint            n           f                 funnel@10d13000       +   2arm,coresight-dynamic-funnel arm,primecell               0                 n         	  :apb_pclk       in-ports       port       endpoint            n           f              out-ports      port       endpoint            n           f  x               iommu@15000000        1   2qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                  -           :                     f   <      iommu@15400000           2arm,smmu-v3              @                 -         $                                        9eventq gerror cmdq-sync                  3okay ved         f  r      interrupt-controller@17000000            2arm,gic-v3                                     0                	                                          *                                         
         f      msi-controller@17040000          2arm,gic-v3-its                                 ?        N            f            mailbox@17430000             2qcom,x1e80100-cpucp-mbox                  C                                                            f   $      rsc@17500000             2qcom,rpmh-rsc         0       P             Q             R                 drv-0 drv-1 drv-2         $                                        Y           i            u                                	  tapps_rsc                -         f  s   bcm-voter            2qcom,bcm-voter           f   '      clock-controller             2qcom,x1e80100-rpmh-clk           n          :xo           Y            f         power-controller             2qcom,x1e80100-rpmhpd                                  f   ;   opp-table            2operating-points-v2          f     opp-16                      f  t      opp-48             0         f         opp-52             4         f  u      opp-56             8         f  v      opp-60             <         f  w      opp-64             @         f   /      opp-80             P         f  x      opp-128                     f   0      opp-144                     f  y      opp-192                     f         opp-256                     f         opp-320           @         f  
      opp-336           P         f  z      opp-384                    f  {      opp-416                    f  |            regulators-0             2qcom,pm8550-rpmh-regulators         b                                                                                                       /     bob1          
  >vreg_bob1           M -         e <l        }            f        bob2          
  >vreg_bob2           M &5@        e -         }            f        ldo1            >vreg_l1b_1p8            M w@        e w@        }            f  }      ldo2            >vreg_l2b_3p0            M .         e /M`        }            f  !      ldo4            >vreg_l4b_1p8            M w@        e w@        }            f         ldo5            >vreg_l5b_3p0            M -        e -        }            f  ~      ldo6            >vreg_l6b_1p8            M w@        e -*        }            f         ldo7            >vreg_l7b_2p8            M *        e *        }            f        ldo8            >vreg_l8b_3p0            M .         e .         }            f  #      ldo9            >vreg_l9b_2p9            M -*        e -*        }            f         ldo10           >vreg_l10b_1p8           M w@        e w@        }            f        ldo12           >vreg_l12b_1p2           M O        e O        }                     f        ldo13           >vreg_l13b_3p0           M .         e /M`        }            f         ldo14           >vreg_l14b_3p0           M .         e .         }            f  "      ldo15           >vreg_l15b_1p8           M w@        e w@        }                     f        ldo16           >vreg_l16b_2p9           M ,o         e ,o         }            f        ldo17           >vreg_l17b_2p5           M &5@        e &5@        }            f           regulators-1             2qcom,pm8550ve-rpmh-regulators           c                                              smps4           >vreg_s4c_1p8            M R         e         }            f        ldo1            >vreg_l1c_1p2            M O        e O        }            f        ldo2            >vreg_l2c_0p8            M m        e 	        }            f        ldo3            >vreg_l3c_0p8            M m        e 	        }            f            regulators-2             2qcom,pmc8380-rpmh-regulators            d                                              ldo1            >vreg_l1d_0p8            M m        e 	        }            f         ldo2            >vreg_l2d_0p9            M         e 	        }            f         ldo3            >vreg_l3d_1p8            M w@        e w@        }            f            regulators-3             2qcom,pmc8380-rpmh-regulators            e                          ldo2            >vreg_l2e_0p8            M m        e 	        }            f         ldo3            >vreg_l3e_1p2            M O        e O        }            f            regulators-4             2qcom,pmc8380-rpmh-regulators            f                                              smps1           >vreg_s1f_0p7            M 
`        e         }            f        ldo1            >vreg_l1f_1p0            M          e          }            f        ldo2            >vreg_l2f_1p0            M          e          }            f        ldo3            >vreg_l3f_1p0            M          e          }            f           regulators-6             2qcom,pm8550ve-rpmh-regulators           i                                                        smps1           >vreg_s1i_0p9            M         e 	        }            f        smps2           >vreg_s2i_1p0            M B@        e         }            f        ldo1            >vreg_l1i_1p8            M w@        e w@        }            f        ldo2            >vreg_l2i_1p2            M O        e O        }            f        ldo3            >vreg_l3i_0p8            M m        e 	        }            f            regulators-7             2qcom,pm8550ve-rpmh-regulators           j                                              smps5           >vreg_s5j_1p2            M *@        e         }            f        ldo1            >vreg_l1j_0p8            M m        e 	        }            f         ldo2            >vreg_l2j_1p2            M *@        e *@        }            f         ldo3            >vreg_l3j_0p8            M m        e 	        }            f               timer@17800000           2arm,armv7-timer-mem                                                        
                       frame@17801000                                                                
          frame@17803000               0                   	           
         	  3disabled          frame@17805000               P                   
           
         	  3disabled          frame@17807000               p                              
         	  3disabled          frame@17809000                                             
         	  3disabled          frame@1780b000                                             
         	  3disabled          frame@1780d000                                             
         	  3disabled             sram@18b4e000         
   2mmio-sram                                                         
                     f     scp-sram-section@0           2arm,scmi-shmem                           f   %      scp-sram-section@200             2arm,scmi-shmem                          f   &         watchdog@1c840000         	  3disabled gwd         2arm,sbsa-gwdt                                                                   f        pmu@24091000          0   2qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           ~   "          "                   opp-table            2operating-points-v2          f     opp-0           ` 5       opp-1           ` !b      opp-2           ` .       opp-3           ` ^       opp-4           ` hL       opp-5           `        opp-6           `        opp-7           `        opp-8           `         opp-9           `             pmu@240b3400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $4                      E           ~   ?         ?                         f        pmu@240b5400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           ~   ?         ?                         f     opp-table            2operating-points-v2          f     opp-0           ` I>       opp-1           ` q@      opp-2           ` |       opp-3           `        opp-4           ` Ȁ      opp-5           ``@            pmu@240b6400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           ~   ?         ?                      system-cache-controller@25000000             2qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          2qcom,x1e80100-cdsp-pas               20               @  U         B                                          #  9wdog fatal ready handover stop-ack           n               :xo              ;       ;   
   ;            cx mxc nsp          ~            "                          $           M              ^stop            3okay          _  qcom/x1e80100/Thundercomm/DEVKIT/qccdsp8380.mbn qcom/x1e80100/Thundercomm/DEVKIT/cdsp_dtbs.elf           f     glink-edge          U   1                     1               tcdsp                  fastrpc          2qcom,fastrpc            zfastrpcglink-apps-dsp           tcdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@2             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@3             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@4             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@5             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@6             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@7             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@8             2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@10            2qcom,fastrpc-compute-cb             
        ,   <                     compute-cb@11            2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@12            2qcom,fastrpc-compute-cb                     ,   <                     compute-cb@13            2qcom,fastrpc-compute-cb                     ,   <                                 timer            2arm,armv8-timer       0                                   
         thermal-zones            f     aoss0-thermal                    trips      trip-point0         ' _        3           hot       aoss0-critical          ' 8        3        	   critical                cpu0-0-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-0-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-1-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-1-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-2-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-2-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-3-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu0-3-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpuss0-top-thermal               	   trips      cpuss2-critical         ' 8        3        	   critical                cpuss0-btm-thermal               
   trips      cpuss2-critical         ' 8        3        	   critical                mem-thermal                 trips      trip-point0         ' _        3           hot       mem-critical            ' 8        3          	   critical                video-thermal                   trips      trip-point0         ' _        3           hot       video-critical          ' 8        3        	   critical                aoss1-thermal                    trips      trip-point0         ' _        3           hot       aoss0-critical          ' 8        3        	   critical                cpu1-0-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-0-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-1-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-1-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-2-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-2-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-3-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu1-3-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpuss1-top-thermal               	   trips      cpuss2-critical         ' 8        3        	   critical                cpuss1-btm-thermal               
   trips      cpuss2-critical         ' 8        3        	   critical                aoss2-thermal                    trips      trip-point0         ' _        3           hot       aoss0-critical          ' 8        3        	   critical                cpu2-0-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-0-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-1-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-1-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-2-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-2-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-3-top-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpu2-3-btm-thermal                  trips      cpu-critical            ' 8        3        	   critical                cpuss2-top-thermal               	   trips      cpuss2-critical         ' 8        3        	   critical                cpuss2-btm-thermal               
   trips      cpuss2-critical         ' 8        3        	   critical                aoss3-thermal                    trips      trip-point0         ' _        3           hot       aoss0-critical          ' 8        3        	   critical                nsp0-thermal                    trips      trip-point0         ' _        3           hot       nsp0-critical           ' 8        3        	   critical                nsp1-thermal                    trips      trip-point0         ' _        3           hot       nsp1-critical           ' 8        3        	   critical                nsp2-thermal                    trips      trip-point0         ' _        3           hot       nsp2-critical           ' 8        3        	   critical                nsp3-thermal                    trips      trip-point0         ' _        3           hot       nsp3-critical           ' 8        3        	   critical                gpuss-0-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-1-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-2-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-3-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-4-thermal         >                	   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-5-thermal         >                
   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-6-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                gpuss-7-thermal         >                   cooling-maps       map0            T          Y           trips      trip-point0         ' s        3           passive          f        gpu-critical            ' 8        3        	   critical                camera0-thermal                 trips      trip-point0         ' _        3           hot       camera0-critical            ' 8        3        	   critical                camera1-thermal                 trips      trip-point0         ' _        3           hot       camera0-critical            ' 8        3        	   critical                pm8550-thermal          >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pm8550ve-2-thermal          >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pmc8380-3-thermal           >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pmc8380-4-thermal           >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pmc8380-5-thermal           >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pmc8380-6-thermal           >   d                   f     trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pm8550ve-8-thermal          >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pm8550ve-9-thermal          >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot             pm8010-thermal          >   d             trips      trip0           ' s        3             passive       trip1           ' 8        3             hot                aliases       $  h/soc@0/geniqup@8c0000/serial@894000       audio-codec          2qcom,wcd9385-codec          rdefault         h          p w@         w@         w@         w@          $ I                              P        G          V                           e          u                                          f        pmic-glink        @   2qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                 $        y          {          }       connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint            n           f            port@1                 endpoint            n           f            port@2                 endpoint            n           f                  connector@1          2usb-c-connector                     dual            host       ports                                port@0                  endpoint            n           f            port@1                 endpoint            n           f            port@2                 endpoint            n           f                  connector@2          2usb-c-connector                     dual            host       ports                                port@0                  endpoint            n           f            port@1                 endpoint            n           f            port@2                 endpoint            n           f                     sound            2qcom,x1e80100-sndcard            ,X1E001DE-DEVKIT       N  IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 TX SWR_INPUT1 ADC2_OUTPUT      wcd-playback-dai-link           WCD Playback       cpu              q      codec                                    platform                       wcd-capture-dai-link            WCD Capture    cpu              x      codec                                  platform                          regulator-nvme           2regulator-fixed         >VREG_NVME_3P3           M 2Z        e 2Z                                   rdefault         h                    f         regulator-rtmr0-1p15             2regulator-fixed         >VREG_RTMR0_1P15         M 0        e 0                                  h          rdefault                   f         regulator-rtmr0-1p8          2regulator-fixed         >VREG_RTMR0_1P8          M w@        e w@                                  h          rdefault                   f         regulator-rtmr0-3p3          2regulator-fixed         >VREG_RTMR0_3P3          M 2Z        e 2Z                                   h          rdefault                   f         regulator-rtmr1-1p15             2regulator-fixed         >VREG_RTMR1_1P15         M 0        e 0                                   h          rdefault                   f         regulator-rtmr1-1p8          2regulator-fixed         >VREG_RTMR1_1P8          M w@        e w@                                   h          rdefault                   f         regulator-rtmr1-3p3          2regulator-fixed         >VREG_RTMR1_3P3          M 2Z        e 2Z                                   h          rdefault                   f         regulator-rtmr2-1p15             2regulator-fixed         >VREG_RTMR2_1P15         M 0        e 0                                   h          rdefault                   f   }      regulator-rtmr2-1p8          2regulator-fixed         >VREG_RTMR2_1P8          M w@        e w@              ~                     h          rdefault                   f         regulator-rtmr2-3p3          2regulator-fixed         >VREG_RTMR2_3P3          M 2Z        e 2Z                                   h          rdefault                   f   ~      regulator-vph-pwr            2regulator-fixed         >vph_pwr         M 8u         e 8u                            f        regulator-wwan           2regulator-fixed         >SDX_VPH_PWR         M 2Z        e 2Z                                   h          rdefault                   f         __symbols__         /clocks/xo-board            #/clocks/sleep-clk           -/clocks/bi-tcxo-div2-clk            :/clocks/bi-tcxo-ao-div2-clk         J/cpus/cpu@0         O/cpus/cpu@0/l2-cache            T/cpus/cpu@100           Y/cpus/cpu@200           ^/cpus/cpu@300           c/cpus/cpu@10000         h/cpus/cpu@10000/l2-cache            m/cpus/cpu@10100         r/cpus/cpu@10200         w/cpus/cpu@10300         |/cpus/cpu@20000         /cpus/cpu@20000/l2-cache            /cpus/cpu@20100         /cpus/cpu@20200         /cpus/cpu@20300         /cpus/cpu-map/cluster2          /cpus/idle-states/cpu-sleep-0         )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1          #  /dummy-sink/in-ports/port/endpoint          /firmware/scm           /firmware/scmi/protocol@13          /interconnect-0         /interconnect-1         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         	/psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         !/psci/power-domain-cpu6         )/psci/power-domain-cpu7         1/psci/power-domain-cpu8         9/psci/power-domain-cpu9         A/psci/power-domain-cpu10            J/psci/power-domain-cpu11             S/psci/power-domain-cpu-cluster0          _/psci/power-domain-cpu-cluster1          k/psci/power-domain-cpu-cluster2         w/psci/power-domain-system         %  /reserved-memory/gunyah-hyp@80000000          *  /reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          /reserved-memory/cpucp@80e40000       &  /reserved-memory/tags-region@81400000         $  /reserved-memory/xbl-dtlog@81a00000       &  /reserved-memory/xbl-ramdump@81a40000         $  /reserved-memory/aop-image@81c00000       %  /reserved-memory/aop-cmd-db@81c60000          %  /reserved-memory/aop-config@81c80000          )  /reserved-memory/tme-crash-dump@81ca0000          "  */reserved-memory/tme-log@81ce0000         #  6/reserved-memory/uefi-log@81ce4000        '  C/reserved-memory/secdata-apss@81cff000        (  T/reserved-memory/pdp-ns-shared@81e00000       "  f/reserved-memory/gpu-prr@81f00000         &  r/reserved-memory/tpm-control@81f10000         *  /reserved-memory/usb-ucsi-shared@81f20000         "  /reserved-memory/pld-pep@81f30000         "  /reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  /reserved-memory/tz-stat@82700000         )  /reserved-memory/xbl-tmp-buffer@82800000          /  /reserved-memory/adsp-rpc-remote-heap@84b00000        3  /reserved-memory/spu-secure-shared-memory@85300000        (  /reserved-memory/adsp-boot-dtb@866c0000       &  !/reserved-memory/spss-region@86700000         $  1/reserved-memory/adsp-boot@86b00000          ?/reserved-memory/video@87700000       #  I/reserved-memory/adspslpi@87e00000        &  V/reserved-memory/q6-adsp-dtb@8b800000           f/reserved-memory/cdsp@8b900000        &  o/reserved-memory/q6-cdsp-dtb@8d900000         (  /reserved-memory/gpu-microcode@8d9fe000         /reserved-memory/cvp@8da00000         !  /reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  /reserved-memory/q6-wpss-dtb@91300000         !  /reserved-memory/xbl-sc@d8000000            /reserved-memory/qtee@d80e0000          /reserved-memory/ta@d8600000            /reserved-memory/tags@e1000000        #  /reserved-memory/llcc-lpi@ff800000          /reserved-memory/smem@ffe00000          /opp-table-qup100mhz            /opp-table-qup120mhz            2/smp2p-adsp/master-kernel           A/smp2p-adsp/slave-kernel            O/smp2p-cdsp/master-kernel           ^/smp2p-cdsp/slave-kernel            l/soc@0          p/soc@0/clock-controller@100000          t/soc@0/mailbox@408000           y/soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@894000       !  /soc@0/geniqup@8c0000/i2c@898000          !  /soc@0/geniqup@8c0000/spi@898000          !  /soc@0/geniqup@8c0000/i2c@89c000          !  /soc@0/geniqup@8c0000/spi@89c000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  "/soc@0/geniqup@ac0000/i2c@a8c000          !  (/soc@0/geniqup@ac0000/spi@a8c000          !  ./soc@0/geniqup@ac0000/i2c@a90000          !  4/soc@0/geniqup@ac0000/spi@a90000          !  :/soc@0/geniqup@ac0000/i2c@a94000          !  @/soc@0/geniqup@ac0000/spi@a94000          !  F/soc@0/geniqup@ac0000/i2c@a98000          !  L/soc@0/geniqup@ac0000/spi@a98000          $  R/soc@0/geniqup@ac0000/serial@a98000       !  Y/soc@0/geniqup@ac0000/i2c@a9c000          !  _/soc@0/geniqup@ac0000/spi@a9c000            e/soc@0/dma-controller@b00000            n/soc@0/geniqup@bc0000         !  v/soc@0/geniqup@bc0000/i2c@b80000          !  {/soc@0/geniqup@bc0000/spi@b80000          !  /soc@0/geniqup@bc0000/i2c@b84000          C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b84000          !  /soc@0/geniqup@bc0000/i2c@b88000          $  /soc@0/geniqup@bc0000/serial@b88000       !  /soc@0/geniqup@bc0000/spi@b88000          !  /soc@0/geniqup@bc0000/i2c@b8c000          C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  #/soc@0/geniqup@bc0000/spi@b90000          !  (/soc@0/geniqup@bc0000/i2c@b94000          -  -/soc@0/geniqup@bc0000/i2c@b94000/redriver@47          -  </soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  K/soc@0/geniqup@bc0000/spi@b94000          !  P/soc@0/geniqup@bc0000/i2c@b98000          !  U/soc@0/geniqup@bc0000/spi@b98000          !  Z/soc@0/geniqup@bc0000/i2c@b9c000          C  _/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  r/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b9c000            /soc@0/thermal-sensor@c271000           /soc@0/thermal-sensor@c272000           /soc@0/thermal-sensor@c273000           /soc@0/thermal-sensor@c274000           /soc@0/phy@fd3000           /soc@0/phy@fd5000         (  /soc@0/phy@fd5000/ports/port@0/endpoint       (  /soc@0/phy@fd5000/ports/port@1/endpoint       (  /soc@0/phy@fd5000/ports/port@2/endpoint         %/soc@0/phy@fd9000           5/soc@0/phy@fda000         (  F/soc@0/phy@fda000/ports/port@0/endpoint       (  [/soc@0/phy@fda000/ports/port@1/endpoint       (  v/soc@0/phy@fda000/ports/port@2/endpoint         /soc@0/phy@fde000           /soc@0/phy@fdf000         (  /soc@0/phy@fdf000/ports/port@0/endpoint       (  /soc@0/phy@fdf000/ports/port@1/endpoint       (  /soc@0/phy@fdf000/ports/port@2/endpoint         /soc@0/interconnect@1500000         /soc@0/interconnect@1600000         
/soc@0/interconnect@1680000         /soc@0/interconnect@16c0000         %/soc@0/interconnect@16d0000         6/soc@0/interconnect@16e0000         A/soc@0/interconnect@1700000         L/soc@0/interconnect@1740000         \/soc@0/interconnect@1750000         l/soc@0/interconnect@1760000         {/soc@0/interconnect@1770000         /soc@0/interconnect@1780000         /soc@0/pcie@1bd0000         /soc@0/pcie@1bd0000/opp-table           /soc@0/phy@1be0000          /soc@0/pci@1bf8000          /soc@0/phy@1bfc000          /soc@0/pci@1c00000          /soc@0/phy@1c06000          /soc@0/pci@1c08000          /soc@0/pci@1c08000/pcie@0           /soc@0/phy@1c0e000          /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          "/soc@0/gmu@3d6a000/opp-table             0/soc@0/clock-controller@3d90000         6/soc@0/iommu@3da0000            B/soc@0/interconnect@26400000            J/soc@0/interconnect@320c0000            R/soc@0/remoteproc@6800000         3  b/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  h/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  s/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  |/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         /soc@0/codec@6aa0000            /soc@0/soundwire@6ab0000            /soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000             /soc@0/clock-controller@6b6c000         /soc@0/soundwire@6d30000          #  /soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  */soc@0/pinctrl@6e80000/dmic01-default-state       ,  9/soc@0/pinctrl@6e80000/dmic23-default-state       ,  H/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  W/soc@0/pinctrl@6e80000/wsa2-swr-active-state             g/soc@0/clock-controller@6ea0000         o/soc@0/interconnect@7e40000         |/soc@0/interconnect@7400000         /soc@0/interconnect@7430000         /soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table            /soc@0/mmc@8844000          /soc@0/mmc@8844000/opp-table            /soc@0/phy@88e0000          /soc@0/phy@88e1000          /soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          /soc@0/usb@a0f8800          /soc@0/usb@a0f8800/usb@a000000        5  */soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  </soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            N/soc@0/usb@a2f8800          T/soc@0/usb@a2f8800/usb@a200000        5  _/soc@0/usb@a2f8800/usb@a200000/ports/port@0/endpoint            m/soc@0/usb@a4f8800          t/soc@0/usb@a4f8800/usb@a400000          /soc@0/usb@a6f8800          /soc@0/usb@a6f8800/usb@a600000        5  /soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  /soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            /soc@0/usb@a8f8800          /soc@0/usb@a8f8800/usb@a800000        5  /soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  /soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint          !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  &/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  5/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  D/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  R/soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  [/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  g/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  t/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table           /soc@0/phy@aec2a00          &/soc@0/phy@aec5a00           3/soc@0/clock-controller@af00000       $  :/soc@0/interrupt-controller@b220000          >/soc@0/power-management@c300000         G/soc@0/arbiter@c400000        $  L/soc@0/arbiter@c400000/spmi@c42d000       +  V/soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  ^/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  j/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  u/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  )/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  ?/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  P/soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  Z/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  o/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-en-state       +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@6        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :  (/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5  >/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          +  O/soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :  Z/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5  p/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K  /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;  /soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $  /soc@0/arbiter@c400000/spmi@c432000       +  /soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  /soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +  /soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  /soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +  /soc@0/arbiter@c400000/spmi@c432000/pmic@b        4  /soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +  /soc@0/arbiter@c400000/spmi@c432000/pmic@c        4  '/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         	/soc@0/pinctrl@f100000        /  @/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  R/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  d/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  v/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  /soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0   -/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0   @/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0   S/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0   f/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0   y/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )   /soc@0/pinctrl@f100000/qup-spi0-cs-state          /  !
/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  !(/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  !:/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  !F/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  !X/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  !d/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  !v/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  "*/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  "7/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  "J/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  "W/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  "j/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  "w/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  "/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  "/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  "/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  "/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  "/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  "/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  "/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  "/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  #
/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  #*/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  #7/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  #J/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  #W/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  #j/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  #w/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  #/soc@0/pinctrl@f100000/qup-uart2-default-state        0  #/soc@0/pinctrl@f100000/qup-uart14-default-state       0  $/soc@0/pinctrl@f100000/qup-uart21-default-state       *  $"/soc@0/pinctrl@f100000/sdc2-default-state         (  $//soc@0/pinctrl@f100000/sdc2-sleep-state       +  $:/soc@0/pinctrl@f100000/eusb3-reset-n-state        +  $H/soc@0/pinctrl@f100000/eusb6-reset-n-state        )  $V/soc@0/pinctrl@f100000/nvme-reg-en-state          +  $b/soc@0/pinctrl@f100000/pcie4-default-state        +  $p/soc@0/pinctrl@f100000/pcie5-default-state        ,  $~/soc@0/pinctrl@f100000/pcie6a-default-state       2  $/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state         2  $/soc@0/pinctrl@f100000/rtmr2-reset-n-active-state         /  $/soc@0/pinctrl@f100000/rtmr1-1p15-reg-en-state        .  $/soc@0/pinctrl@f100000/rtmr1-1p8-reg-en-state         .  $/soc@0/pinctrl@f100000/rtmr1-3p3-reg-en-state         /  $/soc@0/pinctrl@f100000/rtmr2-1p15-reg-en-state        .  $/soc@0/pinctrl@f100000/rtmr2-1p8-reg-en-state         .  % /soc@0/pinctrl@f100000/rtmr2-3p3-reg-en-state         +  %/soc@0/pinctrl@f100000/sdc2-card-det-state        0  %!/soc@0/pinctrl@f100000/wcd-reset-n-active-state       (  %-/soc@0/pinctrl@f100000/wwan-sw-en-state       ,  %8/soc@0/stm@10002000/out-ports/port/endpoint       -  %@/soc@0/tpdm@10003000/out-ports/port/endpoint          .  %M/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  %[/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  %i/soc@0/tpda@10004000/out-ports/port/endpoint          -  %w/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  %/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  %/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  %/soc@0/funnel@10041000/out-ports/port/endpoint        0  %/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  %/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  %/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  %/soc@0/funnel@10042000/out-ports/port/endpoint        0  %/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  %/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  %/soc@0/funnel@10045000/out-ports/port/endpoint        -  &	/soc@0/tpdm@10800000/out-ports/port/endpoint          -  &/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  &#/soc@0/tpdm@10841000/out-ports/port/endpoint          -  &1/soc@0/tpdm@10844000/out-ports/port/endpoint          .  &C/soc@0/funnel@10846000/in-ports/port/endpoint         /  &W/soc@0/funnel@10846000/out-ports/port/endpoint        -  &k/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  &w/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  &/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  &/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  &/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  &/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  &/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  &/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  &/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  &/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  &/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  '/soc@0/funnel@10b04000/out-ports/port/endpoint          '/soc@0/tmc@10b05000       +  '$/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  ',/soc@0/tmc@10b05000/out-ports/port/endpoint       2  '5/soc@0/replicator@10b06000/in-ports/port/endpoint         3  'A/soc@0/replicator@10b06000/out-ports/port/endpoint        .  'O/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  ']/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  'k/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  'y/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  '/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  '/soc@0/tpda@10b08000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  '/soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  '/soc@0/tpda@10b23000/in-ports/port/endpoint       -  (/soc@0/tpda@10b23000/out-ports/port/endpoint          .  (/soc@0/funnel@10b24000/in-ports/port/endpoint         /  (1/soc@0/funnel@10b24000/out-ports/port/endpoint        -  (D/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  (P/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  (^/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  (l/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  ({/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  (/soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  (/soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  (/soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  (/soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  (/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  (/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  (/soc@0/tpda@10c2b000/out-ports/port/endpoint          0  (/soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  )/soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  )/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  )*/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  );/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  )K/soc@0/tpdm@10c39000/out-ports/port/endpoint          .  )[/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  )j/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  )z/soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  )/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  )/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  )/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  )/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  )/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  )/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  )/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  )/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  *
/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  */soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  *+/soc@0/funnel@10d04000/out-ports/port/endpoint        -  *;/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  *J/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  *Y/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  *h/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  *w/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  */soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  */soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  */soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  */soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  */soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  */soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  */soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  */soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  */soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  +/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  +/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  +#/soc@0/tpda@10d12000/out-ports/port/endpoint          .  +1/soc@0/funnel@10d13000/in-ports/port/endpoint         /  +A/soc@0/funnel@10d13000/out-ports/port/endpoint          +Q/soc@0/iommu@15000000           +[/soc@0/iommu@15400000         %  +e/soc@0/interrupt-controller@17000000          =  +j/soc@0/interrupt-controller@17000000/msi-controller@17040000            +r/soc@0/mailbox@17430000         +}/soc@0/rsc@17500000         +/soc@0/rsc@17500000/bcm-voter         %  +/soc@0/rsc@17500000/clock-controller          %  +/soc@0/rsc@17500000/power-controller          /  +/soc@0/rsc@17500000/power-controller/opp-table        6  +/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  +/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  +/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  +/soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  ,+/soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  ,A/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  ,P/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  ,b/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  ,t/soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  ,/soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  ,/soc@0/rsc@17500000/regulators-0/bob1         &  ,/soc@0/rsc@17500000/regulators-0/bob2         &  ,/soc@0/rsc@17500000/regulators-0/ldo1         &  ,/soc@0/rsc@17500000/regulators-0/ldo2         &  ,/soc@0/rsc@17500000/regulators-0/ldo4         &  -/soc@0/rsc@17500000/regulators-0/ldo5         &  -/soc@0/rsc@17500000/regulators-0/ldo6         &  -!/soc@0/rsc@17500000/regulators-0/ldo7         &  -./soc@0/rsc@17500000/regulators-0/ldo8         &  -;/soc@0/rsc@17500000/regulators-0/ldo9         '  -H/soc@0/rsc@17500000/regulators-0/ldo10        '  -V/soc@0/rsc@17500000/regulators-0/ldo12        '  -d/soc@0/rsc@17500000/regulators-0/ldo13        '  -r/soc@0/rsc@17500000/regulators-0/ldo14        '  -/soc@0/rsc@17500000/regulators-0/ldo15        '  -/soc@0/rsc@17500000/regulators-0/ldo16        '  -/soc@0/rsc@17500000/regulators-0/ldo17        '  -/soc@0/rsc@17500000/regulators-1/smps4        &  -/soc@0/rsc@17500000/regulators-1/ldo1         &  -/soc@0/rsc@17500000/regulators-1/ldo2         &  -/soc@0/rsc@17500000/regulators-1/ldo3         &  -/soc@0/rsc@17500000/regulators-2/ldo1         &  -/soc@0/rsc@17500000/regulators-2/ldo2         &  -/soc@0/rsc@17500000/regulators-2/ldo3         &  ./soc@0/rsc@17500000/regulators-3/ldo2         &  ./soc@0/rsc@17500000/regulators-3/ldo3         '  ./soc@0/rsc@17500000/regulators-4/smps1        &  .,/soc@0/rsc@17500000/regulators-4/ldo1         &  .9/soc@0/rsc@17500000/regulators-4/ldo2         &  .F/soc@0/rsc@17500000/regulators-4/ldo3         '  .S/soc@0/rsc@17500000/regulators-6/smps1        '  .`/soc@0/rsc@17500000/regulators-6/smps2        &  .m/soc@0/rsc@17500000/regulators-6/ldo1         &  .z/soc@0/rsc@17500000/regulators-6/ldo2         &  ./soc@0/rsc@17500000/regulators-6/ldo3         '  ./soc@0/rsc@17500000/regulators-7/smps5        &  ./soc@0/rsc@17500000/regulators-7/ldo1         &  ./soc@0/rsc@17500000/regulators-7/ldo2         &  ./soc@0/rsc@17500000/regulators-7/ldo3           ./soc@0/sram@18b4e000          (  ./soc@0/sram@18b4e000/scp-sram-section@0       *  ./soc@0/sram@18b4e000/scp-sram-section@200           ./soc@0/watchdog@1c840000            ./soc@0/pmu@24091000/opp-table           //soc@0/pmu@240b3400         //soc@0/pmu@240b5400         /*/soc@0/pmu@240b5400/opp-table           />/soc@0/remoteproc@32300000          /N/thermal-zones        1  /\/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  /j/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  /x/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  //thermal-zones/gpuss-3-thermal/trips/trip-point0          1  //thermal-zones/gpuss-4-thermal/trips/trip-point0          1  //thermal-zones/gpuss-5-thermal/trips/trip-point0          1  //thermal-zones/gpuss-6-thermal/trips/trip-point0          1  //thermal-zones/gpuss-7-thermal/trips/trip-point0          !  //thermal-zones/pmc8380-6-thermal            //audio-codec          .  //pmic-glink/connector@0/ports/port@0/endpoint         .  //pmic-glink/connector@0/ports/port@1/endpoint         .  0/pmic-glink/connector@0/ports/port@2/endpoint         .  0*/pmic-glink/connector@1/ports/port@0/endpoint         .  0?/pmic-glink/connector@1/ports/port@1/endpoint         .  0T/pmic-glink/connector@1/ports/port@2/endpoint         .  0n/pmic-glink/connector@2/ports/port@0/endpoint         .  0/pmic-glink/connector@2/ports/port@1/endpoint         .  0/pmic-glink/connector@2/ports/port@2/endpoint           0/regulator-nvme         0/regulator-rtmr0-1p15           0/regulator-rtmr0-1p8            0/regulator-rtmr0-3p3            0/regulator-rtmr1-1p15           0/regulator-rtmr1-1p8            1	/regulator-rtmr1-3p3            1/regulator-rtmr2-1p15           1(/regulator-rtmr2-1p8            17/regulator-rtmr2-3p3            1F/regulator-vph-pwr          1N/regulator-wwan          	interrupt-parent #address-cells #size-cells model compatible stdout-path clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cpu-idle-states cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 vdd-supply vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios orientation-switch retimer-switch #phy-cells vdd3v3-supply vdd1v8-supply interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts opp-peak-kBps clock-output-names msi-map perst-gpios wake-gpios vddpe-3v3-supply qcom,4ln-config-sel #hwlock-cells qcom,gmu #cooling-cells memory-region firmware-name opp-level qcom,opp-acd-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc wakeup-source snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk dr_mode maximum-speed usb-role-switch assigned-clock-parents data-lanes link-frequencies qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up output-low qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-io-supply vdd-mic-bias-supply orientation-gpios power-role data-role audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cpu8 l2_2 cpu9 cpu10 cpu11 cpu_map_cluster2 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cpu_pd8 cpu_pd9 cpu_pd10 cpu_pd11 cluster_pd0 cluster_pd1 cluster_pd2 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 retimer_ss2_ss_out retimer_ss2_ss_in retimer_ss2_con_sbu_out spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb3_repeater eusb6_repeater spi5 i2c6 spi6 i2c7 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_phy pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_opp_table mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_gpios pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_en pmc8380_6 pmc8380_6_temp_alarm pmc8380_6_gpios pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep eusb3_reset_n eusb6_reset_n nvme_reg_en pcie4_default pcie5_default pcie6a_default rtmr1_default rtmr2_default rtmr1_1p15_reg_en rtmr1_1p8_reg_en rtmr1_3p3_reg_en rtmr2_1p15_reg_en rtmr2_1p8_reg_en rtmr2_3p3_reg_en sdc2_card_det_n wcd_default wwan_sw_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l5b_3p0 vreg_l6b_1p8 vreg_l7b_2p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l10b_1p8 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_l16b_2p9 vreg_l17b_2p5 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p8 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_l1f_1p0 vreg_l2f_1p0 vreg_l3f_1p0 vreg_s1i_0p9 vreg_s2i_1p0 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p8 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog llcc_bwmon_opp_table bwmon_cluster0 bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp thermal_zones gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 gpuss4_alert0 gpuss5_alert0 gpuss6_alert0 gpuss7_alert0 pmc8380_6_thermal wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in pmic_glink_ss2_hs_in pmic_glink_ss2_ss_in pmic_glink_ss2_con_sbu_in vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vreg_rtmr2_1p15 vreg_rtmr2_1p8 vreg_rtmr2_3p3 vph_pwr vreg_wwan iommu-map 