  dC   8  ^P   (              ^                                 radxa,e20c rockchip,rk3528                                   +            7Radxa E20C     aliases          =/pinctrl/gpio@ff610000           C/pinctrl/gpio@ffaf0000           I/pinctrl/gpio@ffb00000           O/pinctrl/gpio@ffb10000           U/pinctrl/gpio@ffb20000           [/soc/ethernet@ffbe0000           e/soc/i2c@ffa58000            j/soc/mmc@ffbf0000            o/soc/mmc@ffc30000            t/soc/serial@ff9f0000          cpus                         +       cpu-map    cluster0       core0            |         core1            |         core2            |         core3            |               cpu@0             arm,cortex-a53                        cpu          psci                                                 cpu@1             arm,cortex-a53                       cpu          psci                                                 cpu@2             arm,cortex-a53                       cpu          psci                                                 cpu@3             arm,cortex-a53                       cpu          psci                                                    firmware       scmi              arm,scmi-smc                                                +       protocol@14                                                 pinctrl           rockchip,rk3528-pinctrl             	                     +                            gpio@ff610000             rockchip,gpio-bank               a                     
  r   
  s                G                                                                2               B      gpio@ffaf0000             rockchip,gpio-bank                                    
      
                   I                                                                2         gpio@ffb00000             rockchip,gpio-bank                                    
  $   
  %                K                                          @                     2         gpio@ffb10000             rockchip,gpio-bank                                    
      
                   L                                          `                     2         gpio@ffb20000             rockchip,gpio-bank                                    
      
                   N                                                               2               0      pcfg-pull-up             C                  pcfg-pull-none           P                  pcfg-pull-none-drv-level-0           P        ]                      pcfg-pull-none-drv-level-2           P        ]                     pcfg-pull-up-drv-level-2             C        ]                     pcfg-pull-none-smt           P         l                  arm       clk       emmc       emmc-bus8                                                                                                                       1      emmc-clk                                    2      emmc-cmd                                    3      emmc-strb                                   4         eth       fephy      fephym0-led-link                                    #      fephym0-led-spd                                 $         fspi          gpu       hdmi          hsm       i2c0          i2c1       i2c1m0-xfer                                                       i2c2       i2c2m1-xfer                                                       i2c3          i2c4       i2c4-xfer                                                          i2c5          i2c6          i2c7       i2c7-xfer                                                         i2s0          i2s1          jtag          pcie          pdm       pmu       pwm0          pwm1       pwm1m0-pins                                          pwm2       pwm2m0-pins                                          pwm3          pwm4          pwm5          pwm6          pwm7          pwr       ref       rgmii      rgmii-miim                                               *      rgmii-rx-bus2         0                                                  ,      rgmii-tx-bus2         0                                                   +      rgmii-rgmii-clk                                              -      rgmii-rgmii-bus       @                                	                              .         scr       sdio0      sdio0-bus4        @                                                               5      sdio0-clk                                   6      sdio0-cmd                                   7         sdio1      sdio1-bus4        @                                            	                  8      sdio1-clk                                   9      sdio1-cmd                                   :         sdmmc      sdmmc-bus4        @                                                               ;      sdmmc-clk                                   <      sdmmc-cmd                                   =      sdmmc-det                                   >      sdmmc-vol-ctrl-h                                     G         spdif         spi0          spi1          tsi0          tsi1          uart0      uart0m0-xfer                                                          uart1         uart2         uart3         uart4         uart5         uart6         uart7         ethernet       gmac1-rstn-l                                     /         gpio-keys      user-key                                       A         leds       lan-led-g                                    C      sys-led-g                                    D      wan-led-g                                    E            psci              arm,psci-1.0 arm,psci-0.2            smc       reserved-memory                      +                shmem@10f000              arm,scmi-shmem                                                      timer             arm,armv8-timer       0                                 
        clock-xin24m              fixed-clock         n6         xin24m                                 clock-gmac50m             fixed-clock                 gmac0                                  soc           simple-bus                                                     +      interrupt-controller@fed01000             arm,gic-400       @                                 @             `                        	                                2                     qos@ff200000              rockchip,rk3528-qos syscon                                qos@ff200080              rockchip,rk3528-qos syscon                               qos@ff200100              rockchip,rk3528-qos syscon                               qos@ff200200              rockchip,rk3528-qos syscon                               qos@ff200280              rockchip,rk3528-qos syscon                              qos@ff200300              rockchip,rk3528-qos syscon                               qos@ff200380              rockchip,rk3528-qos syscon                              qos@ff210000              rockchip,rk3528-qos syscon               !                qos@ff210080              rockchip,rk3528-qos syscon               !               qos@ff220000              rockchip,rk3528-qos syscon               "                qos@ff220080              rockchip,rk3528-qos syscon               "               qos@ff240000              rockchip,rk3528-qos syscon               $                qos@ff250000              rockchip,rk3528-qos syscon               %                qos@ff260000              rockchip,rk3528-qos syscon               &                qos@ff270000              rockchip,rk3528-qos syscon               '                qos@ff270080              rockchip,rk3528-qos syscon               '               qos@ff270100              rockchip,rk3528-qos syscon               '               qos@ff270200              rockchip,rk3528-qos syscon               '               qos@ff270280              rockchip,rk3528-qos syscon               '              qos@ff270300              rockchip,rk3528-qos syscon               '               qos@ff270380              rockchip,rk3528-qos syscon               '              qos@ff270480              rockchip,rk3528-qos syscon               '              qos@ff270500              rockchip,rk3528-qos syscon               '               qos@ff280000              rockchip,rk3528-qos syscon               (                qos@ff280080              rockchip,rk3528-qos syscon               (               qos@ff280100              rockchip,rk3528-qos syscon               (               qos@ff280180              rockchip,rk3528-qos syscon               (              qos@ff280200              rockchip,rk3528-qos syscon               (               qos@ff280280              rockchip,rk3528-qos syscon               (              qos@ff280300              rockchip,rk3528-qos syscon               (               qos@ff280380              rockchip,rk3528-qos syscon               (              qos@ff280400              rockchip,rk3528-qos syscon               (               syscon@ff340000           rockchip,rk3528-vpu-grf syscon               4                     %      syscon@ff360000           rockchip,rk3528-vo-grf syscon                6                           clock-controller@ff4a0000             rockchip,rk3528-cru              J                    
  t   
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   L      L     Fq ; ;] Q 沀e  р  C ׄ #F  sY@e                        xin24m gmac0                                       
      syscon@ff540000           rockchip,rk3528-ioc-grf syscon               T                     	      serial@ff9f0000       &    rockchip,rk3528-uart snps,dw-apb-uart                                     
      
   k        baudclk apb_pclk                    (                 	                         	           okay            default         (         serial@ff9f8000       &    rockchip,rk3528-uart snps,dw-apb-uart                                    
      
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                   	         	  disabled          serial@ffa00000       &    rockchip,rk3528-uart snps,dw-apb-uart                                     
      
           baudclk apb_pclk                    *                                          	         	  disabled          serial@ffa08000       &    rockchip,rk3528-uart snps,dw-apb-uart                                    
      
           baudclk apb_pclk                    +                                          	         	  disabled          serial@ffa10000       &    rockchip,rk3528-uart snps,dw-apb-uart                                     
      
  1        baudclk apb_pclk                    ,                                          	         	  disabled          serial@ffa18000       &    rockchip,rk3528-uart snps,dw-apb-uart                                    
   "   
           baudclk apb_pclk                    -                                          	         	  disabled          serial@ffa20000       &    rockchip,rk3528-uart snps,dw-apb-uart                                     
   %   
           baudclk apb_pclk                    .                                          	         	  disabled          serial@ffa28000       &    rockchip,rk3528-uart snps,dw-apb-uart                                    
   (   
           baudclk apb_pclk                    /                                          	         	  disabled          i2c@ffa50000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                   
      
         	  i2c pclk                    =                        +          	  disabled          i2c@ffa58000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                  
      
         	  i2c pclk                    >                        +            okay            default         (      eeprom@50             belling,bl24c16a atmel,24c16                P        2            ;        E            i2c@ffa60000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                   
  j   
  i      	  i2c pclk                    ?           default         (                        +          	  disabled          i2c@ffa68000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                  
      
         	  i2c pclk                    @                        +          	  disabled          i2c@ffa70000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                   
  3   
  2      	  i2c pclk                    A           default         (                        +          	  disabled          i2c@ffa78000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                  
      
         	  i2c pclk                    B                        +          	  disabled          i2c@ffa80000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                   
      
         	  i2c pclk                    C                        +          	  disabled          i2c@ffa88000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                  
  5   
  4      	  i2c pclk                    D           default         (                        +          	  disabled          pwm@ffa90000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                   
   o   
   n      	  pwm pclk            P         	  disabled          pwm@ffa90010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                  
   o   
   n      	  pwm pclk            P           okay            default         (               H      pwm@ffa90020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                   
   o   
   n      	  pwm pclk            P           okay            default         (               I      pwm@ffa90030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm               0                   
   o   
   n      	  pwm pclk            P         	  disabled          pwm@ffa98000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                  
   r   
   q      	  pwm pclk            P         	  disabled          pwm@ffa98010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                 
   r   
   q      	  pwm pclk            P         	  disabled          pwm@ffa98020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                  
   r   
   q      	  pwm pclk            P         	  disabled          pwm@ffa98030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm              0                   
   r   
   q      	  pwm pclk            P         	  disabled          adc@ffae0000              rockchip,rk3528-saradc                                    
      
           saradc apb_pclk                            [   
   o        bsaradc-apb          n           okay                           @      ethernet@ffbd0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                               0      
     
     
     
     
     
        >  stmmaceth clk_mac_ref mac_clk_rx mac_clk_tx pclk_mac aclk_mac                   q          t           macirq eth_wake_irq                    rmii            [   
         
  bstmmaceth                                               !           "               	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@2            ethernet-phy-ieee802.3-c22                          
  "                  default         (   #   $        [   
                        stmmac-axi-config                                                       ,                      rx-queues-config            <               !   queue0           tx-queues-config            R               "   queue0              ethernet@ffbe0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                                      
      
      
      
         (  stmmaceth clk_mac_ref pclk_mac aclk_mac                 y          |           macirq eth_wake_irq         [   
   a      
  bstmmaceth               %           &                    '           (                 okay            houtput             )      	  rgmii-id            u           default         (   *   +   ,   -   .   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                      default         (   /          N                     0                  )         stmmac-axi-config                                                       ,               &      rx-queues-config            <               '   queue0           tx-queues-config            R               (   queue0              mmc@ffbf0000          0    rockchip,rk3528-dwcmshc rockchip,rk3588-dwcmshc                                  
      
      
            n6        (      
      
      
      
      
           core bus axi block timer                                        default         (   1   2   3   4      (  [   
   A   
   B   
   C   
   D   
   E        bcore bus axi block timer            okay                                                                                        mmc@ffc10000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @              
      
      
     
          biu ciu ciu-drive ciu-sample                                                   default         (   5   6   7        [   
   g        breset         	  disabled          mmc@ffc20000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @              
      
      
     
          biu ciu ciu-drive ciu-sample                                                   default         (   8   9   :        [   
   h        breset         	  disabled          mmc@ffc30000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @              
  (   
  '   
     
          biu ciu ciu-drive ciu-sample                                          р        default         (   ;   <   =   >        [   
           breset           '   Z        okay                                 E         V         a                      ?      dma-controller@ffd60000           arm,pl330 arm,primecell                      @             
   ^      	  apb_pclk          l                                                                                                      o            z                     chosen          serial0:1500000n8         adc-keys          	    adc-keys               @            buttons          w@           d   button-maskrom          MASKROM                                 gpio-keys         
    gpio-keys           default         (   A   button-user            B               USER                                leds          
    gpio-leds           default         (   C   D   E   led-lan                    !off         /lan            0               8netdev        led-sys                    !on        
  /heartbeat              0            
  8heartbeat         led-wan                    !off         /wan            0               8netdev           regulator-0v9-vdd             regulator-fixed         Nvdd_0v9          ]         q                             F      regulator-1v1-vcc-ddr             regulator-fixed         Nvcc_ddr          ]         q                             F      regulator-1v8-vcc             regulator-fixed         Nvcc_1v8          ]         q         w@         w@                             regulator-3v3-vcc             regulator-fixed         Nvcc_3v3          ]         q         2Z         2Z           F                  regulator-5v0-vcc-sys             regulator-fixed         Nvcc5v0_sys           ]         q         LK@         LK@            F      regulator-vccio-sd            regulator-gpio             0               default         (   G      	  Nvccio_sd             w@         2Z         w@     2Z              F            ?      regulator-vdd-arm             pwm-regulator              H                    F        Nvdd_arm          ]         q         b         Sh                             regulator-vdd-logic           pwm-regulator              I                    F      
  Nvdd_logic            ]         q         
         Y                    	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 ethernet0 i2c1 mmc0 mmc1 serial0 cpu reg device_type enable-method clocks cpu-supply phandle arm,smc-id shmem #clock-cells rockchip,grf ranges interrupts gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins no-map clock-frequency clock-output-names assigned-clocks assigned-clock-rates clock-names #reset-cells dmas reg-io-width reg-shift status pinctrl-names pinctrl-0 pagesize read-only vcc-supply #pwm-cells resets reset-names #io-channel-cells vref-supply interrupt-names phy-handle phy-mode snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-is-integrated snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use clock_in_out phy-supply reset-assert-us reset-deassert-us reset-gpios max-frequency bus-width cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable vmmc-supply vqmmc-supply fifo-depth rockchip,default-sample-phase cap-sd-highspeed disable-wp sd-uhs-sdr104 #dma-cells arm,pl330-periph-burst stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt wakeup-source color default-state function linux,default-trigger regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply states pwms pwm-supply regulator-settling-time-up-us 