 D   8    (            <@                              9    tsd,rk3588-tiger-haikou tsd,rk3588-tiger rockchip,rk3588                                     +         1   7Theobroma Systems RK3588-Q7 SoM on Haikou devkit       aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000         #   /i2c@fec80000/fan@18/i2c-mux/i2c@0           /mmc@fe2e0000         *   /i2c@fec80000/fan@18/i2c-mux/i2c@0/rtc@6f           /ethernet@fe1b0000          /mmc@fe2c0000         cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                       cluster2       core0                    core1              	            cpu@0           cpu           arm,cortex-a55                       $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@100         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@200         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@300         cpu           arm,cortex-a55                      $psci            2          E   
            L           \           i   @        {                         @                                                                                   cpu@400         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@500         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@600         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                                  cpu@700         cpu           arm,cortex-a76                      $psci            2           E   
           L           \           i   @        {                         @                                                                            	      idle-states         psci       cpu-sleep             arm,idle-state           "        3           J   d        [   x        k                      l2-cache-l0           cache           ^           k   @        }           |                                        l2-cache-l1           cache           ^           k   @        }           |                                        l2-cache-l2           cache           ^           k   @        }           |                                        l2-cache-l3           cache           ^           k   @        }           |                                        l2-cache-b0           cache           ^           k   @        }           |                                        l2-cache-b1           cache           ^           k   @        }           |                                        l2-cache-b2           cache           ^           k   @        }           |                                        l2-cache-b3           cache           ^           k   @        }           |                                           l3-cache              cache           ^ 0          k   @        }           |                             display-subsystem             rockchip,display-subsystem                       9      firmware       scmi              arm,scmi-smc                                              +              :   protocol@14                                   
      protocol@16                                               hdmi0-sound           simple-audio-card           i2s                    hdmi0           okay              ;   simple-audio-card,codec                  simple-audio-card,cpu                       pmu-a55           arm,cortex-a55-pmu          "                  pmu-a76           arm,cortex-a76-pmu          "                   psci              arm,psci-1.0            +smc       clock-0           fixed-clock         -)׫        =spll                          <      timer             arm,armv8-timer       P  "                                             
                          %  Psec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         -n6         =xin24m                        =      clock-2           fixed-clock         -           =xin32k                        >      reserved-memory                      +            `   shmem@10f000              arm,scmi-shmem                                 g                 hdmi-receiver-cma             shared-dma-pool         n                    d    
           {                g      	  disabled                       gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                                 
                    E   !     !     !          core coregroup stacks                   0  "       \              ]              ^               Pjob mmu gpu            "           okay               #           $                 usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                       @          "                      E   !     !     !          ref_clk suspend_clk bus_clk         otg            %   &           usb2-phy usb3-phy         
  utmi_wide              "              !  R                           '         ?         `                 okay               '          ?      usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                 "                      E   !     !     !     (           )        usb            "           okay              @      usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                 "                      E   !     !     !     (           )        usb            "           okay              A      usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                 "                      E   !     !     !     *           +        usb            "           okay              B      usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                 "                      E   !     !     !     *           +        usb            "           okay              C      usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                      @          "                    (  E   !  j   !  i   !  h   !  k   !  r      &  ref_clk suspend_clk bus_clk utmi pipe           host               ,         	  usb3-phy          
  utmi_wide              !  4                  ?         `                          okay              D      iommu@fc900000            arm,smmu-v3                              @  "      q             s             v             o               Peventq gerror priq cmdq-sync                          ~      iommu@fcb00000            arm,smmu-v3                              @  "      }                                       {               Peventq gerror priq cmdq-sync                     	  disabled              E      syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                 X                   {      syscon@fd58c000           rockchip,rk3588-sys-grf syscon               X                   m      syscon@fd5e8000       !    rockchip,rk3588-dcphy-grf syscon                 ^       @                  syscon@fd5ec000       !    rockchip,rk3588-dcphy-grf syscon                 ^       @                  syscon@fd5a4000           rockchip,rk3588-vop-grf syscon               Z@                    n      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon               Z`                 E   !                   syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon               Z       @         E   !             o      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon               Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon               [                    .      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon              [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon              \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon              \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                     E   !          phyclk          =usb480m_phy0            "                        !  m   !          phy apb         okay                  otg-port                        okay               -           %            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]       @                      +             F   usb2phy@8000              rockchip,rk3588-usb2phy                                    E   !          phyclk          =usb480m_phy2            "                        !  o   !          phy apb         okay               (   host-port                       okay               )            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]       @                      +             G   usb2phy@c000              rockchip,rk3588-usb2phy                                    E   !          phyclk          =usb480m_phy3            "                        !  p   !           phy apb         okay               *   host-port                       okay               +            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon              ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon               _                          sram@fd600000         
    mmio-sram                `                 `        `                          +             H      clock-controller@fd7c0000             rockchip,rk3588-cru              |                   !      !      !      !      !      !      !      !      !     !     !     !     !  ]   !   q   !      !        @  A .  2Fq )׫ׄ e /  ׄ   e Zр            .                                 !      i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               "      =               E   !  t   !  s      	  i2c pclk                /        
default                      +          	  disabled              I      serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      K               E   !     !          baudclk apb_pclk               0      0           tx rx               1        
default         '           1         	  disabled              J      pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !     !        	  pwm pclk                2        
default         >         	  disabled              K      pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !     !        	  pwm pclk                3        
default         >         	  disabled              L      pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !     !        	  pwm pclk                4        
default         >         	  disabled              M      pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !     !        	  pwm pclk                5        
default         >         	  disabled              N      power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                   p   power-controller          !    rockchip,rk3588-power-controller                        I            +            okay               "   power-domain@8                      I                         +       power-domain@9              	         E   !  !   !  #   !  "   !          ]   6   7   8        I                         +       power-domain@10             
        E   !  !   !  #   !  "        ]   9        I          power-domain@11                     E   !  !   !  #   !  "        ]   :        I                power-domain@12                     E   !     !     !          ]   ;   <   =   >        I            d   $          O      power-domain@13                                  +            I       power-domain@14                   (  E   !     !     !     !     !          ]   ?        I          power-domain@15                      E   !     !     !     !          ]   @        I          power-domain@16                     E   !     !          ]   A   B   C                     +            I       power-domain@17                      E   !     !     !     !          ]   D   E   F        I                power-domain@21                     E   !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !           ]   G   H   I   J   K   L   M   N                     +            I       power-domain@23                     E   !   C   !   A   !          ]   O        I          power-domain@14                      E   !     !     !     !          ]   ?        I          power-domain@15                     E   !     !     !          ]   @        I          power-domain@22                     E   !     !          ]   P        I             power-domain@24                     E   !  [   !  Z   !  ]        ]   Q   R                     +            I       power-domain@25                   8  E   !     !     !     !     !     !     !  Z        ]   S        I             power-domain@26                   8  E   !     !     !     !     !     !     !  Q        ]   T   U        I          power-domain@27                   0  E   !     !     !     !     !     !          ]   V   W   X   Y                     +            I       power-domain@28                      E   !     !     !     !          ]   Z   [        I          power-domain@29                   (  E   !     !     !     !     !          ]   \   ]        I             power-domain@30                     E   !  z   !  {        ]   ^        I          power-domain@31                   @  E   !  W   !     !     !     !     !     !     !          ]   _   `   a   b        I          power-domain@33             !        E   !  W   !  Z   !  [        I          power-domain@34             "        E   !  W   !  Z   !  [        I          power-domain@37             %        E   !     !  2        ]   c        I          power-domain@38             &        E   !   4   !   5        I          power-domain@40             (        ]   d        I                video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                "       w               Pvdpu            E   !     !        
  aclk hclk           r   e           "             P      iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       v               aclk iface          E   !     !             "                          e      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                              "       t               E   !     !     !          aclk hclk sclk             !  r   !  q   !  p        core axi ahb               "             Q      video-codec@fdba0000              rockchip,rk3588-vepu121                               "       z               E   !     !        
  aclk hclk           r   f           "             R      iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       y               E   !     !          aclk iface             "                          f      video-codec@fdba4000              rockchip,rk3588-vepu121              @                "       |               E   !     !        
  aclk hclk           r   g           "             S      iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              H        @        "       {               E   !     !          aclk iface             "                          g      video-codec@fdba8000              rockchip,rk3588-vepu121                              "       ~               E   !     !        
  aclk hclk           r   h           "             T      iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "       }               E   !     !          aclk iface             "                          h      video-codec@fdbac000              rockchip,rk3588-vepu121                              "                      E   !     !        
  aclk hclk           r   i           "             U      iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                      @        "                      E   !     !          aclk iface             "                          i      video-codec@fdc70000              rockchip,rk3588-av1-vpu                               "       l               Pvdpu               !   A   !   C        ׄ ׄ         E   !   A   !   C      
  aclk hclk              "               !     !      !     !            V      vop@fdd90000              rockchip,rk3588-vop                       B     P                yvop gamma-lut           "                    @  E   !  ]   !  \   !  a   !  b   !  c   !  d   !  [   j   k      Q  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop pll_hdmiphy0 pll_hdmiphy1            r   l           "              m           n           o           p        okay              W   ports                        +                  port@0                       +                           X   endpoint@2                         q           y         port@1                       +                          Y      port@2                       +                          Z      port@3                       +                          [            iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu               ~                            "                      E   !  ]   !  \        aclk iface                         "           okay               l      spdif-tx@fddb0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                  !              !        
  mclk hclk           E   !     !          tx             r           "                         "                     	  disabled              \      i2s@fddc0000              rockchip,rk3588-i2s-tdm                               "                      E   !     !     !          mclk_tx mclk_rx hclk               !             !              s            tx             "              !          tx-m                      	  disabled              ]      spdif-tx@fdde0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                  !              !  A      
  mclk hclk           E   !  D   !  @        tx             r           "                         "                     	  disabled              ^      i2s@fddf0000              rockchip,rk3588-i2s-tdm                               "                      E   !  4   !  4   !  5        mclk_tx mclk_rx hclk               !  1           !              s           tx             "              !          tx-m                        okay                     i2s@fddfc000              rockchip,rk3588-i2s-tdm                              "                      E   !  0   !  0   !  ,        mclk_tx mclk_rx hclk               !  -           !              s           rx             "              !          rx-m                      	  disabled              _      dsi@fde20000              rockchip,rk3588-mipi-dsi2                                 "                      E   !  e   !  g      	  pclk sys               !          apb            "              t   
        dcphy              n      	  disabled              `   ports                        +       port@0                         a      port@1                        b            dsi@fde30000              rockchip,rk3588-mipi-dsi2                                 "                      E   !  f   !  h      	  pclk sys               !          apb            "              u   
        dcphy              n      	  disabled              c   ports                        +       port@0                         d      port@1                        e            hdmi@fde80000             rockchip,rk3588-dw-hdmi-qp                              0  E   !     !     !     !  4   !  R   !          pclk earc ref aud hdp hclk_vo1        P  "                                                              h               Pavp cec earc main hpd              j        
default             v   w   x           "              !     !  0        ref hdp            m           o                    okay                  ports                        +       port@0                         f   endpoint               y           q         port@1                        g   endpoint               z          2               edp@fdec0000              rockchip,rk3588-edp                               E   !      !          dp pclk         "                         j        dp             "              !     !          dp apb             o      	  disabled              h   ports                        +       port@0                         i      port@1                        j            qos@fdf35000              rockchip,rk3588-qos syscon               P                    ;      qos@fdf35200              rockchip,rk3588-qos syscon               R                    <      qos@fdf35400              rockchip,rk3588-qos syscon               T                    =      qos@fdf35600              rockchip,rk3588-qos syscon               V                    >      qos@fdf36000              rockchip,rk3588-qos syscon               `                    ^      qos@fdf39000              rockchip,rk3588-qos syscon                                   c      qos@fdf3d800              rockchip,rk3588-qos syscon                                   d      qos@fdf3e000              rockchip,rk3588-qos syscon                                   `      qos@fdf3e200              rockchip,rk3588-qos syscon                                   _      qos@fdf3e400              rockchip,rk3588-qos syscon                                   a      qos@fdf3e600              rockchip,rk3588-qos syscon                                   b      qos@fdf40000              rockchip,rk3588-qos syscon                                    \      qos@fdf40200              rockchip,rk3588-qos syscon                                   ]      qos@fdf40400              rockchip,rk3588-qos syscon                                   V      qos@fdf40500              rockchip,rk3588-qos syscon                                   W      qos@fdf40600              rockchip,rk3588-qos syscon                                   X      qos@fdf40800              rockchip,rk3588-qos syscon                                   Y      qos@fdf41000              rockchip,rk3588-qos syscon                                   Z      qos@fdf41100              rockchip,rk3588-qos syscon                                   [      qos@fdf60000              rockchip,rk3588-qos syscon                                    A      qos@fdf60200              rockchip,rk3588-qos syscon                                   B      qos@fdf60400              rockchip,rk3588-qos syscon                                   C      qos@fdf61000              rockchip,rk3588-qos syscon                                   D      qos@fdf61200              rockchip,rk3588-qos syscon                                   E      qos@fdf61400              rockchip,rk3588-qos syscon                                   F      qos@fdf62000              rockchip,rk3588-qos syscon                                    ?      qos@fdf63000              rockchip,rk3588-qos syscon               0                    @      qos@fdf64000              rockchip,rk3588-qos syscon               @                    O      qos@fdf66000              rockchip,rk3588-qos syscon               `                    G      qos@fdf66200              rockchip,rk3588-qos syscon               b                    H      qos@fdf66400              rockchip,rk3588-qos syscon               d                    I      qos@fdf66600              rockchip,rk3588-qos syscon               f                    J      qos@fdf66800              rockchip,rk3588-qos syscon               h                    K      qos@fdf66a00              rockchip,rk3588-qos syscon               j                    L      qos@fdf66c00              rockchip,rk3588-qos syscon               l                    M      qos@fdf66e00              rockchip,rk3588-qos syscon               n                    N      qos@fdf67000              rockchip,rk3588-qos syscon               p                    P      qos@fdf67200              rockchip,rk3588-qos syscon               r                   k      qos@fdf70000              rockchip,rk3588-qos syscon                                    9      qos@fdf71000              rockchip,rk3588-qos syscon                                   :      qos@fdf72000              rockchip,rk3588-qos syscon                                    6      qos@fdf72200              rockchip,rk3588-qos syscon               "                    7      qos@fdf72400              rockchip,rk3588-qos syscon               $                    8      qos@fdf80000              rockchip,rk3588-qos syscon                                    S      qos@fdf81000              rockchip,rk3588-qos syscon                                   T      qos@fdf81200              rockchip,rk3588-qos syscon                                   U      qos@fdf82000              rockchip,rk3588-qos syscon                                    Q      qos@fdf82200              rockchip,rk3588-qos syscon               "                    R      dfi@fe060000                                    rockchip,rk3588-dfi       @  "                     &              0              :                  {          l      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  E   !  C   !  H   !  >   !  M   !  R   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                                          `  (                  |                      |                     |                     |           6           G           V  0    }  0            ^  0    ~  0            h              ,         	  pcie-phy               "   "      T  `                                                     @      	       @         0      
@       @                                     ydbi apb config             !  )   !  .      	  pwr pipe                         +         	  disabled              m   legacy-interrupt-controller          r                                            "                         |         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  E   !  D   !  I   !  ?   !  N   !  S   !  s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                                          `  (                                                                                             6           G           V  @    }  @            ^  @    ~  @            h                       	  pcie-phy               "   "      T  `                                                     @      
        @         0      
A        @                                     ydbi apb config             !  *   !  /      	  pwr pipe                         +         	  disabled              n   legacy-interrupt-controller          r                                            "                                  ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                  "                                    Pmacirq eth_wake_irq       (  E   !  6   !  7   !  Y   !  ^   !  5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  $      
  stmmaceth              m           .                                                         	  disabled              o   mdio              snps,dwmac-mdio                      +              p      stmmac-axi-config                                                                           rx-queues-config                             queue0        queue1           tx-queues-config            (                 queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               !                 "                   (  E   !  b   !  _   !  e   !  T   !  o        sata pmalive rxoob ref asic         >                        +          	  disabled              q   sata-port@0                      P @                      	  sata-phy            ]            l             sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               #                 "                   (  E   !  d   !  a   !  g   !  V   !  q        sata pmalive rxoob ref asic         >                        +          	  disabled              r   sata-port@0                      P @             ,         	  sata-phy            ]            l             spi@fe2b0000              rockchip,sfc                 +        @         "                      E   !  /   !  0        clk_sfc hclk_sfc                         +          	  disabled              s      mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc              ,        @         "                       E   
      
   	   !     !          biu ciu ciu-drive ciu-sample            {           р        
default                              "   (        okay                                                                                                                      t      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc              -        @         "                       E   !     !     !     !          biu ciu ciu-drive ciu-sample            {                    
default                        "   %      	  disabled              u      mmc@fe2e0000              rockchip,rk3588-dwcmshc              .                 "                         !  -   !  .   !  ,         n6        (  E   !  ,   !  *   !  +   !  -   !  .        core bus axi block timer                                          
default       (     !     !     !     !     !          core bus axi block timer            okay                                 #         0         ?         N        h            s         {                                         v      rng@fe378000              rockchip,rk3588-rng              7                "                     E   
                 0      i2s@fe470000              rockchip,rk3588-i2s-tdm              G                 "                      E   !   +   !   /   !   (        mclk_tx mclk_rx hclk               !   )   !   -           !      !              0       0           tx rx              "   &           !   *   !   +      
  tx-m rx-m                    
default       (                                                   	  disabled              w      i2s@fe480000              rockchip,rk3588-i2s-tdm              H                 "                      E   !  y   !  }   !  u        mclk_tx mclk_rx hclk               0      0           tx rx              !  ^   !  _      
  tx-m rx-m                    
default       (                                                   	  disabled              x      i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s              I                 "                      E   !      !           i2s_clk i2s_hclk               !              !              r       r           tx rx              "   &        
default                                        	  disabled              y      i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s              J                 "                      E   !   %   !           i2s_clk i2s_hclk               !   "           !              r      r           tx rx              "   &        
default                                          okay              5      spdif-tx@fe4e0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              N                    !              !   7      
  mclk hclk           E   !   9   !   6        tx             0           "                                  
default            "   &                  	  disabled              z      spdif-tx@fe4f0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              O                    !              !   =      
  mclk hclk           E   !   ?   !   <        tx             r           "                                  
default            "   &                  	  disabled              {      interrupt-controller@fe600000             arm,gic-v3                `             h                 "      	                r                     a               8                  `                                +                 msi-controller@fe640000           arm,gic-v3-its               d                                                 }      msi-controller@fe660000           arm,gic-v3-its               f                                                      ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                        dma-controller@fea10000           arm,pl330 arm,primecell                      @          "       V              W                        E   !   n      	  apb_pclk            		              0      dma-controller@fea30000           arm,pl330 arm,primecell                      @          "       X              Y                        E   !   o      	  apb_pclk            		              r      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   {      	  i2c pclk            "      >                           
default                      +            okay              |   eeprom@50               P          atmel,24c01         	           d           	            i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   |      	  i2c pclk            "      ?                           
default                      +          	  disabled              }      i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   }      	  i2c pclk            "      @                           
default                      +          	  disabled              ~      i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !   ~      	  i2c pclk            "      A                           
default                      +            okay                 regulator@42              rockchip,rk8602             B        	(           	Evdd_npu_s0           	T         	h        	z dp        	 ~        	          	                regulator-state-mem          	            i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      B                           
default                      +            okay            -              codec@a           fsl,sgtl5000                
        E                       	           	           	             4         timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                "      !               E   !   T   !   W        pclk timer                  watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                               E   !   d   !   c      
  tclk pclk           "      ;                       spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      F               E   !      !           spiclk apb_pclk            0      0           tx rx           
                             
default                      +          	  disabled                    spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      G               E   !      !           spiclk apb_pclk            0      0           tx rx           
                             
default                      +          	  disabled                    spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      H               E   !      !           spiclk apb_pclk            r      r           tx rx           
                          
default                      +            okay               !                         pmic@0            rockchip,rk806                                   "               
        
           
default                              
+ B@         
=        
U           
a           
m           
y           
           
           
           
           
           
           
           
           
           
                 dvs1-null-pins          gpio_pwrctrl1         	  pin_fun0                     dvs2-null-pins          gpio_pwrctrl2         	  pin_fun0                     dvs3-null-pins          gpio_pwrctrl3         	  pin_fun0                     regulators     dcdc-reg1            	h        	z dp        	 ~        	  0        	Evdd_gpu_s0                       $   regulator-state-mem          	         dcdc-reg2           	Evdd_cpu_lit_s0           	T         	h        	z dp        	 ~        	  0              regulator-state-mem          	         dcdc-reg3           	Evdd_log_s0           	T         	h        	z 
L        	 q        	  0             regulator-state-mem          	        8 q         dcdc-reg4           	Evdd_vdenc_s0             	T         	h        	z dp        	 ~        	  0             regulator-state-mem          	         dcdc-reg5           	Evdd_ddr_s0           	T         	h        	z 
L        	         	  0             regulator-state-mem          	        8 P         dcdc-reg6           	Evdd2_ddr_s3          	T         	h             regulator-state-mem          T         dcdc-reg7           	Evcc_2v0_pldo_s3          	T         	h        	z         	         	  0              regulator-state-mem          T        8          dcdc-reg8           	Evcc_3v3_s3           	T         	h        	z 2Z        	 2Z              regulator-state-mem          T        8 2Z         dcdc-reg9           	Evddq_ddr_s0          	T         	h             regulator-state-mem          	         dcdc-reg10          	Evcc_1v8_s3           	T         	h        	z w@        	 w@              regulator-state-mem          T        8 w@         pldo-reg1           	Evcca_1v8_s0          	T         	h        	z w@        	 w@             regulator-state-mem          	         pldo-reg2           	Evcc_1v8_s0           	T         	h        	z w@        	 w@              regulator-state-mem          	        8 w@         pldo-reg3           	Evdda_1v2_s0          	T         	h        	z O        	 O             regulator-state-mem          	         pldo-reg4           	Evcca_3v3_s0          	T         	h        	z 2Z        	 2Z        	  0             regulator-state-mem          	         pldo-reg5           	Evccio_sd_s0          	T         	h        	z w@        	 2Z        	  0              regulator-state-mem          	         pldo-reg6         	  	Epldo6_s3             	T         	h        	z w@        	 w@             regulator-state-mem          T        8 w@         nldo-reg1           	Evdd_0v75_s3          	T         	h        	z q        	 q             regulator-state-mem          T        8 q         nldo-reg2           	Evdda_ddr_pll_s0          	T         	h        	z P        	 P             regulator-state-mem          	        8 P         nldo-reg3           	Evdda_0v75_s0             	T         	h        	z q        	 q             regulator-state-mem          	         nldo-reg4           	Evdda_0v85_s0             	T         	h        	z P        	 P             regulator-state-mem          	         nldo-reg5           	Evdd_0v75_s0          	T         	h        	z q        	 q             regulator-state-mem          	                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      I               E   !      !           spiclk apb_pclk            r      r           tx rx           
                             
default                      +          	  disabled                    serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      L               E   !      !           baudclk apb_pclk               0      0   	        tx rx                       
default         1           '         	  disabled                    serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      M               E   !      !           baudclk apb_pclk               0   
   0           tx rx                       
default         1           '           okay                    serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      N               E   !      !           baudclk apb_pclk               0      0           tx rx                       
default         1           '         	  disabled                    serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      O               E   !      !           baudclk apb_pclk               r   	   r   
        tx rx                       
default         1           '           okay                    serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      P               E   !      !           baudclk apb_pclk               r      r           tx rx                       
default         1           '           okay            l                          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      Q               E   !      !           baudclk apb_pclk               r      r           tx rx                       
default         1           '         	  disabled                    serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      R               E   !      !           baudclk apb_pclk               s      s           tx rx                       
default         1           '         	  disabled                    serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      S               E   !      !           baudclk apb_pclk               s   	   s   
        tx rx                       
default         1           '         	  disabled                    serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                 "      T               E   !      !           baudclk apb_pclk               s      s           tx rx                       
default         1           '         	  disabled                    pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   L   !   K      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   O   !   N      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm               0               E   !   R   !   Q      	  pwm pclk                        
default         >         	  disabled                    thermal-zones                package-thermal         v                                            trips      package-crit             8                  	  critical                          bigcore0-thermal            v   d                                       trips      bigcore0-alert           L                  passive                  bigcore0-crit            8                  	  critical                       cooling-maps       map0                                         bigcore2-thermal            v   d                                       trips      bigcore2-alert           L                  passive                  bigcore2-crit            8                  	  critical                       cooling-maps       map0                             	            littlecore-thermal          v   d                                       trips      littlecore-alert             L                  passive                  littlecore-crit          8                  	  critical                       cooling-maps       map0                     0                          center-thermal          v                                           trips      center-crit          8                  	  critical                          gpu-thermal         v   d                                       trips      gpu-alert            L                  passive                  gpu-crit             8                  	  critical                       cooling-maps       map0                                      npu-thermal         v                                           trips      npu-crit             8                  	  critical                             tsadc@fec00000            rockchip,rk3588-tsadc                                 "                     E   !      !           tsadc apb_pclk             !                       !   V   !   W        tsadc-apb tsadc                                                                 
default sleep           (           okay                     adc@fec10000              rockchip,rk3588-saradc                                "                     >           E   !      !           saradc apb_pclk            !   U        saradc-apb          okay            P                   i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      C                           
default                      +            okay            -              fan@18            tsd,mule ti,amc6821                i2c-mux           tsd,mule-i2c-mux                         +       i2c@0                                     +                 rtc@6f            isil,isl1208                o                            i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      D                           
default                      +            okay                 regulator@42              rockchip,rk8602             B        	(           	Evdd_cpu_big0_s0          	T         	h        	z dp        	         	          	                 regulator-state-mem          	         regulator@43               rockchip,rk8603 rockchip,rk8602             C        	(           	Evdd_cpu_big1_s0          	T         	h        	z dp        	         	          	                 regulator-state-mem          	            i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                               E   !      !         	  i2c pclk            "      E                           
default                      +            okay                    spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                               "      J               E   !      !           spiclk apb_pclk            s      s           tx rx           
                             
default                      +          	  disabled                    efuse@fecc0000            rockchip,rk3588-otp                                E   !      !      !      !           otp apb_pclk phy arb               !      !      !           otp apb arb                      +                cpu-code@2                                 id@7                                   cpu-leakage@17                                 cpu-leakage@18                                 cpu-leakage@19                                 log-leakage@1a                                 gpu-leakage@1b                                 cpu-version@1c                         \                      npu-leakage@28              (                   codec-leakage@29                )                      dma-controller@fed10000           arm,pl330 arm,primecell                      @          "       Z              [                        E   !   p      	  apb_pclk            		              s      phy@fed60000              rockchip,rk3588-hdptx-phy                                  E   !     !  T        ref apb                               8     !  #   !     !  c   !  d   !  e   !  !   !  "      "  phy apb init cmn lane ropll lcpll                      okay               j      phy@fed80000              rockchip,rk3588-usbdp-phy                                            E   !     !  l   !  V           refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb           a           t                                 okay               &      phy@feda0000              rockchip,rk3588-mipi-dcphy                                           E   !      !        	  pclk ref                !  i   !      !      !  j        m_phy apb grf s_phy                  	  disabled               t      phy@fedb0000              rockchip,rk3588-mipi-dcphy                                           E   !      !        	  pclk ref                !  k   !      !      !  l        m_phy apb grf s_phy                  	  disabled               u      phy@fee00000              rockchip,rk3588-naneng-combphy                                E   !     !  v   !  W        ref apb pipe               !                                 !  <   !  C        phy apb            .                 	  disabled                     phy@fee20000              rockchip,rk3588-naneng-combphy                                E   !     !  x   !  W        ref apb pipe               !                                 !  >   !  E        phy apb            .                   okay               ,      sram@ff001000         
    mmio-sram                                `                                 +                   pinctrl           rockchip,rk3588-pinctrl          `                                +                 gpio@fd8a0000             rockchip,gpio-bank                                "                     E   !  q   !  r         
                                r        
                               gpio@fec20000             rockchip,gpio-bank                                "                     E   !   s   !   t         
                                r        
                        .      gpio@fec30000             rockchip,gpio-bank                                "                     E   !   u   !   v         
                  @             r        
                        +      gpio@fec40000             rockchip,gpio-bank                                "                     E   !   w   !   x         
                  `             r        
                               gpio@fec50000             rockchip,gpio-bank                                "                     E   !   y   !   z         
                               r        
                        #      pcfg-pull-up                             pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-drv-level-0                                       pcfg-pull-none-drv-level-1                                      pcfg-pull-none-drv-level-2                                      pcfg-pull-none-drv-level-3                                      pcfg-pull-none-drv-level-4                                      pcfg-pull-none-drv-level-5                                      pcfg-pull-none-drv-level-6                                      pcfg-pull-none-drv-level-7                                      pcfg-pull-none-drv-level-8                                      pcfg-pull-none-drv-level-9                      	                pcfg-pull-none-drv-level-10                     
                pcfg-pull-none-drv-level-11                                     pcfg-pull-none-drv-level-12                                     pcfg-pull-none-drv-level-13                                     pcfg-pull-none-drv-level-14                                     pcfg-pull-none-drv-level-15                                     pcfg-pull-up-drv-level-0                                         pcfg-pull-up-drv-level-1                                        pcfg-pull-up-drv-level-2                                         pcfg-pull-up-drv-level-3                                        pcfg-pull-up-drv-level-4                                        pcfg-pull-up-drv-level-5                                        pcfg-pull-up-drv-level-6                                        pcfg-pull-up-drv-level-7                                        pcfg-pull-up-drv-level-8                                        pcfg-pull-up-drv-level-9                        	                pcfg-pull-up-drv-level-10                       
                pcfg-pull-up-drv-level-11                                       pcfg-pull-up-drv-level-12                                       pcfg-pull-up-drv-level-13                                       pcfg-pull-up-drv-level-14                                       pcfg-pull-up-drv-level-15                                       pcfg-pull-down-drv-level-0                                       pcfg-pull-down-drv-level-1                                      pcfg-pull-down-drv-level-2                                      pcfg-pull-down-drv-level-3                                      pcfg-pull-down-drv-level-4                                      pcfg-pull-down-drv-level-5                                      pcfg-pull-down-drv-level-6                                      pcfg-pull-down-drv-level-7                                      pcfg-pull-down-drv-level-8                                      pcfg-pull-down-drv-level-9                      	                pcfg-pull-down-drv-level-10                     
                pcfg-pull-down-drv-level-11                                     pcfg-pull-down-drv-level-12                                     pcfg-pull-down-drv-level-13                                     pcfg-pull-down-drv-level-14                                     pcfg-pull-down-drv-level-15                                     pcfg-pull-up-smt                                      pcfg-pull-down-smt                                    pcfg-pull-none-smt                                    pcfg-pull-none-drv-level-0-smt                                                pcfg-pull-none-drv-level-1-smt                                                pcfg-pull-none-drv-level-2-smt                                               pcfg-pull-none-drv-level-3-smt                                               pcfg-pull-none-drv-level-4-smt                                               pcfg-pull-none-drv-level-5-smt                                                pcfg-output-high                             pcfg-output-low          (                auddsm     auddsm-pins       @  3                                                                    bt1120     bt1120-pins        3                                                                                                                   
                                                                                                             can0       can0m0-pins          3                                          can0m1-pins          3         	            	                      can1       can1m0-pins          3         	            	                   can1m1-pins          3      
                                     can2       can2m0-pins          3         	            	                   can2m1-pins          3          
             
                      cif    cif-clk         3                            cif-dvp-clk       0  3                  
                            	      cif-dvp-bus16           3                                                                                                          
      cif-dvp-bus8            3                                                                                                                    clk32k     clk32k-in           3       
                      clk32k-out0         3       
                      clk32k-out1         3                               cpu    cpu-pins             3                                             ddrphych0      ddrphych0-pins        @  3                                                                    ddrphych1      ddrphych1-pins        @  3                                                                   ddrphych2      ddrphych2-pins        @  3                  	            
                                     ddrphych3      ddrphych3-pins        @  3                                                                   dp0    dp0m0-pins          3                            dp0m1-pins          3          
                   dp0m2-pins          3                                dp1    dp1m0-pins          3                            dp1m1-pins          3          
                   dp1m2-pins          3                               emmc       emmc-rstnout            3                            emmc-bus8           3                                                                                                                 emmc-clk            3                             emmc-cmd            3                              emmc-data-strobe            3                             emmc-reset          3                       *         eth1       eth1-pins           3                               fspi       fspim0-pins       `  3                                                                                         fspim0-cs1          3                            fspim2-pins       `  3                                                                                         fspim2-cs1          3                            fspim1-pins       `  3                                                                  	                       fspim1-cs1          3                      !         gmac1      gmac1-miim           3                                  "      gmac1-clkinout          3                      #      gmac1-rx-bus2         0  3                              	                $      gmac1-tx-bus2         0  3                                              %      gmac1-rgmii-clk          3                                  &      gmac1-rgmii-bus       @  3                                                           '      gmac1-ppsclk            3                      (      gmac1-ppstrig           3                      )      gmac1-ptp-ref-clk           3                      *      gmac1-txer          3      
                +         gpu    gpu-pins            3                       ,         hdmi       hdmim0-rx-cec           3                      -      hdmim0-rx-hpdin         3                      .      hdmim0-rx-scl           3                       /      hdmim0-rx-sda           3                       0      hdmim0-tx0-cec          3                      1      hdmim0-tx0-hpd          3                       v      hdmim0-tx0-scl          3                      2      hdmim0-tx0-sda          3                      3      hdmim0-tx1-hpd          3                            hdmim1-rx-cec           3                      4      hdmim1-rx-hpdin         3                      5      hdmim1-rx-scl           3                      6      hdmim1-rx-sda           3                      7      hdmim1-tx0-cec          3                       8      hdmim1-tx0-hpd          3                      9      hdmim1-tx0-scl          3                        w      hdmim1-tx0-sda          3                        x      hdmim1-tx1-cec          3                       :      hdmim1-tx1-hpd          3                      ;      hdmim1-tx1-scl          3                            hdmim1-tx1-sda          3                            hdmim2-rx-cec           3                      <      hdmim2-rx-hpdin         3                      =      hdmim2-rx-scl           3                      >      hdmim2-rx-sda           3                      ?      hdmim2-tx0-scl          3                      @      hdmim2-tx0-sda          3                      A      hdmim2-tx1-cec          3                            hdmim2-tx1-scl          3                      B      hdmim2-tx1-sda          3                      C      hdmi-debug0         3                      D      hdmi-debug1         3                      E      hdmi-debug2         3      	                F      hdmi-debug3         3      
                G      hdmi-debug4         3                      H      hdmi-debug5         3                      I      hdmi-debug6         3                       J      hdmim0-tx1-cec          3                      K      hdmim0-tx1-scl          3                     L      hdmim0-tx1-sda          3                      M         i2c0       i2c0m0-xfer          3                                   /      i2c0m2-xfer          3                                  N      i2c0m1-xfer          3         	           	            O         i2c1       i2c1m0-xfer          3          	            	                   i2c1m1-xfer          3                   	               P      i2c1m2-xfer          3          	            	            Q      i2c1m3-xfer          3         	           	            R      i2c1m4-xfer          3         	           	            S         i2c2       i2c2m0-xfer          3          	            	            T      i2c2m2-xfer          3         	           	            U      i2c2m3-xfer          3         	           	                   i2c2m4-xfer          3         	            	            V      i2c2m1-xfer          3         	           	            W         i2c3       i2c3m0-xfer          3         	           	                   i2c3m1-xfer          3         	           	            X      i2c3m2-xfer          3         	           	            Y      i2c3m4-xfer          3         	           	            Z      i2c3m3-xfer          3      
   	           	            [         i2c4       i2c4m0-xfer          3         	           	            \      i2c4m2-xfer          3          	            	            ]      i2c4m3-xfer          3         	           	            ^      i2c4m4-xfer          3         	           	                   i2c4m1-xfer          3         	           	            _         i2c5       i2c5m0-xfer          3         	           	            `      i2c5m1-xfer          3         	           	                   i2c5m2-xfer          3         	           	            a      i2c5m3-xfer          3         	           	            b      i2c5m4-xfer          3         	           	            c         i2c6       i2c6m0-xfer          3          	            	                   i2c6m1-xfer          3         	           	            d      i2c6m3-xfer          3      	   	           	            e      i2c6m4-xfer          3         	            	            f      i2c6m2-xfer          3         	           	            g         i2c7       i2c7m0-xfer          3         	           	                   i2c7m2-xfer          3         	           	            h      i2c7m3-xfer          3      
   	           	            i      i2c7m1-xfer          3         	           	            j         i2c8       i2c8m0-xfer          3         	           	            k      i2c8m2-xfer          3         	           	                   i2c8m3-xfer          3         	           	            l      i2c8m4-xfer          3         	           	            m      i2c8m1-xfer          3         	        	   	            n         i2s0       i2s0-lrck           3                             i2s0-mclk           3                      o      i2s0-sclk           3                             i2s0-sdi0           3                             i2s0-sdi1           3                             i2s0-sdi2           3                             i2s0-sdi3           3                             i2s0-sdo0           3                             i2s0-sdo1           3                             i2s0-sdo2           3                             i2s0-sdo3           3                                i2s1       i2s1m0-lrck         3                             i2s1m0-mclk         3                       p      i2s1m0-sclk         3                             i2s1m0-sdi0         3                             i2s1m0-sdi1         3                             i2s1m0-sdi2         3                             i2s1m0-sdi3         3                             i2s1m0-sdo0         3      	                       i2s1m0-sdo1         3      
                       i2s1m0-sdo2         3                             i2s1m0-sdo3         3                             i2s1m1-lrck         3                       q      i2s1m1-mclk         3                       r      i2s1m1-sclk         3                       s      i2s1m1-sdi0         3                       t      i2s1m1-sdi1         3                       u      i2s1m1-sdi2         3                       v      i2s1m1-sdi3         3                       w      i2s1m1-sdo0         3                       x      i2s1m1-sdo1         3                       y      i2s1m1-sdo2         3                       z      i2s1m1-sdo3         3                       {         i2s2       i2s2m0-lrck         3                      |      i2s2m0-mclk         3                      }      i2s2m0-sclk         3                      ~      i2s2m0-sdi          3                            i2s2m0-sdo          3                            i2s2m1-lrck         3                             i2s2m1-mclk         3                            i2s2m1-sclk         3                             i2s2m1-sdi          3      
                       i2s2m1-sdo          3                                i2s3       i2s3-lrck           3                             i2s3-mclk           3                             i2s3-sclk           3                             i2s3-sdi            3                             i2s3-sdo            3                                jtag       jtagm0-pins          3                                        jtagm1-pins          3                                        jtagm2-pins          3                                             litcpu     litcpu-pins         3                                mcu    mcum0-pins           3                                        mcum1-pins           3                                           mipi       mipim0-camera0-clk          3      	                      mipim0-camera1-clk          3                            mipim0-camera2-clk          3                            mipim0-camera3-clk          3                            mipim0-camera4-clk          3                            mipim1-camera0-clk          3                            mipim1-camera1-clk          3                            mipim1-camera2-clk          3                            mipim1-camera3-clk          3                            mipim1-camera4-clk          3      	                      mipi-te0            3                            mipi-te1            3                               npu    npu-pins            3                                pcie20x1       pcie20x1m0-clkreqn          3                            pcie20x1m0-perstn           3                            pcie20x1m0-waken            3                            pcie20x1m1-clkreqn          3                            pcie20x1m1-perstn           3                            pcie20x1m1-waken            3                            pcie20x1-2-button-rstn          3                               pcie30phy      pcie30phy-pins           3                                           pcie30x1       pcie30x1m0-0-clkreqn            3                             pcie30x1m0-0-perstn         3                             pcie30x1m0-0-waken          3                             pcie30x1m0-1-clkreqn            3                             pcie30x1m0-1-perstn         3                             pcie30x1m0-1-waken          3                             pcie30x1m1-0-clkreqn            3                            pcie30x1m1-0-perstn         3                            pcie30x1m1-0-waken          3                            pcie30x1m1-1-clkreqn            3                             pcie30x1m1-1-perstn         3                            pcie30x1m1-1-waken          3                            pcie30x1m2-0-clkreqn            3                            pcie30x1m2-0-perstn         3                            pcie30x1m2-0-waken          3                            pcie30x1m2-1-clkreqn            3                             pcie30x1m2-1-perstn         3                            pcie30x1m2-1-waken          3                            pcie30x1-0-button-rstn          3      	                      pcie30x1-1-button-rstn          3      
                         pcie30x2       pcie30x2m0-clkreqn          3                             pcie30x2m0-perstn           3                             pcie30x2m0-waken            3                             pcie30x2m1-clkreqn          3                            pcie30x2m1-perstn           3                            pcie30x2m1-waken            3                            pcie30x2m2-clkreqn          3                            pcie30x2m2-perstn           3                            pcie30x2m2-waken            3                            pcie30x2m3-clkreqn          3                            pcie30x2m3-perstn           3                            pcie30x2m3-waken            3                            pcie30x2-button-rstn            3                               pcie30x4       pcie30x4m0-clkreqn          3                             pcie30x4m0-perstn           3                             pcie30x4m0-waken            3                             pcie30x4m1-clkreqn          3                            pcie30x4m1-perstn           3                            pcie30x4m1-waken            3                            pcie30x4m2-clkreqn          3                            pcie30x4m2-perstn           3                            pcie30x4m2-waken            3                            pcie30x4m3-clkreqn          3                            pcie30x4m3-perstn           3      
                      pcie30x4m3-waken            3      	                      pcie30x4-button-rstn            3                               pdm0       pdm0m0-clk          3                            pdm0m0-clk1         3                            pdm0m0-sdi0         3                            pdm0m0-sdi1         3                            pdm0m0-sdi2         3                            pdm0m0-sdi3         3                            pdm0m1-clk          3                             pdm0m1-clk1         3                             pdm0m1-sdi0         3                             pdm0m1-sdi1         3                             pdm0m1-sdi2         3                             pdm0m1-sdi3         3                                pdm1       pdm1m0-clk          3                            pdm1m0-clk1         3                            pdm1m0-sdi0         3                            pdm1m0-sdi1         3                            pdm1m0-sdi2         3                            pdm1m0-sdi3         3                            pdm1m1-clk          3                            pdm1m1-clk1         3                            pdm1m1-sdi0         3                            pdm1m1-sdi1         3                            pdm1m1-sdi2         3      	                      pdm1m1-sdi3         3      
                         pmic       pmic-pins         p  3                                                                                                               pmu    pmu-pins            3                                pwm0       pwm0m0-pins         3                             pwm0m1-pins         3                       2      pwm0m2-pins         3                               pwm1       pwm1m0-pins         3                        3      pwm1m1-pins         3                            pwm1m2-pins         3                               pwm2       pwm2m0-pins         3                        4      pwm2m1-pins         3      	                      pwm2m2-pins         3                               pwm3       pwm3m0-pins         3                        5      pwm3m1-pins         3      
                      pwm3m2-pins         3                            pwm3m3-pins         3                               pwm4       pwm4m0-pins         3                              pwm4m1-pins         3                               pwm5       pwm5m0-pins         3       	                       pwm5m1-pins         3                             pwm5m2-pins         3                               pwm6       pwm6m0-pins         3                              pwm6m1-pins         3                            pwm6m2-pins         3                               pwm7       pwm7m0-pins         3                              pwm7m1-pins         3                            pwm7m2-pins         3                            pwm7m3-pins         3                               pwm8       pwm8m0-pins         3                             pwm8m1-pins         3                            pwm8m2-pins         3                               pwm9       pwm9m0-pins         3                             pwm9m1-pins         3                            pwm9m2-pins         3                               pwm10      pwm10m0-pins            3                              pwm10m1-pins            3                            pwm10m2-pins            3                               pwm11      pwm11m0-pins            3                             pwm11m1-pins            3                            pwm11m2-pins            3                            pwm11m3-pins            3                               pwm12      pwm12m0-pins            3                             pwm12m1-pins            3                               pwm13      pwm13m0-pins            3                             pwm13m1-pins            3                             pwm13m2-pins            3                               pwm14      pwm14m0-pins            3                             pwm14m1-pins            3      
                      pwm14m2-pins            3                               pwm15      pwm15m0-pins            3                             pwm15m1-pins            3                            pwm15m2-pins            3                            pwm15m3-pins            3                               refclk     refclk-pins         3                                 sata       sata-pins         0  3                                                          sata0      sata0m0-pins            3                      	      sata0m1-pins            3                      
         sata1      sata1m0-pins            3                            sata1m1-pins            3                               sata2      sata2m0-pins            3      	                      sata2m1-pins            3                               sdio       sdiom1-pins       `  3                                                                                     sdiom0-pins       `  3                  
                                                	                         sdmmc      sdmmc-bus4        @  3                                                                 sdmmc-clk           3                             sdmmc-cmd           3                             sdmmc-det           3                            sdmmc-pwren         3                                spdif0     spdif0m0-tx         3                             spdif0m1-tx         3                               spdif1     spdif1m0-tx         3                             spdif1m1-tx         3      	                      spdif1m2-tx         3                               spi0       spi0m0-pins       0  3                                                    spi0m0-cs0          3                            spi0m0-cs1          3                            spi0m1-pins       0  3                                                  spi0m1-cs0          3      
                      spi0m1-cs1          3      	                      spi0m2-pins       0  3                 	           
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             d         uart8      uart8m0-xfer             3      	   
           
            e      uart8m0-ctsn            3         
             f      uart8m0-rtsn            3      
   
             g      uart8m1-xfer             3         
           
                   uart8m1-ctsn            3         
             h      uart8m1-rtsn            3         
             i      uart8-xfer          3      	   
            j         uart9      uart9m0-xfer             3         
           
            k      uart9m1-xfer             3         
           
                   uart9m1-ctsn            3         
             l      uart9m1-rtsn            3          
             m      uart9m2-xfer             3         
           
            n      uart9m2-ctsn            3         
             o      uart9m2-rtsn            3         
             p      uart9m0-ctsn            3         
             q      uart9m0-rtsn            3         
             r         vop    vop-pins            3                      s         bt656      bt656-pins          3                                                                                                              t         gpio-func      tsadc-gpio-func         3                                  eth0       eth0-pins           3                      !         gmac0      gmac0-miim           3                                        gmac0-clkinout          3                      u      gmac0-rx-bus2         0  3                                                    gmac0-tx-bus2         0  3                                                    gmac0-rgmii-clk          3                                        gmac0-rgmii-bus       @  3                              	            
                       gmac0-ppsclk            3                      v      gmac0-ppstring          3                      w      gmac0-ptp-refclk            3                      x      gmac0-txer          3                      y         ethernet       eth-reset           3                       "         leds       module-led-pin          3                       -         usb3       usb3-id         3                       ,         haikou     haikou-keys-pin       @  3                                                          1         usb2       otg-vbus-drv            3                       8            hdmi1-sound           simple-audio-card           i2s                    hdmi1         	  disabled              z   simple-audio-card,codec                 simple-audio-card,cpu                      usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3               @       @          "                      E   !     !     !          ref_clk suspend_clk bus_clk         host              	  
           usb2-phy usb3-phy         
  utmi_wide              "              !  S                  ?         `                 okay              {      syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                 [                  )      syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon              \                   (      syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon              \       @           '      syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd                ]@       @                      +             &   usb2phy@4000              rockchip,rk3588-usb2phy            @                        E   !          phyclk          =usb480m_phy1            "                        !  n   !          phy apb         okay              %   otg-port                        okay              	            syscon@fd5e4000       $    rockchip,rk3588-hdptxphy-grf syscon              ^@                  $      spdif-tx@fddb8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              ۀ                   !              !        
  mclk hclk           E   !     !          tx             r           "                         "                     	  disabled              |      i2s@fddc8000              rockchip,rk3588-i2s-tdm              ܀                "                      E   !     !     !          mclk_tx mclk_rx hclk               !             !              s           tx             "              !          tx-m                      	  disabled              }      spdif-tx@fdde8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif              ހ                   !              !  F      
  mclk hclk           E   !  I   !  E        tx             r           "                         "                     	  disabled              ~      i2s@fddf4000              rockchip,rk3588-i2s-tdm              @                "                      E   !  9   !  9   !  ?        mclk_tx mclk_rx hclk               !  6           !              s           tx             "              !          tx-m                      	  disabled                    i2s@fddf8000              rockchip,rk3588-i2s-tdm              ߀                "                      E   !  +   !  +   !  '        mclk_tx mclk_rx hclk               !  (           !              s           rx             "              !          rx-m                      	  disabled                    i2s@fde00000              rockchip,rk3588-i2s-tdm                               "                      E   !  &   !  &   !  "        mclk_tx mclk_rx hclk               !  #           !              s           rx             "              !          rx-m                      	  disabled                    hdmi@fdea0000             rockchip,rk3588-dw-hdmi-qp                              0  E   !     !     !     !  9   !  S   !          pclk earc ref aud hdp hclk_vo1        P  "                                                              i               Pavp cec earc main hpd              k        
default                             "              !     !  1        ref hdp            m           o                  	  disabled                 ports                        +       port@0                               port@1                                    edp@fded0000              rockchip,rk3588-edp                               E   !     !          dp pclk         "                         k        dp             "              !     !          dp apb             o      	  disabled                 ports                        +       port@0                               port@1                                    hdmi_receiver@fdee0000        .    rockchip,rk3588-hdmirx-ctrler snps,dw-hdmi-rx                        `       0  "                                                  Pcec hdmi dma          8  E   !  	   !     !     !  
   !     !  !   !        3  aclk audio cr_para pclk ref hclk_s_hdmirx hclk_vo1          A             "               !     !     !     !          axi apb ref biu            m           o      	  disabled                    pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        4  E   !  @   !  E   !  ;   !  J   !  O   !  t        -  aclk_mst aclk_slv aclk_dbi pclk aux pipe ref            pci       P  "                                                                         Psys pmc msg legacy err                                          `  (                                                                                         6            G           V                     ^       ~               h                   	  pcie-phy               "   "      T  `                                                     @      	        @         0      
@        @                                     ydbi apb config             !  &   !  +      	  pwr pipe            okay            O                  [                legacy-interrupt-controller          r                                            "                                pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P      
@             
@                         	        @      
@0                 ydbi dbi2 apb addr_space atu       0  E   !  @   !  E   !  ;   !  J   !  O   !  t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            "                                                                                                                           +  Psys pmc msg legacy err dma0 dma1 dma2 dma3          G           h                   	  pcie-phy               "   "           !  &   !  +      	  pwr pipe          	  disabled                    pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  E   !  A   !  F   !  <   !  K   !  P   !  u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                            Psys pmc msg legacy err                                          `  (                                                                                         6           G           V                   ^      ~              h                   	  pcie-phy               "   "      T  `                                                     @      	@       @         0      
@@       @                                     ydbi apb config             !  '   !  ,      	  pwr pipe          	  disabled                 legacy-interrupt-controller          r                                            "                                 pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  E   !  B   !  G   !  =   !  L   !  Q   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P  "                                                                              Psys pmc msg legacy err                                          `  (                                                                                         6           G           V       }               ^       ~               h                      	  pcie-phy               "   "      T  `                                                     @      	       @         0      
@       @                                     ydbi apb config             !  (   !  -      	  pwr pipe                         +         	  disabled                 legacy-interrupt-controller          r                                            "                                 ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                  "                                    Pmacirq eth_wake_irq       (  E   !  6   !  7   !  X   !  ]   !  4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  #      
  stmmaceth              m           .                                                        okay            koutput          x          rgmii                     
default                       !  "                                #                             '              mdio              snps,dwmac-mdio                      +                 ethernet-phy@6            ethernet-phy-ieee802.3-c22                      E   !                      stmmac-axi-config                                                                          rx-queues-config                            queue0        queue1           tx-queues-config            (                queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci               "                 "                   (  E   !  c   !  `   !  f   !  U   !  p        sata pmalive rxoob ref asic         >                        +          	  disabled                 sata-port@0                      P @                     	  sata-phy            ]            l             phy@fed70000              rockchip,rk3588-hdptx-phy                                  E   !     !  U        ref apb                               8     !  &   !     !  f   !  g   !  h   !  $   !  %      "  phy apb init cmn lane ropll lcpll             $      	  disabled               k      phy@fed90000              rockchip,rk3588-usbdp-phy                                            E   !     !  m   !  W  %        refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb           a  &        t             '                   okay              
      phy@fee10000              rockchip,rk3588-naneng-combphy                                E   !     !  w   !  W        ref apb pipe               !                                 !  =   !  D        phy apb            .          (      	  disabled                    phy@fee80000              rockchip,rk3588-pcie3-phy                                             E   !  y        pclk               !  H        phy            .          )        okay                    opp-table-cluster0            operating-points-v2                        opp-1008000000              <          
L 
L ~        
  @      opp-1200000000              G          
4 
4 ~        
  @      opp-1416000000              Tfr            ~        
  @               opp-1608000000              _"          P P ~        
  @      opp-1800000000              kI          ~ ~ ~        
  @         opp-table-cluster1            operating-points-v2                        opp-1200000000              G          
L 
L B@        
  @      opp-1416000000              Tfr            B@        
  @      opp-1608000000              _"            B@        
  @      opp-1800000000              kI          P P B@        
  @      opp-2016000000              x)          H H B@        
  @      opp-2208000000              h          l l B@        
  @      opp-2400000000                        B@ B@ B@        
  @         opp-table-cluster2            operating-points-v2                        opp-1200000000              G          
L 
L B@        
  @      opp-1416000000              Tfr            B@        
  @      opp-1608000000              _"            B@        
  @      opp-1800000000              kI          P P B@        
  @      opp-2016000000              x)          H H B@        
  @      opp-2208000000              h          l l B@        
  @      opp-2400000000                        B@ B@ B@        
  @         opp-table             operating-points-v2            #   opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         emmc-pwrseq           mmc-pwrseq-emmc            *        
default         O  +                        extcon-usb3           linux,extcon-usb-gpio           '                  
default            ,        okay               '      leds          
    gpio-leds           
default            -   led-1             .             
  heartbeat         
  0heartbeat           F            pcie-refclk-gen-clock             fixed-clock                     -           /      pcie-refclk-clock             gpio-gate-clock         E  /                    L  #                       regulator-vcc-1v1-nldo-s3             regulator-fixed         	Evcc_1v1_nldo_s3          	T         	h        	z         	         	                    regulator-vcc-1v2-s3              regulator-fixed         	Evcc_1v2_s3           	T         	h        	z O        	 O        	                   regulator-vcc5v0-sys              regulator-fixed         	Evcc5v0_sys           	T         	h        	z LK@        	 LK@        	  0                 chosen          Yserial2:115200n8          regulator-dc-12v              regulator-fixed         	Edc_12v           	T         	h        	z          	            6      gpio-keys         
    gpio-keys           
default            1   button-batlow-n         eBATLOW#         k                          button-slp-btn-n          	  eSLP_BTN#            k             #            button-wake-n           eWAKE#           k                             v      switch-lid-btn-n          	  eLID_BTN#            k                                         hdmi-con              hdmi-connector          a      port       endpoint              2           z            i2s3-sound            simple-audio-card           i2s         Haikou,I2S-codec                         3          3   simple-audio-card,codec           4          3      simple-audio-card,cpu             5         sgtl5000-oscillator           fixed-clock                     -w                   regulator-vcc3v3-baseboard            regulator-fixed         	Evcc3v3_baseboard             	T         	h        	z 2Z        	 2Z        	  6                 regulator-vcc3v3-low-noise            regulator-fixed         	Evcc3v3_low_noise             	h        	z 2Z        	 2Z        	  7                 regulator-vcc5v0-baseboard            regulator-fixed         	Evcc5v0_baseboard             	T         	h        	z LK@        	 LK@        	  6          0      regulator-vcc5v0-otg              regulator-fixed                    .               
default            8        	Evcc5v0_otg           	T           -      regulator-vcc5v0-usb              regulator-fixed         	Evcc5v0_usb           	T         	h        	z LK@        	 LK@        	  6          7      regulator-vddd-audio-1v6              regulator-fixed         	Evddd_audio_1v6           	h        	z j         	 j         	  7                 __symbols__         /cpus/cpu@0         /cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           /cpus/cpu@400           /cpus/cpu@500           /cpus/cpu@600           /cpus/cpu@700           !/cpus/idle-states/cpu-sleep         +/cpus/l2-cache-l0           7/cpus/l2-cache-l1           C/cpus/l2-cache-l2           O/cpus/l2-cache-l3           [/cpus/l2-cache-b0           g/cpus/l2-cache-b1           s/cpus/l2-cache-b2           /cpus/l2-cache-b3         
  /l3-cache           /display-subsystem          /firmware/scmi          /firmware/scmi/protocol@14          /firmware/scmi/protocol@16          /hdmi0-sound          	  /clock-0          	  /clock-1          	  /clock-2            /reserved-memory/shmem@10f000         #  /reserved-memory/hdmi-receiver-cma          /gpu@fb000000           /usb@fc000000           /usb@fc800000           /usb@fc840000           ,/usb@fc880000           ;/usb@fc8c0000           J/usb@fcd00000           Y/iommu@fc900000         e/iommu@fcb00000         p/syscon@fd58a000            x/syscon@fd58c000            /syscon@fd5e8000            /syscon@fd5ec000            /syscon@fd5a4000            /syscon@fd5a6000            /syscon@fd5a8000            /syscon@fd5ac000            /syscon@fd5b0000            /syscon@fd5bc000            /syscon@fd5c4000            /syscon@fd5c8000            /syscon@fd5d0000            /syscon@fd5d0000/usb2phy@0        $  /syscon@fd5d0000/usb2phy@0/otg-port         /syscon@fd5d8000            /syscon@fd5d8000/usb2phy@8000         (  #/syscon@fd5d8000/usb2phy@8000/host-port         //syscon@fd5dc000            </syscon@fd5dc000/usb2phy@c000         (  C/syscon@fd5dc000/usb2phy@c000/host-port         O/syscon@fd5e0000            ]/syscon@fd5f0000            a/sram@fd600000          n/clock-controller@fd7c0000           [/i2c@fd880000           r/serial@fd890000            x/pwm@fd8b0000           }/pwm@fd8b0010           /pwm@fd8b0020           /pwm@fd8b0030           /power-management@fd8d8000        ,  /power-management@fd8d8000/power-controller       <  /power-management@fd8d8000/power-controller/power-domain@12         /video-codec@fdb50000           /iommu@fdb50800         /rga@fdb80000           /video-codec@fdba0000           /iommu@fdba0800         /video-codec@fdba4000           /iommu@fdba4800         /video-codec@fdba8000           /iommu@fdba8800         /video-codec@fdbac000           /iommu@fdbac800         /video-codec@fdc70000           /vop@fdd90000           /vop@fdd90000/ports          /vop@fdd90000/ports/port@0        &  $/vop@fdd90000/ports/port@0/endpoint@2           2/vop@fdd90000/ports/port@1          6/vop@fdd90000/ports/port@2          :/vop@fdd90000/ports/port@3          >/iommu@fdd97e00         F/spdif-tx@fddb0000          P/i2s@fddc0000           Y/spdif-tx@fdde0000          c/i2s@fddf0000           l/i2s@fddfc000           u/dsi@fde20000           z/dsi@fde20000/ports/port@0          /dsi@fde20000/ports/port@1          /dsi@fde30000           /dsi@fde30000/ports/port@0          /dsi@fde30000/ports/port@1          ,/hdmi@fde80000          /hdmi@fde80000/ports/port@0       %  /hdmi@fde80000/ports/port@0/endpoint            /hdmi@fde80000/ports/port@1       %  /hdmi@fde80000/ports/port@1/endpoint            /edp@fdec0000           /edp@fdec0000/ports/port@0          /edp@fdec0000/ports/port@1          /qos@fdf35000           /qos@fdf35200           /qos@fdf35400           /qos@fdf35600           /qos@fdf36000           /qos@fdf39000           %/qos@fdf3d800           //qos@fdf3e000           :/qos@fdf3e200           E/qos@fdf3e400           T/qos@fdf3e600           c/qos@fdf40000           p/qos@fdf40200           }/qos@fdf40400           /qos@fdf40500           /qos@fdf40600           /qos@fdf40800           /qos@fdf41000           /qos@fdf41100           /qos@fdf60000           /qos@fdf60200           /qos@fdf60400           /qos@fdf61000           /qos@fdf61200            /qos@fdf61400           1/qos@fdf62000           =/qos@fdf63000           I/qos@fdf64000           Q/qos@fdf66000           Y/qos@fdf66200           f/qos@fdf66400           t/qos@fdf66600           /qos@fdf66800           /qos@fdf66a00           /qos@fdf66c00           /qos@fdf66e00           /qos@fdf67000           /qos@fdf67200           /qos@fdf70000           /qos@fdf71000           /qos@fdf72000           /qos@fdf72200           /qos@fdf72400           /qos@fdf80000           /qos@fdf81000           /qos@fdf81200           #/qos@fdf82000           ./qos@fdf82200           9/dfi@fe060000           =/pcie@fe180000        +  G/pcie@fe180000/legacy-interrupt-controller          V/pcie@fe190000        +  `/pcie@fe190000/legacy-interrupt-controller          o/ethernet@fe1c0000          u/ethernet@fe1c0000/mdio       %  {/ethernet@fe1c0000/stmmac-axi-config          $  /ethernet@fe1c0000/rx-queues-config       $  /ethernet@fe1c0000/tx-queues-config         /sata@fe210000          /sata@fe230000          /spi@fe2b0000           )/mmc@fe2c0000           v/mmc@fe2d0000           /mmc@fe2e0000           /i2s@fe470000           /i2s@fe480000           /i2s@fe490000           /i2s@fe4a0000           /spdif-tx@fe4e0000          /spdif-tx@fe4f0000          /interrupt-controller@fe600000        7  
/interrupt-controller@fe600000/msi-controller@fe640000        7  /interrupt-controller@fe600000/msi-controller@fe660000        D  /interrupt-controller@fe600000/ppi-partitions/interrupt-partition-0       D  #/interrupt-controller@fe600000/ppi-partitions/interrupt-partition-1         2/dma-controller@fea10000            8/dma-controller@fea30000             `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000           >/i2c@feac0000/regulator@42           t/i2c@fead0000           I/i2c@fead0000/codec@a           R/timer@feae0000         Y/watchdog@feaf0000           /spi@feb00000            /spi@feb10000            /spi@feb20000         $  ]/spi@feb20000/pmic@0/dvs1-null-pins       $  m/spi@feb20000/pmic@0/dvs2-null-pins       $  }/spi@feb20000/pmic@0/dvs3-null-pins       *  /spi@feb20000/pmic@0/regulators/dcdc-reg1         *  /spi@feb20000/pmic@0/regulators/dcdc-reg2         *  /spi@feb20000/pmic@0/regulators/dcdc-reg3         *  /spi@feb20000/pmic@0/regulators/dcdc-reg4         *  /spi@feb20000/pmic@0/regulators/dcdc-reg5         *  /spi@feb20000/pmic@0/regulators/dcdc-reg6         *  /spi@feb20000/pmic@0/regulators/dcdc-reg7         *  /spi@feb20000/pmic@0/regulators/dcdc-reg8         *  /spi@feb20000/pmic@0/regulators/dcdc-reg9         +  /spi@feb20000/pmic@0/regulators/dcdc-reg10        *  /spi@feb20000/pmic@0/regulators/pldo-reg1         *  /spi@feb20000/pmic@0/regulators/pldo-reg2         *  /spi@feb20000/pmic@0/regulators/pldo-reg3         *  +/spi@feb20000/pmic@0/regulators/pldo-reg4         *  7/spi@feb20000/pmic@0/regulators/pldo-reg5         *  C/spi@feb20000/pmic@0/regulators/pldo-reg6         *  L/spi@feb20000/pmic@0/regulators/nldo-reg1         *  X/spi@feb20000/pmic@0/regulators/nldo-reg2         *  h/spi@feb20000/pmic@0/regulators/nldo-reg3         *  u/spi@feb20000/pmic@0/regulators/nldo-reg4         *  /spi@feb20000/pmic@0/regulators/nldo-reg5            /spi@feb30000           /serial@feb40000            /serial@feb50000            /serial@feb60000            /serial@feb70000            /serial@feb80000            /serial@feb90000            /serial@feba0000            /serial@febb0000            /serial@febc0000            /pwm@febd0000           /pwm@febd0010           /pwm@febd0020           /pwm@febd0030           /pwm@febe0000           /pwm@febe0010           /pwm@febe0020           /pwm@febe0030           /pwm@febf0000           /pwm@febf0010           /pwm@febf0020            /pwm@febf0030           /thermal-zones          /thermal-zones/package-thermal        2  $/thermal-zones/package-thermal/trips/package-crit            1/thermal-zones/bigcore0-thermal       5  B/thermal-zones/bigcore0-thermal/trips/bigcore0-alert          4  Q/thermal-zones/bigcore0-thermal/trips/bigcore0-crit          _/thermal-zones/bigcore2-thermal       5  p/thermal-zones/bigcore2-thermal/trips/bigcore2-alert          4  /thermal-zones/bigcore2-thermal/trips/bigcore2-crit       "  /thermal-zones/littlecore-thermal         9  /thermal-zones/littlecore-thermal/trips/littlecore-alert          8  /thermal-zones/littlecore-thermal/trips/littlecore-crit         /thermal-zones/center-thermal         0  /thermal-zones/center-thermal/trips/center-crit         /thermal-zones/gpu-thermal        +  /thermal-zones/gpu-thermal/trips/gpu-alert        *  /thermal-zones/gpu-thermal/trips/gpu-crit           /thermal-zones/npu-thermal        *  /thermal-zones/npu-thermal/trips/npu-crit           /tsadc@fec00000         /adc@fec10000            y/i2c@fec80000         #   /i2c@fec80000/fan@18/i2c-mux/i2c@0        *  /i2c@fec80000/fan@18/i2c-mux/i2c@0/rtc@6f            ~/i2c@fec90000           &/i2c@fec90000/regulator@42          6/i2c@fec90000/regulator@43           /i2c@feca0000            /spi@fecb0000           F/efuse@fecc0000         J/efuse@fecc0000/cpu-code@2          S/efuse@fecc0000/id@7            Z/efuse@fecc0000/cpu-leakage@17          h/efuse@fecc0000/cpu-leakage@18          v/efuse@fecc0000/cpu-leakage@19          /efuse@fecc0000/log-leakage@1a          /efuse@fecc0000/gpu-leakage@1b          /efuse@fecc0000/cpu-version@1c          /efuse@fecc0000/npu-leakage@28        !  /efuse@fecc0000/codec-leakage@29            /dma-controller@fed10000            /phy@fed60000           /phy@fed80000           /phy@feda0000           /phy@fedb0000           /phy@fee00000           /phy@fee20000           /sram@ff001000        	  /pinctrl             =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000          $/pinctrl/pcfg-pull-up           1/pinctrl/pcfg-pull-down         @/pinctrl/pcfg-pull-none       $  O/pinctrl/pcfg-pull-none-drv-level-0       $  j/pinctrl/pcfg-pull-none-drv-level-1       $  /pinctrl/pcfg-pull-none-drv-level-2       $  /pinctrl/pcfg-pull-none-drv-level-3       $  /pinctrl/pcfg-pull-none-drv-level-4       $  /pinctrl/pcfg-pull-none-drv-level-5       $  /pinctrl/pcfg-pull-none-drv-level-6       $  /pinctrl/pcfg-pull-none-drv-level-7       $  '/pinctrl/pcfg-pull-none-drv-level-8       $  B/pinctrl/pcfg-pull-none-drv-level-9       %  ]/pinctrl/pcfg-pull-none-drv-level-10          %  y/pinctrl/pcfg-pull-none-drv-level-11          %  /pinctrl/pcfg-pull-none-drv-level-12          %  /pinctrl/pcfg-pull-none-drv-level-13          %  /pinctrl/pcfg-pull-none-drv-level-14          %  /pinctrl/pcfg-pull-none-drv-level-15          "  /pinctrl/pcfg-pull-up-drv-level-0         "  /pinctrl/pcfg-pull-up-drv-level-1         "  7/pinctrl/pcfg-pull-up-drv-level-2         "  P/pinctrl/pcfg-pull-up-drv-level-3         "  i/pinctrl/pcfg-pull-up-drv-level-4         "  /pinctrl/pcfg-pull-up-drv-level-5         "  /pinctrl/pcfg-pull-up-drv-level-6         "  /pinctrl/pcfg-pull-up-drv-level-7         "  /pinctrl/pcfg-pull-up-drv-level-8         "  /pinctrl/pcfg-pull-up-drv-level-9         #  /pinctrl/pcfg-pull-up-drv-level-10        #  /pinctrl/pcfg-pull-up-drv-level-11        #  3/pinctrl/pcfg-pull-up-drv-level-12        #  M/pinctrl/pcfg-pull-up-drv-level-13        #  g/pinctrl/pcfg-pull-up-drv-level-14        #  /pinctrl/pcfg-pull-up-drv-level-15        $  /pinctrl/pcfg-pull-down-drv-level-0       $  /pinctrl/pcfg-pull-down-drv-level-1       $  /pinctrl/pcfg-pull-down-drv-level-2       $  /pinctrl/pcfg-pull-down-drv-level-3       $  /pinctrl/pcfg-pull-down-drv-level-4       $  "/pinctrl/pcfg-pull-down-drv-level-5       $  =/pinctrl/pcfg-pull-down-drv-level-6       $  X/pinctrl/pcfg-pull-down-drv-level-7       $  s/pinctrl/pcfg-pull-down-drv-level-8       $  /pinctrl/pcfg-pull-down-drv-level-9       %  /pinctrl/pcfg-pull-down-drv-level-10          %  /pinctrl/pcfg-pull-down-drv-level-11          %  /pinctrl/pcfg-pull-down-drv-level-12          %  /pinctrl/pcfg-pull-down-drv-level-13          %  /pinctrl/pcfg-pull-down-drv-level-14          %  5/pinctrl/pcfg-pull-down-drv-level-15            Q/pinctrl/pcfg-pull-up-smt           b/pinctrl/pcfg-pull-down-smt         u/pinctrl/pcfg-pull-none-smt       (  /pinctrl/pcfg-pull-none-drv-level-0-smt       (  /pinctrl/pcfg-pull-none-drv-level-1-smt       (  /pinctrl/pcfg-pull-none-drv-level-2-smt       (  /pinctrl/pcfg-pull-none-drv-level-3-smt       (   /pinctrl/pcfg-pull-none-drv-level-4-smt       (   #/pinctrl/pcfg-pull-none-drv-level-5-smt          B/pinctrl/pcfg-output-high            S/pinctrl/pcfg-output-low             c/pinctrl/auddsm/auddsm-pins          o/pinctrl/bt1120/bt1120-pins          {/pinctrl/can0/can0m0-pins            /pinctrl/can0/can0m1-pins            /pinctrl/can1/can1m0-pins            /pinctrl/can1/can1m1-pins            /pinctrl/can2/can2m0-pins            /pinctrl/can2/can2m1-pins            /pinctrl/cif/cif-clk             /pinctrl/cif/cif-dvp-clk             /pinctrl/cif/cif-dvp-bus16           /pinctrl/cif/cif-dvp-bus8            /pinctrl/clk32k/clk32k-in            /pinctrl/clk32k/clk32k-out0         !/pinctrl/clk32k/clk32k-out1         !/pinctrl/cpu/cpu-pins         "  !/pinctrl/ddrphych0/ddrphych0-pins         "  !,/pinctrl/ddrphych1/ddrphych1-pins         "  !;/pinctrl/ddrphych2/ddrphych2-pins         "  !J/pinctrl/ddrphych3/ddrphych3-pins           !Y/pinctrl/dp0/dp0m0-pins         !d/pinctrl/dp0/dp0m1-pins         !o/pinctrl/dp0/dp0m2-pins         !z/pinctrl/dp1/dp1m0-pins         !/pinctrl/dp1/dp1m1-pins         !/pinctrl/dp1/dp1m2-pins         !/pinctrl/emmc/emmc-rstnout          !/pinctrl/emmc/emmc-bus8         !/pinctrl/emmc/emmc-clk          !/pinctrl/emmc/emmc-cmd          !/pinctrl/emmc/emmc-data-strobe          !/pinctrl/emmc/emmc-reset            !/pinctrl/eth1/eth1-pins         !/pinctrl/fspi/fspim0-pins           !/pinctrl/fspi/fspim0-cs1            "/pinctrl/fspi/fspim2-pins           "/pinctrl/fspi/fspim2-cs1            "/pinctrl/fspi/fspim1-pins           "$/pinctrl/fspi/fspim1-cs1            "//pinctrl/gmac1/gmac1-miim           ":/pinctrl/gmac1/gmac1-clkinout           "I/pinctrl/gmac1/gmac1-rx-bus2            "W/pinctrl/gmac1/gmac1-tx-bus2            "e/pinctrl/gmac1/gmac1-rgmii-clk          "u/pinctrl/gmac1/gmac1-rgmii-bus          "/pinctrl/gmac1/gmac1-ppsclk         "/pinctrl/gmac1/gmac1-ppstrig          !  "/pinctrl/gmac1/gmac1-ptp-ref-clk            "/pinctrl/gmac1/gmac1-txer           "/pinctrl/gpu/gpu-pins           "/pinctrl/hdmi/hdmim0-rx-cec         "/pinctrl/hdmi/hdmim0-rx-hpdin           "/pinctrl/hdmi/hdmim0-rx-scl         "/pinctrl/hdmi/hdmim0-rx-sda         # /pinctrl/hdmi/hdmim0-tx0-cec            #/pinctrl/hdmi/hdmim0-tx0-hpd            #/pinctrl/hdmi/hdmim0-tx0-scl            #-/pinctrl/hdmi/hdmim0-tx0-sda            #</pinctrl/hdmi/hdmim0-tx1-hpd            #K/pinctrl/hdmi/hdmim1-rx-cec         #Y/pinctrl/hdmi/hdmim1-rx-hpdin           #i/pinctrl/hdmi/hdmim1-rx-scl         #w/pinctrl/hdmi/hdmim1-rx-sda         #/pinctrl/hdmi/hdmim1-tx0-cec            #/pinctrl/hdmi/hdmim1-tx0-hpd            #/pinctrl/hdmi/hdmim1-tx0-scl            #/pinctrl/hdmi/hdmim1-tx0-sda            #/pinctrl/hdmi/hdmim1-tx1-cec            #/pinctrl/hdmi/hdmim1-tx1-hpd            #/pinctrl/hdmi/hdmim1-tx1-scl            #/pinctrl/hdmi/hdmim1-tx1-sda            #/pinctrl/hdmi/hdmim2-rx-cec         $/pinctrl/hdmi/hdmim2-rx-hpdin           $/pinctrl/hdmi/hdmim2-rx-scl         $)/pinctrl/hdmi/hdmim2-rx-sda         $7/pinctrl/hdmi/hdmim2-tx0-scl            $F/pinctrl/hdmi/hdmim2-tx0-sda            $U/pinctrl/hdmi/hdmim2-tx1-cec            $d/pinctrl/hdmi/hdmim2-tx1-scl            $s/pinctrl/hdmi/hdmim2-tx1-sda            $/pinctrl/hdmi/hdmi-debug0           $/pinctrl/hdmi/hdmi-debug1           $/pinctrl/hdmi/hdmi-debug2           $/pinctrl/hdmi/hdmi-debug3           $/pinctrl/hdmi/hdmi-debug4           $/pinctrl/hdmi/hdmi-debug5           $/pinctrl/hdmi/hdmi-debug6           $/pinctrl/hdmi/hdmim0-tx1-cec            $/pinctrl/hdmi/hdmim0-tx1-scl            $/pinctrl/hdmi/hdmim0-tx1-sda            %/pinctrl/i2c0/i2c0m0-xfer           %/pinctrl/i2c0/i2c0m2-xfer           %/pinctrl/i2c0/i2c0m1-xfer           %'/pinctrl/i2c1/i2c1m0-xfer           %3/pinctrl/i2c1/i2c1m1-xfer           %?/pinctrl/i2c1/i2c1m2-xfer           %K/pinctrl/i2c1/i2c1m3-xfer           %W/pinctrl/i2c1/i2c1m4-xfer           %c/pinctrl/i2c2/i2c2m0-xfer           %o/pinctrl/i2c2/i2c2m2-xfer           %{/pinctrl/i2c2/i2c2m3-xfer           %/pinctrl/i2c2/i2c2m4-xfer           %/pinctrl/i2c2/i2c2m1-xfer           %/pinctrl/i2c3/i2c3m0-xfer           %/pinctrl/i2c3/i2c3m1-xfer           %/pinctrl/i2c3/i2c3m2-xfer           %/pinctrl/i2c3/i2c3m4-xfer           %/pinctrl/i2c3/i2c3m3-xfer           %/pinctrl/i2c4/i2c4m0-xfer           %/pinctrl/i2c4/i2c4m2-xfer           %/pinctrl/i2c4/i2c4m3-xfer           %/pinctrl/i2c4/i2c4m4-xfer           &/pinctrl/i2c4/i2c4m1-xfer           &/pinctrl/i2c5/i2c5m0-xfer           &#/pinctrl/i2c5/i2c5m1-xfer           &//pinctrl/i2c5/i2c5m2-xfer           &;/pinctrl/i2c5/i2c5m3-xfer           &G/pinctrl/i2c5/i2c5m4-xfer           &S/pinctrl/i2c6/i2c6m0-xfer           &_/pinctrl/i2c6/i2c6m1-xfer           &k/pinctrl/i2c6/i2c6m3-xfer           &w/pinctrl/i2c6/i2c6m4-xfer           &/pinctrl/i2c6/i2c6m2-xfer           &/pinctrl/i2c7/i2c7m0-xfer           &/pinctrl/i2c7/i2c7m2-xfer           &/pinctrl/i2c7/i2c7m3-xfer           &/pinctrl/i2c7/i2c7m1-xfer           &/pinctrl/i2c8/i2c8m0-xfer           &/pinctrl/i2c8/i2c8m2-xfer           &/pinctrl/i2c8/i2c8m3-xfer           &/pinctrl/i2c8/i2c8m4-xfer           &/pinctrl/i2c8/i2c8m1-xfer           &/pinctrl/i2s0/i2s0-lrck         '/pinctrl/i2s0/i2s0-mclk         '/pinctrl/i2s0/i2s0-sclk         '/pinctrl/i2s0/i2s0-sdi0         '#/pinctrl/i2s0/i2s0-sdi1         '-/pinctrl/i2s0/i2s0-sdi2         '7/pinctrl/i2s0/i2s0-sdi3         'A/pinctrl/i2s0/i2s0-sdo0         'K/pinctrl/i2s0/i2s0-sdo1         'U/pinctrl/i2s0/i2s0-sdo2         '_/pinctrl/i2s0/i2s0-sdo3         'i/pinctrl/i2s1/i2s1m0-lrck           'u/pinctrl/i2s1/i2s1m0-mclk           '/pinctrl/i2s1/i2s1m0-sclk           '/pinctrl/i2s1/i2s1m0-sdi0           '/pinctrl/i2s1/i2s1m0-sdi1           '/pinctrl/i2s1/i2s1m0-sdi2           '/pinctrl/i2s1/i2s1m0-sdi3           '/pinctrl/i2s1/i2s1m0-sdo0           '/pinctrl/i2s1/i2s1m0-sdo1           '/pinctrl/i2s1/i2s1m0-sdo2           '/pinctrl/i2s1/i2s1m0-sdo3           '/pinctrl/i2s1/i2s1m1-lrck           '/pinctrl/i2s1/i2s1m1-mclk           (/pinctrl/i2s1/i2s1m1-sclk           (/pinctrl/i2s1/i2s1m1-sdi0           (/pinctrl/i2s1/i2s1m1-sdi1           ()/pinctrl/i2s1/i2s1m1-sdi2           (5/pinctrl/i2s1/i2s1m1-sdi3           (A/pinctrl/i2s1/i2s1m1-sdo0           (M/pinctrl/i2s1/i2s1m1-sdo1           (Y/pinctrl/i2s1/i2s1m1-sdo2           (e/pinctrl/i2s1/i2s1m1-sdo3           (q/pinctrl/i2s2/i2s2m0-lrck           (}/pinctrl/i2s2/i2s2m0-mclk           (/pinctrl/i2s2/i2s2m0-sclk           (/pinctrl/i2s2/i2s2m0-sdi            (/pinctrl/i2s2/i2s2m0-sdo            (/pinctrl/i2s2/i2s2m1-lrck           (/pinctrl/i2s2/i2s2m1-mclk           (/pinctrl/i2s2/i2s2m1-sclk           (/pinctrl/i2s2/i2s2m1-sdi            (/pinctrl/i2s2/i2s2m1-sdo            (/pinctrl/i2s3/i2s3-lrck         (/pinctrl/i2s3/i2s3-mclk         (/pinctrl/i2s3/i2s3-sclk         )/pinctrl/i2s3/i2s3-sdi          )/pinctrl/i2s3/i2s3-sdo          )/pinctrl/jtag/jtagm0-pins           )!/pinctrl/jtag/jtagm1-pins           )-/pinctrl/jtag/jtagm2-pins           )9/pinctrl/litcpu/litcpu-pins         )E/pinctrl/mcu/mcum0-pins         )P/pinctrl/mcu/mcum1-pins       !  )[/pinctrl/mipi/mipim0-camera0-clk          !  )n/pinctrl/mipi/mipim0-camera1-clk          !  )/pinctrl/mipi/mipim0-camera2-clk          !  )/pinctrl/mipi/mipim0-camera3-clk          !  )/pinctrl/mipi/mipim0-camera4-clk          !  )/pinctrl/mipi/mipim1-camera0-clk          !  )/pinctrl/mipi/mipim1-camera1-clk          !  )/pinctrl/mipi/mipim1-camera2-clk          !  )/pinctrl/mipi/mipim1-camera3-clk          !  */pinctrl/mipi/mipim1-camera4-clk            */pinctrl/mipi/mipi-te0          *"/pinctrl/mipi/mipi-te1          *+/pinctrl/npu/npu-pins         %  *4/pinctrl/pcie20x1/pcie20x1m0-clkreqn          $  *G/pinctrl/pcie20x1/pcie20x1m0-perstn       #  *Y/pinctrl/pcie20x1/pcie20x1m0-waken        %  *j/pinctrl/pcie20x1/pcie20x1m1-clkreqn          $  *}/pinctrl/pcie20x1/pcie20x1m1-perstn       #  */pinctrl/pcie20x1/pcie20x1m1-waken        )  */pinctrl/pcie20x1/pcie20x1-2-button-rstn          "  */pinctrl/pcie30phy/pcie30phy-pins         '  */pinctrl/pcie30x1/pcie30x1m0-0-clkreqn        &  */pinctrl/pcie30x1/pcie30x1m0-0-perstn         %  */pinctrl/pcie30x1/pcie30x1m0-0-waken          '  +/pinctrl/pcie30x1/pcie30x1m0-1-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m0-1-perstn         %  ++/pinctrl/pcie30x1/pcie30x1m0-1-waken          '  +>/pinctrl/pcie30x1/pcie30x1m1-0-clkreqn        &  +S/pinctrl/pcie30x1/pcie30x1m1-0-perstn         %  +g/pinctrl/pcie30x1/pcie30x1m1-0-waken          '  +z/pinctrl/pcie30x1/pcie30x1m1-1-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m1-1-perstn         %  +/pinctrl/pcie30x1/pcie30x1m1-1-waken          '  +/pinctrl/pcie30x1/pcie30x1m2-0-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m2-0-perstn         %  +/pinctrl/pcie30x1/pcie30x1m2-0-waken          '  +/pinctrl/pcie30x1/pcie30x1m2-1-clkreqn        &  ,/pinctrl/pcie30x1/pcie30x1m2-1-perstn         %  ,/pinctrl/pcie30x1/pcie30x1m2-1-waken          )  ,./pinctrl/pcie30x1/pcie30x1-0-button-rstn          )  ,E/pinctrl/pcie30x1/pcie30x1-1-button-rstn          %  ,\/pinctrl/pcie30x2/pcie30x2m0-clkreqn          $  ,o/pinctrl/pcie30x2/pcie30x2m0-perstn       #  ,/pinctrl/pcie30x2/pcie30x2m0-waken        %  ,/pinctrl/pcie30x2/pcie30x2m1-clkreqn          $  ,/pinctrl/pcie30x2/pcie30x2m1-perstn       #  ,/pinctrl/pcie30x2/pcie30x2m1-waken        %  ,/pinctrl/pcie30x2/pcie30x2m2-clkreqn          $  ,/pinctrl/pcie30x2/pcie30x2m2-perstn       #  ,/pinctrl/pcie30x2/pcie30x2m2-waken        %  ,/pinctrl/pcie30x2/pcie30x2m3-clkreqn          $  -/pinctrl/pcie30x2/pcie30x2m3-perstn       #  -#/pinctrl/pcie30x2/pcie30x2m3-waken        '  -4/pinctrl/pcie30x2/pcie30x2-button-rstn        %  -I/pinctrl/pcie30x4/pcie30x4m0-clkreqn          $  -\/pinctrl/pcie30x4/pcie30x4m0-perstn       #  -n/pinctrl/pcie30x4/pcie30x4m0-waken        %  -/pinctrl/pcie30x4/pcie30x4m1-clkreqn          $  -/pinctrl/pcie30x4/pcie30x4m1-perstn       #  -/pinctrl/pcie30x4/pcie30x4m1-waken        %  -/pinctrl/pcie30x4/pcie30x4m2-clkreqn          $  -/pinctrl/pcie30x4/pcie30x4m2-perstn       #  -/pinctrl/pcie30x4/pcie30x4m2-waken        %  -/pinctrl/pcie30x4/pcie30x4m3-clkreqn          $  -/pinctrl/pcie30x4/pcie30x4m3-perstn       #  ./pinctrl/pcie30x4/pcie30x4m3-waken        '  .!/pinctrl/pcie30x4/pcie30x4-button-rstn          .6/pinctrl/pdm0/pdm0m0-clk            .A/pinctrl/pdm0/pdm0m0-clk1           .M/pinctrl/pdm0/pdm0m0-sdi0           .Y/pinctrl/pdm0/pdm0m0-sdi1           .e/pinctrl/pdm0/pdm0m0-sdi2           .q/pinctrl/pdm0/pdm0m0-sdi3           .}/pinctrl/pdm0/pdm0m1-clk            ./pinctrl/pdm0/pdm0m1-clk1           ./pinctrl/pdm0/pdm0m1-sdi0           ./pinctrl/pdm0/pdm0m1-sdi1           ./pinctrl/pdm0/pdm0m1-sdi2           ./pinctrl/pdm0/pdm0m1-sdi3           ./pinctrl/pdm1/pdm1m0-clk            ./pinctrl/pdm1/pdm1m0-clk1           ./pinctrl/pdm1/pdm1m0-sdi0           ./pinctrl/pdm1/pdm1m0-sdi1           ./pinctrl/pdm1/pdm1m0-sdi2           ./pinctrl/pdm1/pdm1m0-sdi3           //pinctrl/pdm1/pdm1m1-clk            //pinctrl/pdm1/pdm1m1-clk1           /"/pinctrl/pdm1/pdm1m1-sdi0           /./pinctrl/pdm1/pdm1m1-sdi1           /:/pinctrl/pdm1/pdm1m1-sdi2           /F/pinctrl/pdm1/pdm1m1-sdi3           /R/pinctrl/pmic/pmic-pins         /\/pinctrl/pmu/pmu-pins           /e/pinctrl/pwm0/pwm0m0-pins           /q/pinctrl/pwm0/pwm0m1-pins           /}/pinctrl/pwm0/pwm0m2-pins           //pinctrl/pwm1/pwm1m0-pins           //pinctrl/pwm1/pwm1m1-pins           //pinctrl/pwm1/pwm1m2-pins           //pinctrl/pwm2/pwm2m0-pins           //pinctrl/pwm2/pwm2m1-pins           //pinctrl/pwm2/pwm2m2-pins           //pinctrl/pwm3/pwm3m0-pins           //pinctrl/pwm3/pwm3m1-pins           //pinctrl/pwm3/pwm3m2-pins           //pinctrl/pwm3/pwm3m3-pins           0/pinctrl/pwm4/pwm4m0-pins           0/pinctrl/pwm4/pwm4m1-pins           0/pinctrl/pwm5/pwm5m0-pins           0%/pinctrl/pwm5/pwm5m1-pins           01/pinctrl/pwm5/pwm5m2-pins           0=/pinctrl/pwm6/pwm6m0-pins           0I/pinctrl/pwm6/pwm6m1-pins           0U/pinctrl/pwm6/pwm6m2-pins           0a/pinctrl/pwm7/pwm7m0-pins           0m/pinctrl/pwm7/pwm7m1-pins           0y/pinctrl/pwm7/pwm7m2-pins           0/pinctrl/pwm7/pwm7m3-pins           0/pinctrl/pwm8/pwm8m0-pins           0/pinctrl/pwm8/pwm8m1-pins           0/pinctrl/pwm8/pwm8m2-pins           0/pinctrl/pwm9/pwm9m0-pins           0/pinctrl/pwm9/pwm9m1-pins           0/pinctrl/pwm9/pwm9m2-pins           0/pinctrl/pwm10/pwm10m0-pins         0/pinctrl/pwm10/pwm10m1-pins         0/pinctrl/pwm10/pwm10m2-pins         1 /pinctrl/pwm11/pwm11m0-pins         1/pinctrl/pwm11/pwm11m1-pins         1/pinctrl/pwm11/pwm11m2-pins         1'/pinctrl/pwm11/pwm11m3-pins         14/pinctrl/pwm12/pwm12m0-pins         1A/pinctrl/pwm12/pwm12m1-pins         1N/pinctrl/pwm13/pwm13m0-pins         1[/pinctrl/pwm13/pwm13m1-pins         1h/pinctrl/pwm13/pwm13m2-pins         1u/pinctrl/pwm14/pwm14m0-pins         1/pinctrl/pwm14/pwm14m1-pins         1/pinctrl/pwm14/pwm14m2-pins         1/pinctrl/pwm15/pwm15m0-pins         1/pinctrl/pwm15/pwm15m1-pins         1/pinctrl/pwm15/pwm15m2-pins         1/pinctrl/pwm15/pwm15m3-pins         1/pinctrl/refclk/refclk-pins         1/pinctrl/sata/sata-pins         1/pinctrl/sata0/sata0m0-pins         1/pinctrl/sata0/sata0m1-pins         2 /pinctrl/sata1/sata1m0-pins         2/pinctrl/sata1/sata1m1-pins         2/pinctrl/sata2/sata2m0-pins         2'/pinctrl/sata2/sata2m1-pins         24/pinctrl/sdio/sdiom1-pins           2@/pinctrl/sdio/sdiom0-pins           2L/pinctrl/sdmmc/sdmmc-bus4           2W/pinctrl/sdmmc/sdmmc-clk            2a/pinctrl/sdmmc/sdmmc-cmd            2k/pinctrl/sdmmc/sdmmc-det            2u/pinctrl/sdmmc/sdmmc-pwren          2/pinctrl/spdif0/spdif0m0-tx         2/pinctrl/spdif0/spdif0m1-tx         2/pinctrl/spdif1/spdif1m0-tx         2/pinctrl/spdif1/spdif1m1-tx         2/pinctrl/spdif1/spdif1m2-tx         2/pinctrl/spi0/spi0m0-pins           2/pinctrl/spi0/spi0m0-cs0            2/pinctrl/spi0/spi0m0-cs1            2/pinctrl/spi0/spi0m1-pins           2/pinctrl/spi0/spi0m1-cs0            2/pinctrl/spi0/spi0m1-cs1            3/pinctrl/spi0/spi0m2-pins           3/pinctrl/spi0/spi0m2-cs0            3/pinctrl/spi0/spi0m2-cs1            3#/pinctrl/spi0/spi0m3-pins           3//pinctrl/spi0/spi0m3-cs0            3:/pinctrl/spi0/spi0m3-cs1            3E/pinctrl/spi1/spi1m1-pins           3Q/pinctrl/spi1/spi1m1-cs0            3\/pinctrl/spi1/spi1m1-cs1            3g/pinctrl/spi1/spi1m2-pins           3s/pinctrl/spi1/spi1m2-cs0            3~/pinctrl/spi1/spi1m2-cs1            3/pinctrl/spi1/spi1m0-pins           3/pinctrl/spi1/spi1m0-cs0            3/pinctrl/spi1/spi1m0-cs1            3/pinctrl/spi2/spi2m0-pins           3/pinctrl/spi2/spi2m0-cs0            3/pinctrl/spi2/spi2m0-cs1            3/pinctrl/spi2/spi2m1-pins           3/pinctrl/spi2/spi2m1-cs0            3/pinctrl/spi2/spi2m1-cs1            3/pinctrl/spi2/spi2m2-pins           3/pinctrl/spi2/spi2m2-cs0            4/pinctrl/spi2/spi2m2-cs1            4/pinctrl/spi3/spi3m1-pins           4/pinctrl/spi3/spi3m1-cs0            4(/pinctrl/spi3/spi3m1-cs1            43/pinctrl/spi3/spi3m2-pins           4?/pinctrl/spi3/spi3m2-cs0            4J/pinctrl/spi3/spi3m2-cs1            4U/pinctrl/spi3/spi3m3-pins           4a/pinctrl/spi3/spi3m3-cs0            4l/pinctrl/spi3/spi3m3-cs1            4w/pinctrl/spi3/spi3m0-pins           4/pinctrl/spi3/spi3m0-cs0            4/pinctrl/spi3/spi3m0-cs1            4/pinctrl/spi4/spi4m0-pins           4/pinctrl/spi4/spi4m0-cs0            4/pinctrl/spi4/spi4m0-cs1            4/pinctrl/spi4/spi4m1-pins           4/pinctrl/spi4/spi4m1-cs0            4/pinctrl/spi4/spi4m1-cs1            4/pinctrl/spi4/spi4m2-pins           4/pinctrl/spi4/spi4m2-cs0            4/pinctrl/tsadc/tsadcm1-shut         5/pinctrl/tsadc/tsadc-shut           5/pinctrl/tsadc/tsadc-shut-org           5/pinctrl/uart0/uart0m0-xfer         5(/pinctrl/uart0/uart0m1-xfer         55/pinctrl/uart0/uart0m2-xfer         5B/pinctrl/uart0/uart0-ctsn           5M/pinctrl/uart0/uart0-rtsn           5X/pinctrl/uart1/uart1m1-xfer         5e/pinctrl/uart1/uart1m1-ctsn         5r/pinctrl/uart1/uart1m1-rtsn         5/pinctrl/uart1/uart1m2-xfer         5/pinctrl/uart1/uart1m2-ctsn         5/pinctrl/uart1/uart1m2-rtsn         5/pinctrl/uart1/uart1m0-xfer         5/pinctrl/uart1/uart1m0-ctsn         5/pinctrl/uart1/uart1m0-rtsn         5/pinctrl/uart2/uart2m0-xfer         5/pinctrl/uart2/uart2m1-xfer         5/pinctrl/uart2/uart2m2-xfer         5/pinctrl/uart2/uart2-ctsn           5/pinctrl/uart2/uart2-rtsn           6
/pinctrl/uart3/uart3m0-xfer         6/pinctrl/uart3/uart3m1-xfer         6$/pinctrl/uart3/uart3m2-xfer         61/pinctrl/uart3/uart3-ctsn           6</pinctrl/uart3/uart3-rtsn           6G/pinctrl/uart4/uart4m0-xfer         6T/pinctrl/uart4/uart4m1-xfer         6a/pinctrl/uart4/uart4m2-xfer         6n/pinctrl/uart4/uart4-ctsn           6y/pinctrl/uart4/uart4-rtsn           6/pinctrl/uart5/uart5m0-xfer         6/pinctrl/uart5/uart5m0-ctsn         6/pinctrl/uart5/uart5m0-rtsn         6/pinctrl/uart5/uart5m1-xfer         6/pinctrl/uart5/uart5m1-ctsn         6/pinctrl/uart5/uart5m1-rtsn         6/pinctrl/uart5/uart5m2-xfer         6/pinctrl/uart6/uart6m1-xfer         6/pinctrl/uart6/uart6m1-ctsn         6/pinctrl/uart6/uart6m1-rtsn         7/pinctrl/uart6/uart6m2-xfer         7/pinctrl/uart6/uart6m0-xfer         7 /pinctrl/uart6/uart6m0-ctsn         7-/pinctrl/uart6/uart6m0-rtsn         7:/pinctrl/uart7/uart7m1-xfer         7G/pinctrl/uart7/uart7m1-ctsn         7T/pinctrl/uart7/uart7m1-rtsn         7a/pinctrl/uart7/uart7m2-xfer         7n/pinctrl/uart7/uart7m0-xfer         7{/pinctrl/uart7/uart7m0-ctsn         7/pinctrl/uart7/uart7m0-rtsn         7/pinctrl/uart8/uart8m0-xfer         7/pinctrl/uart8/uart8m0-ctsn         7/pinctrl/uart8/uart8m0-rtsn         7/pinctrl/uart8/uart8m1-xfer         7/pinctrl/uart8/uart8m1-ctsn         7/pinctrl/uart8/uart8m1-rtsn         7/pinctrl/uart8/uart8-xfer           7/pinctrl/uart9/uart9m0-xfer         7/pinctrl/uart9/uart9m1-xfer         8/pinctrl/uart9/uart9m1-ctsn         8/pinctrl/uart9/uart9m1-rtsn         8"/pinctrl/uart9/uart9m2-xfer         8//pinctrl/uart9/uart9m2-ctsn         8</pinctrl/uart9/uart9m2-rtsn         8I/pinctrl/uart9/uart9m0-ctsn         8V/pinctrl/uart9/uart9m0-rtsn         8c/pinctrl/vop/vop-pins           8l/pinctrl/bt656/bt656-pins         #  8w/pinctrl/gpio-func/tsadc-gpio-func          8/pinctrl/eth0/eth0-pins         8/pinctrl/gmac0/gmac0-miim           8/pinctrl/gmac0/gmac0-clkinout           8/pinctrl/gmac0/gmac0-rx-bus2            8/pinctrl/gmac0/gmac0-tx-bus2            8/pinctrl/gmac0/gmac0-rgmii-clk          8/pinctrl/gmac0/gmac0-rgmii-bus          8/pinctrl/gmac0/gmac0-ppsclk         8/pinctrl/gmac0/gmac0-ppstring            9/pinctrl/gmac0/gmac0-ptp-refclk         9/pinctrl/gmac0/gmac0-txer           9/pinctrl/ethernet/eth-reset         9)/pinctrl/leds/module-led-pin            98/pinctrl/usb3/usb3-id            9@/pinctrl/haikou/haikou-keys-pin         9P/pinctrl/usb2/otg-vbus-drv          9]/hdmi1-sound            9i/usb@fc400000           9x/syscon@fd5b8000            9/syscon@fd5c0000            9/syscon@fd5cc000            9/syscon@fd5d4000            9/syscon@fd5d4000/usb2phy@4000         '  9/syscon@fd5d4000/usb2phy@4000/otg-port          9/syscon@fd5e4000            9/spdif-tx@fddb8000          9/i2s@fddc8000           9/spdif-tx@fdde8000          9/i2s@fddf4000           9/i2s@fddf8000           9/i2s@fde00000           :	/hdmi@fdea0000          :/hdmi@fdea0000/ports/port@0         :/hdmi@fdea0000/ports/port@1         :"/edp@fded0000           :'/edp@fded0000/ports/port@0          ://edp@fded0000/ports/port@1          :8/hdmi_receiver@fdee0000         :F/pcie@fe150000        +  :N/pcie@fe150000/legacy-interrupt-controller          :[/pcie-ep@fe150000           :f/pcie@fe160000        +  :n/pcie@fe160000/legacy-interrupt-controller          :{/pcie@fe170000        +  :/pcie@fe170000/legacy-interrupt-controller          :/ethernet@fe1b0000          :/ethernet@fe1b0000/mdio       '  :/ethernet@fe1b0000/mdio/ethernet-phy@6        %  :/ethernet@fe1b0000/stmmac-axi-config          $  :/ethernet@fe1b0000/rx-queues-config       $  :/ethernet@fe1b0000/tx-queues-config         :/sata@fe220000          :/phy@fed70000           :/phy@fed90000           ;/phy@fee10000           ;/phy@fee80000           ;/opp-table-cluster0         ;+/opp-table-cluster1         ;>/opp-table-cluster2         ;Q/opp-table          ;_/emmc-pwrseq            ;k/extcon-usb3            ;w/pcie-refclk-gen-clock          ;/pcie-refclk-clock          ;/regulator-vcc-1v1-nldo-s3          ;/regulator-vcc-1v2-s3           ;/regulator-vcc5v0-sys           ;/regulator-dc-12v           ;/hdmi-con/port/endpoint       $  ;/i2s3-sound/simple-audio-card,codec         ;/sgtl5000-oscillator            ;/regulator-vcc3v3-baseboard         ;/regulator-vcc3v3-low-noise         <
/regulator-vcc5v0-baseboard         </regulator-vcc5v0-otg           <&/regulator-vcc5v0-usb           <1/regulator-vddd-audio-1v6            	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 i2c10 mmc0 rtc0 ethernet0 mmc1 cpu device_type reg enable-method capacity-dmips-mhz clocks cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts clock-frequency clock-output-names interrupt-names ranges no-map alloc-ranges alignment assigned-clocks assigned-clock-rates clock-names power-domains mali-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk extcon snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos domain-supply iommus reg-names rockchip,vop-grf rockchip,vo1-grf rockchip,pmu remote-endpoint assigned-clock-parents #sound-dai-cells rockchip,vo-grf bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map iommu-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-sd-highspeed vqmmc-supply cd-gpios disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe mmc-pwrseq no-sdio no-sd non-removable rockchip,trcm-sync-tx-only dma-noncoherent mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells pagesize vcc-supply fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend VDDA-supply VDDIO-supply VDDD-supply num-cs gpio-controller #gpio-cells spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend rts-gpios polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low rockchip,pins memory-region reset-gpios vpcie3v3-supply clock_in_out phy-handle phy-mode tx_delay rx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us rockchip,phy-grf opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend id-gpios linux,default-trigger color enable-gpios stdout-path label linux,code wakeup-source linux,input-type simple-audio-card,frame-master simple-audio-card,bitclock-master enable-active-high cpu_l0 cpu_l1 cpu_l2 cpu_l3 cpu_b0 cpu_b1 cpu_b2 cpu_b3 CPU_SLEEP l2_cache_l0 l2_cache_l1 l2_cache_l2 l2_cache_l3 l2_cache_b0 l2_cache_b1 l2_cache_b2 l2_cache_b3 l3_cache display_subsystem scmi scmi_clk scmi_reset hdmi0_sound spll xin24m xin32k scmi_shmem hdmi_receiver_cma gpu usb_host0_xhci usb_host0_ehci usb_host0_ohci usb_host1_ehci usb_host1_ohci usb_host2_xhci mmu600_pcie mmu600_php pmu1grf sys_grf mipidcphy0_grf mipidcphy1_grf vop_grf vo0_grf vo1_grf usb_grf php_grf pipe_phy0_grf pipe_phy2_grf usbdpphy0_grf usb2phy0_grf u2phy0 u2phy0_otg usb2phy2_grf u2phy2 u2phy2_host usb2phy3_grf u2phy3 u2phy3_host hdptxphy0_grf ioc system_sram1 cru uart0 pwm0 pwm1 pwm2 pwm3 power pd_gpu vpu121 vpu121_mmu rga vepu121_0 vepu121_0_mmu vepu121_1 vepu121_1_mmu vepu121_2 vepu121_2_mmu vepu121_3 vepu121_3_mmu av1d vop vop_out vp0 vp0_out_hdmi0 vp1 vp2 vp3 vop_mmu spdif_tx2 i2s4_8ch spdif_tx3 i2s5_8ch i2s9_8ch dsi0 dsi0_in dsi0_out dsi1 dsi1_in dsi1_out hdmi0_in hdmi0_in_vp0 hdmi0_out hdmi0_out_con edp0 edp0_in edp0_out qos_gpu_m0 qos_gpu_m1 qos_gpu_m2 qos_gpu_m3 qos_rga3_1 qos_sdio qos_sdmmc qos_usb3_1 qos_usb3_0 qos_usb2host_0 qos_usb2host_1 qos_fisheye0 qos_fisheye1 qos_isp0_mro qos_isp0_mwo qos_vicap_m0 qos_vicap_m1 qos_isp1_mwo qos_isp1_mro qos_rkvenc0_m0ro qos_rkvenc0_m1ro qos_rkvenc0_m2wo qos_rkvenc1_m0ro qos_rkvenc1_m1ro qos_rkvenc1_m2wo qos_rkvdec0 qos_rkvdec1 qos_av1 qos_iep qos_jpeg_dec qos_jpeg_enc0 qos_jpeg_enc1 qos_jpeg_enc2 qos_jpeg_enc3 qos_rga2_mro qos_rga2_mwo qos_rga3_0 qos_vdpu qos_npu1 qos_npu2 qos_npu0_mwr qos_npu0_mro qos_mcu_npu qos_hdcp0 qos_hdcp1 qos_hdmirx qos_vop_m0 qos_vop_m1 dfi pcie2x1l1 pcie2x1l1_intc pcie2x1l2 pcie2x1l2_intc gmac1 mdio1 gmac1_stmmac_axi_setup gmac1_mtl_rx_setup gmac1_mtl_tx_setup sata0 sata2 sfc sdhci i2s0_8ch i2s1_8ch i2s2_2ch i2s3_2ch spdif_tx0 spdif_tx1 gic its0 its1 ppi_partition0 ppi_partition1 dmac0 dmac1 vdd_npu_s0 sgtl5000 timer0 wdt rk806_dvs1_null rk806_dvs2_null rk806_dvs3_null vdd_gpu_s0 vdd_cpu_lit_s0 vdd_log_s0 vdd_vdenc_s0 vdd_ddr_s0 vdd2_ddr_s3 vcc_2v0_pldo_s3 vcc_3v3_s3 vddq_ddr_s0 vcc_1v8_s3 vcca_1v8_s0 vcc_1v8_s0 vdda_1v2_s0 vcca_3v3_s0 vccio_sd_s0 pldo6_s3 vdd_0v75_s3 vdda_ddr_pll_s0 vdda_0v75_s0 vdda_0v85_s0 vdd_0v75_s0 uart1 uart2 uart3 uart4 uart5 uart6 uart7 uart8 uart9 pwm4 pwm5 pwm6 pwm7 pwm8 pwm9 pwm10 pwm11 pwm12 pwm13 pwm14 pwm15 thermal_zones package_thermal package_crit bigcore0_thermal bigcore0_alert bigcore0_crit bigcore2_thermal bigcore2_alert bigcore2_crit little_core_thermal littlecore_alert littlecore_crit center_thermal center_crit gpu_thermal gpu_alert gpu_crit npu_thermal npu_crit tsadc saradc rtc_twi vdd_cpu_big0_s0 vdd_cpu_big1_s0 otp cpu_code otp_id cpub0_leakage cpub1_leakage cpul_leakage log_leakage gpu_leakage otp_cpu_version npu_leakage codec_leakage dmac2 hdptxphy0 usbdp_phy0 mipidcphy0 mipidcphy1 combphy0_ps combphy2_psu system_sram2 pinctrl pcfg_pull_up pcfg_pull_down pcfg_pull_none pcfg_pull_none_drv_level_0 pcfg_pull_none_drv_level_1 pcfg_pull_none_drv_level_2 pcfg_pull_none_drv_level_3 pcfg_pull_none_drv_level_4 pcfg_pull_none_drv_level_5 pcfg_pull_none_drv_level_6 pcfg_pull_none_drv_level_7 pcfg_pull_none_drv_level_8 pcfg_pull_none_drv_level_9 pcfg_pull_none_drv_level_10 pcfg_pull_none_drv_level_11 pcfg_pull_none_drv_level_12 pcfg_pull_none_drv_level_13 pcfg_pull_none_drv_level_14 pcfg_pull_none_drv_level_15 pcfg_pull_up_drv_level_0 pcfg_pull_up_drv_level_1 pcfg_pull_up_drv_level_2 pcfg_pull_up_drv_level_3 pcfg_pull_up_drv_level_4 pcfg_pull_up_drv_level_5 pcfg_pull_up_drv_level_6 pcfg_pull_up_drv_level_7 pcfg_pull_up_drv_level_8 pcfg_pull_up_drv_level_9 pcfg_pull_up_drv_level_10 pcfg_pull_up_drv_level_11 pcfg_pull_up_drv_level_12 pcfg_pull_up_drv_level_13 pcfg_pull_up_drv_level_14 pcfg_pull_up_drv_level_15 pcfg_pull_down_drv_level_0 pcfg_pull_down_drv_level_1 pcfg_pull_down_drv_level_2 pcfg_pull_down_drv_level_3 pcfg_pull_down_drv_level_4 pcfg_pull_down_drv_level_5 pcfg_pull_down_drv_level_6 pcfg_pull_down_drv_level_7 pcfg_pull_down_drv_level_8 pcfg_pull_down_drv_level_9 pcfg_pull_down_drv_level_10 pcfg_pull_down_drv_level_11 pcfg_pull_down_drv_level_12 pcfg_pull_down_drv_level_13 pcfg_pull_down_drv_level_14 pcfg_pull_down_drv_level_15 pcfg_pull_up_smt pcfg_pull_down_smt pcfg_pull_none_smt pcfg_pull_none_drv_level_0_smt pcfg_pull_none_drv_level_1_smt pcfg_pull_none_drv_level_2_smt pcfg_pull_none_drv_level_3_smt pcfg_pull_none_drv_level_4_smt pcfg_pull_none_drv_level_5_smt pcfg_output_high pcfg_output_low auddsm_pins bt1120_pins can0m0_pins can0m1_pins can1m0_pins can1m1_pins can2m0_pins can2m1_pins cif_clk cif_dvp_clk cif_dvp_bus16 cif_dvp_bus8 clk32k_in clk32k_out0 clk32k_out1 cpu_pins ddrphych0_pins ddrphych1_pins ddrphych2_pins ddrphych3_pins dp0m0_pins dp0m1_pins dp0m2_pins dp1m0_pins dp1m1_pins dp1m2_pins emmc_rstnout emmc_bus8 emmc_clk emmc_cmd emmc_data_strobe emmc_reset eth1_pins fspim0_pins fspim0_cs1 fspim2_pins fspim2_cs1 fspim1_pins fspim1_cs1 gmac1_miim gmac1_clkinout gmac1_rx_bus2 gmac1_tx_bus2 gmac1_rgmii_clk gmac1_rgmii_bus gmac1_ppsclk gmac1_ppstrig gmac1_ptp_ref_clk gmac1_txer gpu_pins hdmim0_rx_cec hdmim0_rx_hpdin hdmim0_rx_scl hdmim0_rx_sda hdmim0_tx0_cec hdmim0_tx0_hpd hdmim0_tx0_scl hdmim0_tx0_sda hdmim0_tx1_hpd hdmim1_rx_cec hdmim1_rx_hpdin hdmim1_rx_scl hdmim1_rx_sda hdmim1_tx0_cec hdmim1_tx0_hpd hdmim1_tx0_scl hdmim1_tx0_sda hdmim1_tx1_cec hdmim1_tx1_hpd hdmim1_tx1_scl hdmim1_tx1_sda hdmim2_rx_cec hdmim2_rx_hpdin hdmim2_rx_scl hdmim2_rx_sda hdmim2_tx0_scl hdmim2_tx0_sda hdmim2_tx1_cec hdmim2_tx1_scl hdmim2_tx1_sda hdmi_debug0 hdmi_debug1 hdmi_debug2 hdmi_debug3 hdmi_debug4 hdmi_debug5 hdmi_debug6 hdmim0_tx1_cec hdmim0_tx1_scl hdmim0_tx1_sda i2c0m0_xfer i2c0m2_xfer i2c0m1_xfer i2c1m0_xfer i2c1m1_xfer i2c1m2_xfer i2c1m3_xfer i2c1m4_xfer i2c2m0_xfer i2c2m2_xfer i2c2m3_xfer i2c2m4_xfer i2c2m1_xfer i2c3m0_xfer i2c3m1_xfer i2c3m2_xfer i2c3m4_xfer i2c3m3_xfer i2c4m0_xfer i2c4m2_xfer i2c4m3_xfer i2c4m4_xfer i2c4m1_xfer i2c5m0_xfer i2c5m1_xfer i2c5m2_xfer i2c5m3_xfer i2c5m4_xfer i2c6m0_xfer i2c6m1_xfer i2c6m3_xfer i2c6m4_xfer i2c6m2_xfer i2c7m0_xfer i2c7m2_xfer i2c7m3_xfer i2c7m1_xfer i2c8m0_xfer i2c8m2_xfer i2c8m3_xfer i2c8m4_xfer i2c8m1_xfer i2s0_lrck i2s0_mclk i2s0_sclk i2s0_sdi0 i2s0_sdi1 i2s0_sdi2 i2s0_sdi3 i2s0_sdo0 i2s0_sdo1 i2s0_sdo2 i2s0_sdo3 i2s1m0_lrck i2s1m0_mclk i2s1m0_sclk i2s1m0_sdi0 i2s1m0_sdi1 i2s1m0_sdi2 i2s1m0_sdi3 i2s1m0_sdo0 i2s1m0_sdo1 i2s1m0_sdo2 i2s1m0_sdo3 i2s1m1_lrck i2s1m1_mclk i2s1m1_sclk i2s1m1_sdi0 i2s1m1_sdi1 i2s1m1_sdi2 i2s1m1_sdi3 i2s1m1_sdo0 i2s1m1_sdo1 i2s1m1_sdo2 i2s1m1_sdo3 i2s2m0_lrck i2s2m0_mclk i2s2m0_sclk i2s2m0_sdi i2s2m0_sdo i2s2m1_lrck i2s2m1_mclk i2s2m1_sclk i2s2m1_sdi i2s2m1_sdo i2s3_lrck i2s3_mclk i2s3_sclk i2s3_sdi i2s3_sdo jtagm0_pins jtagm1_pins jtagm2_pins litcpu_pins mcum0_pins mcum1_pins mipim0_camera0_clk mipim0_camera1_clk mipim0_camera2_clk mipim0_camera3_clk mipim0_camera4_clk mipim1_camera0_clk mipim1_camera1_clk mipim1_camera2_clk mipim1_camera3_clk mipim1_camera4_clk mipi_te0 mipi_te1 npu_pins pcie20x1m0_clkreqn pcie20x1m0_perstn pcie20x1m0_waken pcie20x1m1_clkreqn pcie20x1m1_perstn pcie20x1m1_waken pcie20x1_2_button_rstn pcie30phy_pins pcie30x1m0_0_clkreqn pcie30x1m0_0_perstn pcie30x1m0_0_waken pcie30x1m0_1_clkreqn pcie30x1m0_1_perstn pcie30x1m0_1_waken pcie30x1m1_0_clkreqn pcie30x1m1_0_perstn pcie30x1m1_0_waken pcie30x1m1_1_clkreqn pcie30x1m1_1_perstn pcie30x1m1_1_waken pcie30x1m2_0_clkreqn pcie30x1m2_0_perstn pcie30x1m2_0_waken pcie30x1m2_1_clkreqn pcie30x1m2_1_perstn pcie30x1m2_1_waken pcie30x1_0_button_rstn pcie30x1_1_button_rstn pcie30x2m0_clkreqn pcie30x2m0_perstn pcie30x2m0_waken pcie30x2m1_clkreqn pcie30x2m1_perstn pcie30x2m1_waken pcie30x2m2_clkreqn pcie30x2m2_perstn pcie30x2m2_waken pcie30x2m3_clkreqn pcie30x2m3_perstn pcie30x2m3_waken pcie30x2_button_rstn pcie30x4m0_clkreqn pcie30x4m0_perstn pcie30x4m0_waken pcie30x4m1_clkreqn pcie30x4m1_perstn pcie30x4m1_waken pcie30x4m2_clkreqn pcie30x4m2_perstn pcie30x4m2_waken pcie30x4m3_clkreqn pcie30x4m3_perstn pcie30x4m3_waken pcie30x4_button_rstn pdm0m0_clk pdm0m0_clk1 pdm0m0_sdi0 pdm0m0_sdi1 pdm0m0_sdi2 pdm0m0_sdi3 pdm0m1_clk pdm0m1_clk1 pdm0m1_sdi0 pdm0m1_sdi1 pdm0m1_sdi2 pdm0m1_sdi3 pdm1m0_clk pdm1m0_clk1 pdm1m0_sdi0 pdm1m0_sdi1 pdm1m0_sdi2 pdm1m0_sdi3 pdm1m1_clk pdm1m1_clk1 pdm1m1_sdi0 pdm1m1_sdi1 pdm1m1_sdi2 pdm1m1_sdi3 pmic_pins pmu_pins pwm0m0_pins pwm0m1_pins pwm0m2_pins pwm1m0_pins pwm1m1_pins pwm1m2_pins pwm2m0_pins pwm2m1_pins pwm2m2_pins pwm3m0_pins pwm3m1_pins pwm3m2_pins pwm3m3_pins pwm4m0_pins pwm4m1_pins pwm5m0_pins pwm5m1_pins pwm5m2_pins pwm6m0_pins pwm6m1_pins pwm6m2_pins pwm7m0_pins pwm7m1_pins pwm7m2_pins pwm7m3_pins pwm8m0_pins pwm8m1_pins pwm8m2_pins pwm9m0_pins pwm9m1_pins pwm9m2_pins pwm10m0_pins pwm10m1_pins pwm10m2_pins pwm11m0_pins pwm11m1_pins pwm11m2_pins pwm11m3_pins pwm12m0_pins pwm12m1_pins pwm13m0_pins pwm13m1_pins pwm13m2_pins pwm14m0_pins pwm14m1_pins pwm14m2_pins pwm15m0_pins pwm15m1_pins pwm15m2_pins pwm15m3_pins refclk_pins sata_pins sata0m0_pins sata0m1_pins sata1m0_pins sata1m1_pins sata2m0_pins sata2m1_pins sdiom1_pins sdiom0_pins sdmmc_bus4 sdmmc_clk sdmmc_cmd sdmmc_det sdmmc_pwren spdif0m0_tx spdif0m1_tx spdif1m0_tx spdif1m1_tx spdif1m2_tx spi0m0_pins spi0m0_cs0 spi0m0_cs1 spi0m1_pins spi0m1_cs0 spi0m1_cs1 spi0m2_pins spi0m2_cs0 spi0m2_cs1 spi0m3_pins spi0m3_cs0 spi0m3_cs1 spi1m1_pins spi1m1_cs0 spi1m1_cs1 spi1m2_pins spi1m2_cs0 spi1m2_cs1 spi1m0_pins spi1m0_cs0 spi1m0_cs1 spi2m0_pins spi2m0_cs0 spi2m0_cs1 spi2m1_pins spi2m1_cs0 spi2m1_cs1 spi2m2_pins spi2m2_cs0 spi2m2_cs1 spi3m1_pins spi3m1_cs0 spi3m1_cs1 spi3m2_pins spi3m2_cs0 spi3m2_cs1 spi3m3_pins spi3m3_cs0 spi3m3_cs1 spi3m0_pins spi3m0_cs0 spi3m0_cs1 spi4m0_pins spi4m0_cs0 spi4m0_cs1 spi4m1_pins spi4m1_cs0 spi4m1_cs1 spi4m2_pins spi4m2_cs0 tsadcm1_shut tsadc_shut tsadc_shut_org uart0m0_xfer uart0m1_xfer uart0m2_xfer uart0_ctsn uart0_rtsn uart1m1_xfer uart1m1_ctsn uart1m1_rtsn uart1m2_xfer uart1m2_ctsn uart1m2_rtsn uart1m0_xfer uart1m0_ctsn uart1m0_rtsn uart2m0_xfer uart2m1_xfer uart2m2_xfer uart2_ctsn uart2_rtsn uart3m0_xfer uart3m1_xfer uart3m2_xfer uart3_ctsn uart3_rtsn uart4m0_xfer uart4m1_xfer uart4m2_xfer uart4_ctsn uart4_rtsn uart5m0_xfer uart5m0_ctsn uart5m0_rtsn uart5m1_xfer uart5m1_ctsn uart5m1_rtsn uart5m2_xfer uart6m1_xfer uart6m1_ctsn uart6m1_rtsn uart6m2_xfer uart6m0_xfer uart6m0_ctsn uart6m0_rtsn uart7m1_xfer uart7m1_ctsn uart7m1_rtsn uart7m2_xfer uart7m0_xfer uart7m0_ctsn uart7m0_rtsn uart8m0_xfer uart8m0_ctsn uart8m0_rtsn uart8m1_xfer uart8m1_ctsn uart8m1_rtsn uart8_xfer uart9m0_xfer uart9m1_xfer uart9m1_ctsn uart9m1_rtsn uart9m2_xfer uart9m2_ctsn uart9m2_rtsn uart9m0_ctsn uart9m0_rtsn vop_pins bt656_pins tsadc_gpio_func eth0_pins gmac0_miim gmac0_clkinout gmac0_rx_bus2 gmac0_tx_bus2 gmac0_rgmii_clk gmac0_rgmii_bus gmac0_ppsclk gmac0_ppstring gmac0_ptp_refclk gmac0_txer eth_reset module_led_pin usb3_id haikou_keys_pin otg_vbus_drv hdmi1_sound usb_host1_xhci pcie30_phy_grf pipe_phy1_grf usbdpphy1_grf usb2phy1_grf u2phy1 u2phy1_otg hdptxphy1_grf spdif_tx5 i2s8_8ch spdif_tx4 i2s6_8ch i2s7_8ch i2s10_8ch hdmi1 hdmi1_in hdmi1_out edp1 edp1_in edp1_out hdmi_receiver pcie3x4 pcie3x4_intc pcie3x4_ep pcie3x2 pcie3x2_intc pcie2x1l0 pcie2x1l0_intc gmac0 mdio0 rgmii_phy gmac0_stmmac_axi_setup gmac0_mtl_rx_setup gmac0_mtl_tx_setup sata1 hdptxphy1 usbdp_phy1 combphy1_ps pcie30phy cluster0_opp_table cluster1_opp_table cluster2_opp_table gpu_opp_table emmc_pwrseq extcon_usb3 pcie_refclk_gen pcie_refclk vcc_1v1_nldo_s3 vcc_1v2_s3 vcc5v0_sys dc_12v hdmi_con_in sgtl5000_codec sgtl5000_clk vcc3v3_baseboard vcc3v3_low_noise vcc5v0_baseboard vcc5v0_otg vcc5v0_usb vddd_audio_1v6 